xref: /freebsd/contrib/llvm-project/llvm/lib/Target/Mips/MipsCallLowering.h (revision 6966ac055c3b7a39266fb982493330df7a097997)
1 //===- MipsCallLowering.h ---------------------------------------*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 /// \file
10 /// This file describes how to lower LLVM calls to machine code calls.
11 //
12 //===----------------------------------------------------------------------===//
13 
14 #ifndef LLVM_LIB_TARGET_MIPS_MIPSCALLLOWERING_H
15 #define LLVM_LIB_TARGET_MIPS_MIPSCALLLOWERING_H
16 
17 #include "llvm/CodeGen/GlobalISel/CallLowering.h"
18 
19 namespace llvm {
20 
21 class MipsTargetLowering;
22 
23 class MipsCallLowering : public CallLowering {
24 
25 public:
26   class MipsHandler {
27   public:
28     MipsHandler(MachineIRBuilder &MIRBuilder, MachineRegisterInfo &MRI)
29         : MIRBuilder(MIRBuilder), MRI(MRI) {}
30 
31     virtual ~MipsHandler() = default;
32 
33     bool handle(ArrayRef<CCValAssign> ArgLocs,
34                 ArrayRef<CallLowering::ArgInfo> Args);
35 
36   protected:
37     bool assignVRegs(ArrayRef<Register> VRegs, ArrayRef<CCValAssign> ArgLocs,
38                      unsigned ArgLocsStartIndex, const EVT &VT);
39 
40     void setLeastSignificantFirst(SmallVectorImpl<Register> &VRegs);
41 
42     MachineIRBuilder &MIRBuilder;
43     MachineRegisterInfo &MRI;
44 
45   private:
46     bool assign(Register VReg, const CCValAssign &VA, const EVT &VT);
47 
48     virtual Register getStackAddress(const CCValAssign &VA,
49                                      MachineMemOperand *&MMO) = 0;
50 
51     virtual void assignValueToReg(Register ValVReg, const CCValAssign &VA,
52                                   const EVT &VT) = 0;
53 
54     virtual void assignValueToAddress(Register ValVReg,
55                                       const CCValAssign &VA) = 0;
56 
57     virtual bool handleSplit(SmallVectorImpl<Register> &VRegs,
58                              ArrayRef<CCValAssign> ArgLocs,
59                              unsigned ArgLocsStartIndex, Register ArgsReg,
60                              const EVT &VT) = 0;
61   };
62 
63   MipsCallLowering(const MipsTargetLowering &TLI);
64 
65   bool lowerReturn(MachineIRBuilder &MIRBuilder, const Value *Val,
66                    ArrayRef<Register> VRegs) const override;
67 
68   bool lowerFormalArguments(MachineIRBuilder &MIRBuilder, const Function &F,
69                             ArrayRef<ArrayRef<Register>> VRegs) const override;
70 
71   bool lowerCall(MachineIRBuilder &MIRBuilder, CallingConv::ID CallConv,
72                  const MachineOperand &Callee, const ArgInfo &OrigRet,
73                  ArrayRef<ArgInfo> OrigArgs) const override;
74 
75 private:
76   /// Based on registers available on target machine split or extend
77   /// type if needed, also change pointer type to appropriate integer
78   /// type.
79   template <typename T>
80   void subTargetRegTypeForCallingConv(const Function &F, ArrayRef<ArgInfo> Args,
81                                       ArrayRef<unsigned> OrigArgIndices,
82                                       SmallVectorImpl<T> &ISDArgs) const;
83 
84   /// Split structures and arrays, save original argument indices since
85   /// Mips calling convention needs info about original argument type.
86   void splitToValueTypes(const ArgInfo &OrigArg, unsigned OriginalIndex,
87                          SmallVectorImpl<ArgInfo> &SplitArgs,
88                          SmallVectorImpl<unsigned> &SplitArgsOrigIndices) const;
89 };
90 
91 } // end namespace llvm
92 
93 #endif // LLVM_LIB_TARGET_MIPS_MIPSCALLLOWERING_H
94