10b57cec5SDimitry Andric //===- MipsCallLowering.h ---------------------------------------*- C++ -*-===// 20b57cec5SDimitry Andric // 30b57cec5SDimitry Andric // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 40b57cec5SDimitry Andric // See https://llvm.org/LICENSE.txt for license information. 50b57cec5SDimitry Andric // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 60b57cec5SDimitry Andric // 70b57cec5SDimitry Andric //===----------------------------------------------------------------------===// 80b57cec5SDimitry Andric // 90b57cec5SDimitry Andric /// \file 100b57cec5SDimitry Andric /// This file describes how to lower LLVM calls to machine code calls. 110b57cec5SDimitry Andric // 120b57cec5SDimitry Andric //===----------------------------------------------------------------------===// 130b57cec5SDimitry Andric 140b57cec5SDimitry Andric #ifndef LLVM_LIB_TARGET_MIPS_MIPSCALLLOWERING_H 150b57cec5SDimitry Andric #define LLVM_LIB_TARGET_MIPS_MIPSCALLLOWERING_H 160b57cec5SDimitry Andric 170b57cec5SDimitry Andric #include "llvm/CodeGen/GlobalISel/CallLowering.h" 180b57cec5SDimitry Andric 190b57cec5SDimitry Andric namespace llvm { 200b57cec5SDimitry Andric 210b57cec5SDimitry Andric class MipsTargetLowering; 220b57cec5SDimitry Andric 230b57cec5SDimitry Andric class MipsCallLowering : public CallLowering { 240b57cec5SDimitry Andric 250b57cec5SDimitry Andric public: 260b57cec5SDimitry Andric class MipsHandler { 270b57cec5SDimitry Andric public: 280b57cec5SDimitry Andric MipsHandler(MachineIRBuilder &MIRBuilder, MachineRegisterInfo &MRI) 290b57cec5SDimitry Andric : MIRBuilder(MIRBuilder), MRI(MRI) {} 300b57cec5SDimitry Andric 310b57cec5SDimitry Andric virtual ~MipsHandler() = default; 320b57cec5SDimitry Andric 330b57cec5SDimitry Andric bool handle(ArrayRef<CCValAssign> ArgLocs, 340b57cec5SDimitry Andric ArrayRef<CallLowering::ArgInfo> Args); 350b57cec5SDimitry Andric 360b57cec5SDimitry Andric protected: 370b57cec5SDimitry Andric bool assignVRegs(ArrayRef<Register> VRegs, ArrayRef<CCValAssign> ArgLocs, 380b57cec5SDimitry Andric unsigned ArgLocsStartIndex, const EVT &VT); 390b57cec5SDimitry Andric 400b57cec5SDimitry Andric void setLeastSignificantFirst(SmallVectorImpl<Register> &VRegs); 410b57cec5SDimitry Andric 420b57cec5SDimitry Andric MachineIRBuilder &MIRBuilder; 430b57cec5SDimitry Andric MachineRegisterInfo &MRI; 440b57cec5SDimitry Andric 450b57cec5SDimitry Andric private: 460b57cec5SDimitry Andric bool assign(Register VReg, const CCValAssign &VA, const EVT &VT); 470b57cec5SDimitry Andric 480b57cec5SDimitry Andric virtual Register getStackAddress(const CCValAssign &VA, 490b57cec5SDimitry Andric MachineMemOperand *&MMO) = 0; 500b57cec5SDimitry Andric 510b57cec5SDimitry Andric virtual void assignValueToReg(Register ValVReg, const CCValAssign &VA, 520b57cec5SDimitry Andric const EVT &VT) = 0; 530b57cec5SDimitry Andric 540b57cec5SDimitry Andric virtual void assignValueToAddress(Register ValVReg, 550b57cec5SDimitry Andric const CCValAssign &VA) = 0; 560b57cec5SDimitry Andric 570b57cec5SDimitry Andric virtual bool handleSplit(SmallVectorImpl<Register> &VRegs, 580b57cec5SDimitry Andric ArrayRef<CCValAssign> ArgLocs, 590b57cec5SDimitry Andric unsigned ArgLocsStartIndex, Register ArgsReg, 600b57cec5SDimitry Andric const EVT &VT) = 0; 610b57cec5SDimitry Andric }; 620b57cec5SDimitry Andric 630b57cec5SDimitry Andric MipsCallLowering(const MipsTargetLowering &TLI); 640b57cec5SDimitry Andric 650b57cec5SDimitry Andric bool lowerReturn(MachineIRBuilder &MIRBuilder, const Value *Val, 660b57cec5SDimitry Andric ArrayRef<Register> VRegs) const override; 670b57cec5SDimitry Andric 680b57cec5SDimitry Andric bool lowerFormalArguments(MachineIRBuilder &MIRBuilder, const Function &F, 690b57cec5SDimitry Andric ArrayRef<ArrayRef<Register>> VRegs) const override; 700b57cec5SDimitry Andric 71*8bcb0991SDimitry Andric bool lowerCall(MachineIRBuilder &MIRBuilder, 72*8bcb0991SDimitry Andric CallLoweringInfo &Info) const override; 730b57cec5SDimitry Andric 740b57cec5SDimitry Andric private: 750b57cec5SDimitry Andric /// Based on registers available on target machine split or extend 760b57cec5SDimitry Andric /// type if needed, also change pointer type to appropriate integer 770b57cec5SDimitry Andric /// type. 780b57cec5SDimitry Andric template <typename T> 790b57cec5SDimitry Andric void subTargetRegTypeForCallingConv(const Function &F, ArrayRef<ArgInfo> Args, 800b57cec5SDimitry Andric ArrayRef<unsigned> OrigArgIndices, 810b57cec5SDimitry Andric SmallVectorImpl<T> &ISDArgs) const; 820b57cec5SDimitry Andric 830b57cec5SDimitry Andric /// Split structures and arrays, save original argument indices since 840b57cec5SDimitry Andric /// Mips calling convention needs info about original argument type. 85*8bcb0991SDimitry Andric void splitToValueTypes(const DataLayout &DL, const ArgInfo &OrigArg, 86*8bcb0991SDimitry Andric unsigned OriginalIndex, 870b57cec5SDimitry Andric SmallVectorImpl<ArgInfo> &SplitArgs, 880b57cec5SDimitry Andric SmallVectorImpl<unsigned> &SplitArgsOrigIndices) const; 890b57cec5SDimitry Andric }; 900b57cec5SDimitry Andric 910b57cec5SDimitry Andric } // end namespace llvm 920b57cec5SDimitry Andric 930b57cec5SDimitry Andric #endif // LLVM_LIB_TARGET_MIPS_MIPSCALLLOWERING_H 94