1*0b57cec5SDimitry Andric //===- MipsCallLowering.h ---------------------------------------*- C++ -*-===// 2*0b57cec5SDimitry Andric // 3*0b57cec5SDimitry Andric // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4*0b57cec5SDimitry Andric // See https://llvm.org/LICENSE.txt for license information. 5*0b57cec5SDimitry Andric // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6*0b57cec5SDimitry Andric // 7*0b57cec5SDimitry Andric //===----------------------------------------------------------------------===// 8*0b57cec5SDimitry Andric // 9*0b57cec5SDimitry Andric /// \file 10*0b57cec5SDimitry Andric /// This file describes how to lower LLVM calls to machine code calls. 11*0b57cec5SDimitry Andric // 12*0b57cec5SDimitry Andric //===----------------------------------------------------------------------===// 13*0b57cec5SDimitry Andric 14*0b57cec5SDimitry Andric #ifndef LLVM_LIB_TARGET_MIPS_MIPSCALLLOWERING_H 15*0b57cec5SDimitry Andric #define LLVM_LIB_TARGET_MIPS_MIPSCALLLOWERING_H 16*0b57cec5SDimitry Andric 17*0b57cec5SDimitry Andric #include "llvm/CodeGen/GlobalISel/CallLowering.h" 18*0b57cec5SDimitry Andric 19*0b57cec5SDimitry Andric namespace llvm { 20*0b57cec5SDimitry Andric 21*0b57cec5SDimitry Andric class MipsTargetLowering; 22*0b57cec5SDimitry Andric 23*0b57cec5SDimitry Andric class MipsCallLowering : public CallLowering { 24*0b57cec5SDimitry Andric 25*0b57cec5SDimitry Andric public: 26*0b57cec5SDimitry Andric class MipsHandler { 27*0b57cec5SDimitry Andric public: 28*0b57cec5SDimitry Andric MipsHandler(MachineIRBuilder &MIRBuilder, MachineRegisterInfo &MRI) 29*0b57cec5SDimitry Andric : MIRBuilder(MIRBuilder), MRI(MRI) {} 30*0b57cec5SDimitry Andric 31*0b57cec5SDimitry Andric virtual ~MipsHandler() = default; 32*0b57cec5SDimitry Andric 33*0b57cec5SDimitry Andric bool handle(ArrayRef<CCValAssign> ArgLocs, 34*0b57cec5SDimitry Andric ArrayRef<CallLowering::ArgInfo> Args); 35*0b57cec5SDimitry Andric 36*0b57cec5SDimitry Andric protected: 37*0b57cec5SDimitry Andric bool assignVRegs(ArrayRef<Register> VRegs, ArrayRef<CCValAssign> ArgLocs, 38*0b57cec5SDimitry Andric unsigned ArgLocsStartIndex, const EVT &VT); 39*0b57cec5SDimitry Andric 40*0b57cec5SDimitry Andric void setLeastSignificantFirst(SmallVectorImpl<Register> &VRegs); 41*0b57cec5SDimitry Andric 42*0b57cec5SDimitry Andric MachineIRBuilder &MIRBuilder; 43*0b57cec5SDimitry Andric MachineRegisterInfo &MRI; 44*0b57cec5SDimitry Andric 45*0b57cec5SDimitry Andric private: 46*0b57cec5SDimitry Andric bool assign(Register VReg, const CCValAssign &VA, const EVT &VT); 47*0b57cec5SDimitry Andric 48*0b57cec5SDimitry Andric virtual Register getStackAddress(const CCValAssign &VA, 49*0b57cec5SDimitry Andric MachineMemOperand *&MMO) = 0; 50*0b57cec5SDimitry Andric 51*0b57cec5SDimitry Andric virtual void assignValueToReg(Register ValVReg, const CCValAssign &VA, 52*0b57cec5SDimitry Andric const EVT &VT) = 0; 53*0b57cec5SDimitry Andric 54*0b57cec5SDimitry Andric virtual void assignValueToAddress(Register ValVReg, 55*0b57cec5SDimitry Andric const CCValAssign &VA) = 0; 56*0b57cec5SDimitry Andric 57*0b57cec5SDimitry Andric virtual bool handleSplit(SmallVectorImpl<Register> &VRegs, 58*0b57cec5SDimitry Andric ArrayRef<CCValAssign> ArgLocs, 59*0b57cec5SDimitry Andric unsigned ArgLocsStartIndex, Register ArgsReg, 60*0b57cec5SDimitry Andric const EVT &VT) = 0; 61*0b57cec5SDimitry Andric }; 62*0b57cec5SDimitry Andric 63*0b57cec5SDimitry Andric MipsCallLowering(const MipsTargetLowering &TLI); 64*0b57cec5SDimitry Andric 65*0b57cec5SDimitry Andric bool lowerReturn(MachineIRBuilder &MIRBuilder, const Value *Val, 66*0b57cec5SDimitry Andric ArrayRef<Register> VRegs) const override; 67*0b57cec5SDimitry Andric 68*0b57cec5SDimitry Andric bool lowerFormalArguments(MachineIRBuilder &MIRBuilder, const Function &F, 69*0b57cec5SDimitry Andric ArrayRef<ArrayRef<Register>> VRegs) const override; 70*0b57cec5SDimitry Andric 71*0b57cec5SDimitry Andric bool lowerCall(MachineIRBuilder &MIRBuilder, CallingConv::ID CallConv, 72*0b57cec5SDimitry Andric const MachineOperand &Callee, const ArgInfo &OrigRet, 73*0b57cec5SDimitry Andric ArrayRef<ArgInfo> OrigArgs) const override; 74*0b57cec5SDimitry Andric 75*0b57cec5SDimitry Andric private: 76*0b57cec5SDimitry Andric /// Based on registers available on target machine split or extend 77*0b57cec5SDimitry Andric /// type if needed, also change pointer type to appropriate integer 78*0b57cec5SDimitry Andric /// type. 79*0b57cec5SDimitry Andric template <typename T> 80*0b57cec5SDimitry Andric void subTargetRegTypeForCallingConv(const Function &F, ArrayRef<ArgInfo> Args, 81*0b57cec5SDimitry Andric ArrayRef<unsigned> OrigArgIndices, 82*0b57cec5SDimitry Andric SmallVectorImpl<T> &ISDArgs) const; 83*0b57cec5SDimitry Andric 84*0b57cec5SDimitry Andric /// Split structures and arrays, save original argument indices since 85*0b57cec5SDimitry Andric /// Mips calling convention needs info about original argument type. 86*0b57cec5SDimitry Andric void splitToValueTypes(const ArgInfo &OrigArg, unsigned OriginalIndex, 87*0b57cec5SDimitry Andric SmallVectorImpl<ArgInfo> &SplitArgs, 88*0b57cec5SDimitry Andric SmallVectorImpl<unsigned> &SplitArgsOrigIndices) const; 89*0b57cec5SDimitry Andric }; 90*0b57cec5SDimitry Andric 91*0b57cec5SDimitry Andric } // end namespace llvm 92*0b57cec5SDimitry Andric 93*0b57cec5SDimitry Andric #endif // LLVM_LIB_TARGET_MIPS_MIPSCALLLOWERING_H 94