xref: /freebsd/contrib/llvm-project/llvm/lib/Target/Mips/Mips32r6InstrFormats.td (revision 7fdf597e96a02165cfe22ff357b857d5fa15ed8a)
1//=- Mips32r6InstrFormats.td - Mips32r6 Instruction Formats -*- tablegen -*-==//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This file describes Mips32r6 instruction formats.
10//
11//===----------------------------------------------------------------------===//
12
13class R6MMR6Rel;
14
15def MipsR62MicroMipsR6 : InstrMapping {
16  let FilterClass = "R6MMR6Rel";
17  // Instructions with the same BaseOpcode and isNVStore values form a row.
18  let RowFields = ["BaseOpcode"];
19  // Instructions with the same predicate sense form a column.
20  let ColFields = ["Arch"];
21  // The key column is the unpredicated instructions.
22  let KeyCol = ["mipsr6"];
23  // Value columns are PredSense=true and PredSense=false
24  let ValueCols = [["mipsr6"], ["micromipsr6"]];
25}
26
27class MipsR6Arch<string opstr> {
28  string Arch = "mipsr6";
29  string BaseOpcode = opstr;
30}
31
32class MipsR6Inst : MipsInst<(outs), (ins), "", [], NoItinerary, FrmOther> {
33  let DecoderNamespace = "Mips32r6_64r6";
34  let EncodingPredicates = [HasStdEnc];
35}
36
37//===----------------------------------------------------------------------===//
38//
39// Field Values
40//
41//===----------------------------------------------------------------------===//
42
43class OPGROUP<bits<6> Val> {
44  bits<6> Value = Val;
45}
46def OPGROUP_COP0     : OPGROUP<0b010000>;
47def OPGROUP_COP1     : OPGROUP<0b010001>;
48def OPGROUP_COP2     : OPGROUP<0b010010>;
49def OPGROUP_ADDI     : OPGROUP<0b001000>;
50def OPGROUP_AUI      : OPGROUP<0b001111>;
51def OPGROUP_BLEZ     : OPGROUP<0b000110>;
52def OPGROUP_BGTZ     : OPGROUP<0b000111>;
53def OPGROUP_BLEZL    : OPGROUP<0b010110>;
54def OPGROUP_BGTZL    : OPGROUP<0b010111>;
55def OPGROUP_DADDI    : OPGROUP<0b011000>;
56def OPGROUP_DAUI     : OPGROUP<0b011101>;
57def OPGROUP_PCREL    : OPGROUP<0b111011>;
58def OPGROUP_REGIMM   : OPGROUP<0b000001>;
59def OPGROUP_SPECIAL  : OPGROUP<0b000000>;
60// The spec occasionally names this value LL, LLD, SC, or SCD.
61def OPGROUP_SPECIAL3 : OPGROUP<0b011111>;
62// The spec names this constant LWC2, LDC2, SWC2, and SDC2 in different places.
63def OPGROUP_COP2LDST : OPGROUP<0b010010>;
64
65class OPCODE2<bits<2> Val> {
66  bits<2> Value = Val;
67}
68def OPCODE2_ADDIUPC : OPCODE2<0b00>;
69def OPCODE2_LWPC    : OPCODE2<0b01>;
70def OPCODE2_LWUPC   : OPCODE2<0b10>;
71
72class OPCODE3<bits<3> Val> {
73  bits<3> Value = Val;
74}
75def OPCODE3_LDPC : OPCODE3<0b110>;
76
77class OPCODE5<bits<5> Val> {
78  bits<5> Value = Val;
79}
80def OPCODE5_ALUIPC : OPCODE5<0b11111>;
81def OPCODE5_AUIPC  : OPCODE5<0b11110>;
82def OPCODE5_DAHI : OPCODE5<0b00110>;
83def OPCODE5_DATI : OPCODE5<0b11110>;
84def OPCODE5_BC1EQZ : OPCODE5<0b01001>;
85def OPCODE5_BC1NEZ : OPCODE5<0b01101>;
86def OPCODE5_BC2EQZ : OPCODE5<0b01001>;
87def OPCODE5_BC2NEZ : OPCODE5<0b01101>;
88def OPCODE5_BGEZAL : OPCODE5<0b10001>;
89def OPCODE5_NAL : OPCODE5<0b10000>;
90def OPCODE5_SIGRIE : OPCODE5<0b10111>;
91// The next four constants are unnamed in the spec. These names are taken from
92// the OPGROUP names they are used with.
93def OPCODE5_LDC2   : OPCODE5<0b01110>;
94def OPCODE5_LWC2   : OPCODE5<0b01010>;
95def OPCODE5_SDC2   : OPCODE5<0b01111>;
96def OPCODE5_SWC2   : OPCODE5<0b01011>;
97
98class OPCODE6<bits<6> Val> {
99  bits<6> Value = Val;
100}
101def OPCODE6_ALIGN    : OPCODE6<0b100000>;
102def OPCODE6_DALIGN   : OPCODE6<0b100100>;
103def OPCODE6_BITSWAP  : OPCODE6<0b100000>;
104def OPCODE6_DBITSWAP : OPCODE6<0b100100>;
105def OPCODE6_JALR     : OPCODE6<0b001001>;
106def OPCODE6_CACHE    : OPCODE6<0b100101>;
107def OPCODE6_PREF     : OPCODE6<0b110101>;
108// The next four constants are unnamed in the spec. These names are taken from
109// the OPGROUP names they are used with.
110def OPCODE6_LL       : OPCODE6<0b110110>;
111def OPCODE6_LLD      : OPCODE6<0b110111>;
112def OPCODE6_SC       : OPCODE6<0b100110>;
113def OPCODE6_SCD      : OPCODE6<0b100111>;
114def OPCODE6_CLO      : OPCODE6<0b010001>;
115def OPCODE6_CLZ      : OPCODE6<0b010000>;
116def OPCODE6_DCLO     : OPCODE6<0b010011>;
117def OPCODE6_DCLZ     : OPCODE6<0b010010>;
118def OPCODE6_LSA      : OPCODE6<0b000101>;
119def OPCODE6_DLSA     : OPCODE6<0b010101>;
120def OPCODE6_SDBBP    : OPCODE6<0b001110>;
121
122class FIELD_FMT<bits<5> Val> {
123  bits<5> Value = Val;
124}
125def FIELD_FMT_S : FIELD_FMT<0b10000>;
126def FIELD_FMT_D : FIELD_FMT<0b10001>;
127
128class FIELD_CMP_COND<bits<5> Val> {
129  bits<5> Value = Val;
130}
131// Note: The CMP_COND_FMT names differ from the C_COND_FMT names.
132def FIELD_CMP_COND_AF   : FIELD_CMP_COND<0b00000>;
133def FIELD_CMP_COND_UN   : FIELD_CMP_COND<0b00001>;
134def FIELD_CMP_COND_EQ   : FIELD_CMP_COND<0b00010>;
135def FIELD_CMP_COND_UEQ  : FIELD_CMP_COND<0b00011>;
136def FIELD_CMP_COND_LT   : FIELD_CMP_COND<0b00100>;
137def FIELD_CMP_COND_ULT  : FIELD_CMP_COND<0b00101>;
138def FIELD_CMP_COND_LE   : FIELD_CMP_COND<0b00110>;
139def FIELD_CMP_COND_ULE  : FIELD_CMP_COND<0b00111>;
140def FIELD_CMP_COND_SAF  : FIELD_CMP_COND<0b01000>;
141def FIELD_CMP_COND_SUN  : FIELD_CMP_COND<0b01001>;
142def FIELD_CMP_COND_SEQ  : FIELD_CMP_COND<0b01010>;
143def FIELD_CMP_COND_SUEQ : FIELD_CMP_COND<0b01011>;
144def FIELD_CMP_COND_SLT  : FIELD_CMP_COND<0b01100>;
145def FIELD_CMP_COND_SULT : FIELD_CMP_COND<0b01101>;
146def FIELD_CMP_COND_SLE  : FIELD_CMP_COND<0b01110>;
147def FIELD_CMP_COND_SULE : FIELD_CMP_COND<0b01111>;
148
149class FIELD_CMP_FORMAT<bits<5> Val> {
150  bits<5> Value = Val;
151}
152def FIELD_CMP_FORMAT_S : FIELD_CMP_FORMAT<0b10100>;
153def FIELD_CMP_FORMAT_D : FIELD_CMP_FORMAT<0b10101>;
154
155//===----------------------------------------------------------------------===//
156//
157// Disambiguators
158//
159//===----------------------------------------------------------------------===//
160//
161// Some encodings are ambiguous except by comparing field values.
162
163class DecodeDisambiguates<string Name> {
164  string DecoderMethod = !strconcat("Decode", Name);
165}
166
167class DecodeDisambiguatedBy<string Name> : DecodeDisambiguates<Name> {
168  string DecoderNamespace = "Mips32r6_64r6_Ambiguous";
169}
170
171//===----------------------------------------------------------------------===//
172//
173// Encoding Formats
174//
175//===----------------------------------------------------------------------===//
176
177class AUI_FM : MipsR6Inst {
178  bits<5> rs;
179  bits<5> rt;
180  bits<16> imm;
181
182  bits<32> Inst;
183
184  let Inst{31-26} = OPGROUP_AUI.Value;
185  let Inst{25-21} = rs;
186  let Inst{20-16} = rt;
187  let Inst{15-0} = imm;
188}
189
190class DAUI_FM : AUI_FM {
191  let Inst{31-26} = OPGROUP_DAUI.Value;
192}
193
194class BAL_FM : MipsR6Inst {
195  bits<16> offset;
196
197  bits<32> Inst;
198
199  let Inst{31-26} = OPGROUP_REGIMM.Value;
200  let Inst{25-21} = 0b00000;
201  let Inst{20-16} = OPCODE5_BGEZAL.Value;
202  let Inst{15-0} = offset;
203}
204
205// NAL for Release 6
206class NAL_FM : MipsR6Inst {
207  bits<32> Inst;
208
209  let Inst{31-26} = OPGROUP_REGIMM.Value;
210  let Inst{25-21} = 0b00000;
211  let Inst{20-16} = OPCODE5_NAL.Value;
212  let Inst{15-0} = 0x00;
213}
214
215class COP0_EVP_DVP_FM<bits<1> sc> : MipsR6Inst {
216  bits<5> rt;
217
218  bits<32> Inst;
219
220  let Inst{31-26} = OPGROUP_COP0.Value;
221  let Inst{25-21} = 0b01011;
222  let Inst{20-16} = rt;
223  let Inst{15-11} = 0b00000;
224  let Inst{10-6}  = 0b00000;
225  let Inst{5}     = sc;
226  let Inst{4-3}   = 0b00;
227  let Inst{2-0}   = 0b100;
228}
229
230class COP1_2R_FM<bits<6> funct, FIELD_FMT Format> : MipsR6Inst {
231  bits<5> fs;
232  bits<5> fd;
233
234  bits<32> Inst;
235
236  let Inst{31-26} = OPGROUP_COP1.Value;
237  let Inst{25-21} = Format.Value;
238  let Inst{20-16} = 0b00000;
239  let Inst{15-11} = fs;
240  let Inst{10-6}  = fd;
241  let Inst{5-0}   = funct;
242}
243
244class COP1_3R_FM<bits<6> funct, FIELD_FMT Format> : MipsR6Inst {
245  bits<5> ft;
246  bits<5> fs;
247  bits<5> fd;
248
249  bits<32> Inst;
250
251  let Inst{31-26} = OPGROUP_COP1.Value;
252  let Inst{25-21} = Format.Value;
253  let Inst{20-16} = ft;
254  let Inst{15-11} = fs;
255  let Inst{10-6} = fd;
256  let Inst{5-0} = funct;
257}
258
259class COP1_BCCZ_FM<OPCODE5 Operation> : MipsR6Inst {
260  bits<5> ft;
261  bits<16> offset;
262
263  bits<32> Inst;
264
265  let Inst{31-26} = OPGROUP_COP1.Value;
266  let Inst{25-21} = Operation.Value;
267  let Inst{20-16} = ft;
268  let Inst{15-0} = offset;
269}
270
271class COP2_BCCZ_FM<OPCODE5 Operation> : MipsR6Inst {
272  bits<5> ct;
273  bits<16> offset;
274
275  bits<32> Inst;
276
277  let Inst{31-26} = OPGROUP_COP2.Value;
278  let Inst{25-21} = Operation.Value;
279  let Inst{20-16} = ct;
280  let Inst{15-0} = offset;
281}
282
283class PCREL16_FM<OPCODE5 Operation> : MipsR6Inst {
284  bits<5> rs;
285  bits<16> imm;
286
287  bits<32> Inst;
288
289  let Inst{31-26} = OPGROUP_PCREL.Value;
290  let Inst{25-21} = rs;
291  let Inst{20-16} = Operation.Value;
292  let Inst{15-0} = imm;
293}
294
295class PCREL19_FM<OPCODE2 Operation> : MipsR6Inst {
296  bits<5> rs;
297  bits<19> imm;
298
299  bits<32> Inst;
300
301  let Inst{31-26} = OPGROUP_PCREL.Value;
302  let Inst{25-21} = rs;
303  let Inst{20-19} = Operation.Value;
304  let Inst{18-0} = imm;
305}
306
307class PCREL18_FM<OPCODE3 Operation> : MipsR6Inst {
308  bits<5> rs;
309  bits<18> imm;
310
311  bits<32> Inst;
312
313  let Inst{31-26} = OPGROUP_PCREL.Value;
314  let Inst{25-21} = rs;
315  let Inst{20-18} = Operation.Value;
316  let Inst{17-0} = imm;
317}
318
319class SPECIAL3_2R_FM<OPCODE6 Operation> : MipsR6Inst {
320  bits<5> rd;
321  bits<5> rt;
322
323  bits<32> Inst;
324
325  let Inst{31-26} = OPGROUP_SPECIAL3.Value;
326  let Inst{25-21} = 0b00000;
327  let Inst{20-16} = rt;
328  let Inst{15-11} = rd;
329  let Inst{10-6}  = 0b00000;
330  let Inst{5-0}   = Operation.Value;
331}
332
333class SPECIAL3_MEM_FM<OPCODE6 Operation> : MipsR6Inst {
334  bits<21> addr;
335  bits<5> hint;
336  bits<5> base = addr{20-16};
337  bits<9> offset = addr{8-0};
338
339  bits<32> Inst;
340
341  let Inst{31-26} = OPGROUP_SPECIAL3.Value;
342  let Inst{25-21} = base;
343  let Inst{20-16} = hint;
344  let Inst{15-7}  = offset;
345  let Inst{6}     = 0;
346  let Inst{5-0}   = Operation.Value;
347}
348
349class SPECIAL_2R_FM<OPCODE6 Operation> : MipsR6Inst {
350  bits<5> rd;
351  bits<5> rs;
352
353  bits<32> Inst;
354
355  let Inst{31-26} = OPGROUP_SPECIAL.Value;
356  let Inst{25-21} = rs;
357  let Inst{20-16} = 0b00000;
358  let Inst{15-11} = rd;
359  let Inst{10-6}  = 0b00001;
360  let Inst{5-0}   = Operation.Value;
361}
362
363class SPECIAL_3R_FM<bits<5> mulop, bits<6> funct> : MipsR6Inst {
364  bits<5> rd;
365  bits<5> rs;
366  bits<5> rt;
367
368  bits<32> Inst;
369
370  let Inst{31-26} = OPGROUP_SPECIAL.Value;
371  let Inst{25-21} = rs;
372  let Inst{20-16} = rt;
373  let Inst{15-11} = rd;
374  let Inst{10-6}  = mulop;
375  let Inst{5-0}   = funct;
376}
377
378class SPECIAL_SDBBP_FM : MipsR6Inst {
379  bits<20> code_;
380
381  bits<32> Inst;
382
383  let Inst{31-26} = OPGROUP_SPECIAL.Value;
384  let Inst{25-6}  = code_;
385  let Inst{5-0}   = OPCODE6_SDBBP.Value;
386}
387
388// This class is ambiguous with other branches:
389//   BEQC/BNEC require that rs < rt && rs != 0
390class CMP_BRANCH_2R_OFF16_FM<OPGROUP funct> : MipsR6Inst {
391  bits<5> rs;
392  bits<5> rt;
393  bits<16> offset;
394
395  bits<32> Inst;
396
397  let Inst{31-26} = funct.Value;
398  let Inst{25-21} = rs;
399  let Inst{20-16} = rt;
400  let Inst{15-0} = offset;
401}
402
403// This class is ambiguous with other branches:
404//   BLEZC/BGEZC/BEQZALC/BNEZALC/BGTZALC require that rs == 0 && rt != 0
405// The '1R_RT' in the name means 1 register in the rt field.
406class CMP_BRANCH_1R_RT_OFF16_FM<OPGROUP funct> : MipsR6Inst {
407  bits<5> rt;
408  bits<16> offset;
409
410  bits<32> Inst;
411
412  let Inst{31-26} = funct.Value;
413  let Inst{25-21} = 0b00000;
414  let Inst{20-16} = rt;
415  let Inst{15-0} = offset;
416}
417
418// This class is ambiguous with other branches:
419//   BLTZC/BGTZC/BLTZALC/BGEZALC require that rs == rt && rt != 0
420// The '1R_BOTH' in the name means 1 register in both the rs and rt fields.
421class CMP_BRANCH_1R_BOTH_OFF16_FM<OPGROUP funct> : MipsR6Inst {
422  bits<5> rt;
423  bits<16> offset;
424
425  bits<32> Inst;
426
427  let Inst{31-26} = funct.Value;
428  let Inst{25-21} = rt;
429  let Inst{20-16} = rt;
430  let Inst{15-0} = offset;
431}
432
433class CMP_BRANCH_OFF21_FM<bits<6> funct> : MipsR6Inst {
434  bits<5> rs; // rs != 0
435  bits<21> offset;
436
437  bits<32> Inst;
438
439  let Inst{31-26} = funct;
440  let Inst{25-21} = rs;
441  let Inst{20-0} = offset;
442}
443
444class JMP_IDX_COMPACT_FM<bits<6> funct> : MipsR6Inst {
445  bits<5> rt;
446  bits<16> offset;
447
448  bits<32> Inst;
449
450  let Inst{31-26} = funct;
451  let Inst{25-21} = 0b00000;
452  let Inst{20-16} = rt;
453  let Inst{15-0} = offset;
454}
455
456class BRANCH_OFF26_FM<bits<6> funct> : MipsR6Inst {
457  bits<32> Inst;
458  bits<26> offset;
459
460  let Inst{31-26} = funct;
461  let Inst{25-0} = offset;
462}
463
464class SPECIAL3_ALIGN_FM<OPCODE6 Operation> : MipsR6Inst {
465  bits<5> rd;
466  bits<5> rs;
467  bits<5> rt;
468  bits<2> bp;
469
470  bits<32> Inst;
471
472  let Inst{31-26} = OPGROUP_SPECIAL3.Value;
473  let Inst{25-21} = rs;
474  let Inst{20-16} = rt;
475  let Inst{15-11} = rd;
476  let Inst{10-8}  = 0b010;
477  let Inst{7-6}   = bp;
478  let Inst{5-0}   = Operation.Value;
479}
480
481class SPECIAL3_DALIGN_FM<OPCODE6 Operation> : MipsR6Inst {
482  bits<5> rd;
483  bits<5> rs;
484  bits<5> rt;
485  bits<3> bp;
486
487  bits<32> Inst;
488
489  let Inst{31-26} = OPGROUP_SPECIAL3.Value;
490  let Inst{25-21} = rs;
491  let Inst{20-16} = rt;
492  let Inst{15-11} = rd;
493  let Inst{10-9}  = 0b01;
494  let Inst{8-6}   = bp;
495  let Inst{5-0}   = Operation.Value;
496}
497
498class SPECIAL3_LL_SC_FM<OPCODE6 Operation> : MipsR6Inst {
499  bits<5> rt;
500  bits<21> addr;
501  bits<5> base = addr{20-16};
502  bits<9> offset = addr{8-0};
503
504  bits<32> Inst;
505
506  let Inst{31-26} = OPGROUP_SPECIAL3.Value;
507  let Inst{25-21} = base;
508  let Inst{20-16} = rt;
509  let Inst{15-7} = offset;
510  let Inst{5-0} = Operation.Value;
511
512  string DecoderMethod = "DecodeSpecial3LlSc";
513}
514
515class SPECIAL_LSA_FM<OPCODE6 Operation> : MipsR6Inst {
516  bits<5> rd;
517  bits<5> rs;
518  bits<5> rt;
519  bits<2> imm2;
520
521  bits<32> Inst;
522
523  let Inst{31-26} = OPGROUP_SPECIAL.Value;
524  let Inst{25-21} = rs;
525  let Inst{20-16} = rt;
526  let Inst{15-11} = rd;
527  let Inst{10-8}  = 0b000;
528  let Inst{7-6}   = imm2;
529  let Inst{5-0}   = Operation.Value;
530}
531
532class REGIMM_FM<OPCODE5 Operation> : MipsR6Inst {
533  bits<5> rs;
534  bits<16> imm;
535
536  bits<32> Inst;
537
538  let Inst{31-26} = OPGROUP_REGIMM.Value;
539  let Inst{25-21} = rs;
540  let Inst{20-16} = Operation.Value;
541  let Inst{15-0} = imm;
542}
543
544class COP1_CMP_CONDN_FM<FIELD_CMP_FORMAT Format,
545                        FIELD_CMP_COND Cond> : MipsR6Inst {
546  bits<5> fd;
547  bits<5> fs;
548  bits<5> ft;
549
550  bits<32> Inst;
551
552  let Inst{31-26} = OPGROUP_COP1.Value;
553  let Inst{25-21} = Format.Value;
554  let Inst{20-16} = ft;
555  let Inst{15-11} = fs;
556  let Inst{10-6}  = fd;
557  let Inst{5}     = 0;
558  let Inst{4-0}   = Cond.Value;
559}
560
561class JR_HB_R6_FM<OPCODE6 Operation> : MipsR6Inst {
562  bits<5> rs;
563
564  bits<32> Inst;
565
566  let Inst{31-26} = OPGROUP_SPECIAL.Value;
567  let Inst{25-21} = rs;
568  let Inst{20-16} = 0;
569  let Inst{15-11} = 0;
570  let Inst{10} = 1;
571  let Inst{9-6} = 0;
572  let Inst{5-0} = Operation.Value;
573}
574
575class COP2LDST_FM<OPCODE5 Operation> : MipsR6Inst {
576  bits<5> rt;
577  bits<21> addr;
578  bits<5> base = addr{20-16};
579  bits<11> offset = addr{10-0};
580
581  bits<32> Inst;
582
583  let Inst{31-26} = OPGROUP_COP2LDST.Value;
584  let Inst{25-21} = Operation.Value;
585  let Inst{20-16} = rt;
586  let Inst{15-11} = base;
587  let Inst{10-0}  = offset;
588}
589
590class SPECIAL3_2R_SZ_CRC<bits<2> sz, bits<3> direction> : MipsR6Inst {
591  bits<5> rs;
592  bits<5> rt;
593
594  let Inst{31-26} = OPGROUP_SPECIAL3.Value;
595  let Inst{25-21} = rs;
596  let Inst{20-16} = rt;
597  let Inst{15-11} = 0b00000;
598  let Inst{10-8} = direction;
599  let Inst{7-6} = sz;
600  let Inst{5-0} = 0b001111;
601
602  string DecoderMethod = "DecodeCRC";
603}
604
605class SPECIAL3_GINV<bits<2> ginv> : MipsR6Inst {
606  bits<5> rs;
607  bits<2> type_;
608
609  let Inst{31-26} = OPGROUP_SPECIAL3.Value;
610  let Inst{25-21} = rs;
611  let Inst{20-10} = 0x0;
612  let Inst{9-8}   = type_;
613  let Inst{7-6}   = ginv;
614  let Inst{5-0}   = 0b111101;
615}
616
617class SIGRIE_FM : MipsR6Inst {
618  bits<16> code_;
619
620  let Inst{31-26} = OPGROUP_REGIMM.Value;
621  let Inst{25-21} = 0;
622  let Inst{20-16} = OPCODE5_SIGRIE.Value;
623  let Inst{15-0} = code_;
624}
625