1 //===- Mips16FrameLowering.cpp - Mips16 Frame Information -----------------===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 // 9 // This file contains the Mips16 implementation of TargetFrameLowering class. 10 // 11 //===----------------------------------------------------------------------===// 12 13 #include "Mips16FrameLowering.h" 14 #include "MCTargetDesc/MipsBaseInfo.h" 15 #include "Mips16InstrInfo.h" 16 #include "MipsInstrInfo.h" 17 #include "MipsRegisterInfo.h" 18 #include "MipsSubtarget.h" 19 #include "llvm/ADT/BitVector.h" 20 #include "llvm/CodeGen/MachineBasicBlock.h" 21 #include "llvm/CodeGen/MachineFrameInfo.h" 22 #include "llvm/CodeGen/MachineFunction.h" 23 #include "llvm/CodeGen/MachineInstr.h" 24 #include "llvm/CodeGen/MachineInstrBuilder.h" 25 #include "llvm/CodeGen/MachineModuleInfo.h" 26 #include "llvm/IR/DebugLoc.h" 27 #include "llvm/MC/MCContext.h" 28 #include "llvm/MC/MCDwarf.h" 29 #include "llvm/MC/MCRegisterInfo.h" 30 #include "llvm/MC/MachineLocation.h" 31 #include "llvm/Support/MathExtras.h" 32 #include "llvm/CodeGen/TargetFrameLowering.h" 33 #include <cassert> 34 #include <cstdint> 35 #include <vector> 36 37 using namespace llvm; 38 39 Mips16FrameLowering::Mips16FrameLowering(const MipsSubtarget &STI) 40 : MipsFrameLowering(STI, STI.getStackAlignment()) {} 41 42 void Mips16FrameLowering::emitPrologue(MachineFunction &MF, 43 MachineBasicBlock &MBB) const { 44 MachineFrameInfo &MFI = MF.getFrameInfo(); 45 const Mips16InstrInfo &TII = 46 *static_cast<const Mips16InstrInfo *>(STI.getInstrInfo()); 47 MachineBasicBlock::iterator MBBI = MBB.begin(); 48 49 // Debug location must be unknown since the first debug location is used 50 // to determine the end of the prologue. 51 DebugLoc dl; 52 53 uint64_t StackSize = MFI.getStackSize(); 54 55 // No need to allocate space on the stack. 56 if (StackSize == 0 && !MFI.adjustsStack()) return; 57 58 MachineModuleInfo &MMI = MF.getMMI(); 59 const MCRegisterInfo *MRI = MMI.getContext().getRegisterInfo(); 60 61 // Adjust stack. 62 TII.makeFrame(Mips::SP, StackSize, MBB, MBBI); 63 64 // emit ".cfi_def_cfa_offset StackSize" 65 unsigned CFIIndex = 66 MF.addFrameInst(MCCFIInstruction::cfiDefCfaOffset(nullptr, StackSize)); 67 BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::CFI_INSTRUCTION)) 68 .addCFIIndex(CFIIndex); 69 70 const std::vector<CalleeSavedInfo> &CSI = MFI.getCalleeSavedInfo(); 71 72 if (!CSI.empty()) { 73 const std::vector<CalleeSavedInfo> &CSI = MFI.getCalleeSavedInfo(); 74 75 for (const CalleeSavedInfo &I : CSI) { 76 int64_t Offset = MFI.getObjectOffset(I.getFrameIdx()); 77 Register Reg = I.getReg(); 78 unsigned DReg = MRI->getDwarfRegNum(Reg, true); 79 unsigned CFIIndex = MF.addFrameInst( 80 MCCFIInstruction::createOffset(nullptr, DReg, Offset)); 81 BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::CFI_INSTRUCTION)) 82 .addCFIIndex(CFIIndex); 83 } 84 } 85 if (hasFP(MF)) 86 BuildMI(MBB, MBBI, dl, TII.get(Mips::MoveR3216), Mips::S0) 87 .addReg(Mips::SP).setMIFlag(MachineInstr::FrameSetup); 88 } 89 90 void Mips16FrameLowering::emitEpilogue(MachineFunction &MF, 91 MachineBasicBlock &MBB) const { 92 MachineBasicBlock::iterator MBBI = MBB.getFirstTerminator(); 93 MachineFrameInfo &MFI = MF.getFrameInfo(); 94 const Mips16InstrInfo &TII = 95 *static_cast<const Mips16InstrInfo *>(STI.getInstrInfo()); 96 DebugLoc dl = MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc(); 97 uint64_t StackSize = MFI.getStackSize(); 98 99 if (!StackSize) 100 return; 101 102 if (hasFP(MF)) 103 BuildMI(MBB, MBBI, dl, TII.get(Mips::Move32R16), Mips::SP) 104 .addReg(Mips::S0); 105 106 // Adjust stack. 107 // assumes stacksize multiple of 8 108 TII.restoreFrame(Mips::SP, StackSize, MBB, MBBI); 109 } 110 111 bool Mips16FrameLowering::spillCalleeSavedRegisters( 112 MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, 113 ArrayRef<CalleeSavedInfo> CSI, const TargetRegisterInfo *TRI) const { 114 MachineFunction *MF = MBB.getParent(); 115 116 // 117 // Registers RA, S0,S1 are the callee saved registers and they 118 // will be saved with the "save" instruction 119 // during emitPrologue 120 // 121 for (const CalleeSavedInfo &I : CSI) { 122 // Add the callee-saved register as live-in. Do not add if the register is 123 // RA and return address is taken, because it has already been added in 124 // method MipsTargetLowering::lowerRETURNADDR. 125 // It's killed at the spill, unless the register is RA and return address 126 // is taken. 127 Register Reg = I.getReg(); 128 bool IsRAAndRetAddrIsTaken = (Reg == Mips::RA) 129 && MF->getFrameInfo().isReturnAddressTaken(); 130 if (!IsRAAndRetAddrIsTaken) 131 MBB.addLiveIn(Reg); 132 } 133 134 return true; 135 } 136 137 bool Mips16FrameLowering::restoreCalleeSavedRegisters( 138 MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, 139 MutableArrayRef<CalleeSavedInfo> CSI, const TargetRegisterInfo *TRI) const { 140 // 141 // Registers RA,S0,S1 are the callee saved registers and they will be restored 142 // with the restore instruction during emitEpilogue. 143 // We need to override this virtual function, otherwise llvm will try and 144 // restore the registers on it's on from the stack. 145 // 146 147 return true; 148 } 149 150 bool 151 Mips16FrameLowering::hasReservedCallFrame(const MachineFunction &MF) const { 152 const MachineFrameInfo &MFI = MF.getFrameInfo(); 153 // Reserve call frame if the size of the maximum call frame fits into 15-bit 154 // immediate field and there are no variable sized objects on the stack. 155 return isInt<15>(MFI.getMaxCallFrameSize()) && !MFI.hasVarSizedObjects(); 156 } 157 158 void Mips16FrameLowering::determineCalleeSaves(MachineFunction &MF, 159 BitVector &SavedRegs, 160 RegScavenger *RS) const { 161 TargetFrameLowering::determineCalleeSaves(MF, SavedRegs, RS); 162 const Mips16InstrInfo &TII = 163 *static_cast<const Mips16InstrInfo *>(STI.getInstrInfo()); 164 const MipsRegisterInfo &RI = TII.getRegisterInfo(); 165 const BitVector Reserved = RI.getReservedRegs(MF); 166 bool SaveS2 = Reserved[Mips::S2]; 167 if (SaveS2) 168 SavedRegs.set(Mips::S2); 169 if (hasFP(MF)) 170 SavedRegs.set(Mips::S0); 171 } 172 173 const MipsFrameLowering * 174 llvm::createMips16FrameLowering(const MipsSubtarget &ST) { 175 return new Mips16FrameLowering(ST); 176 } 177