xref: /freebsd/contrib/llvm-project/llvm/lib/Target/Mips/Mips.h (revision 0fca6ea1d4eea4c934cfff25ac9ee8ad6fe95583)
10b57cec5SDimitry Andric //===-- Mips.h - Top-level interface for Mips representation ----*- C++ -*-===//
20b57cec5SDimitry Andric //
30b57cec5SDimitry Andric // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
40b57cec5SDimitry Andric // See https://llvm.org/LICENSE.txt for license information.
50b57cec5SDimitry Andric // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
60b57cec5SDimitry Andric //
70b57cec5SDimitry Andric //===----------------------------------------------------------------------===//
80b57cec5SDimitry Andric //
90b57cec5SDimitry Andric // This file contains the entry points for global functions defined in
100b57cec5SDimitry Andric // the LLVM Mips back-end.
110b57cec5SDimitry Andric //
120b57cec5SDimitry Andric //===----------------------------------------------------------------------===//
130b57cec5SDimitry Andric 
140b57cec5SDimitry Andric #ifndef LLVM_LIB_TARGET_MIPS_MIPS_H
150b57cec5SDimitry Andric #define LLVM_LIB_TARGET_MIPS_MIPS_H
160b57cec5SDimitry Andric 
170b57cec5SDimitry Andric #include "MCTargetDesc/MipsMCTargetDesc.h"
180b57cec5SDimitry Andric #include "llvm/Target/TargetMachine.h"
190b57cec5SDimitry Andric 
200b57cec5SDimitry Andric namespace llvm {
210b57cec5SDimitry Andric class FunctionPass;
22bdd1243dSDimitry Andric class InstructionSelector;
230b57cec5SDimitry Andric class MipsRegisterBankInfo;
240b57cec5SDimitry Andric class MipsSubtarget;
250b57cec5SDimitry Andric class MipsTargetMachine;
26bdd1243dSDimitry Andric class MipsTargetMachine;
27bdd1243dSDimitry Andric class ModulePass;
280b57cec5SDimitry Andric class PassRegistry;
290b57cec5SDimitry Andric 
300b57cec5SDimitry Andric ModulePass *createMipsOs16Pass();
310b57cec5SDimitry Andric ModulePass *createMips16HardFloatPass();
320b57cec5SDimitry Andric 
330b57cec5SDimitry Andric FunctionPass *createMipsModuleISelDagPass();
340b57cec5SDimitry Andric FunctionPass *createMipsOptimizePICCallPass();
350b57cec5SDimitry Andric FunctionPass *createMipsDelaySlotFillerPass();
360b57cec5SDimitry Andric FunctionPass *createMipsBranchExpansion();
370b57cec5SDimitry Andric FunctionPass *createMipsConstantIslandPass();
380b57cec5SDimitry Andric FunctionPass *createMicroMipsSizeReducePass();
390b57cec5SDimitry Andric FunctionPass *createMipsExpandPseudoPass();
400b57cec5SDimitry Andric FunctionPass *createMipsPreLegalizeCombiner();
4181ad6265SDimitry Andric FunctionPass *createMipsPostLegalizeCombiner(bool IsOptNone);
4204eeddc0SDimitry Andric FunctionPass *createMipsMulMulBugPass();
430b57cec5SDimitry Andric 
44*0fca6ea1SDimitry Andric InstructionSelector *
45*0fca6ea1SDimitry Andric createMipsInstructionSelector(const MipsTargetMachine &, const MipsSubtarget &,
46*0fca6ea1SDimitry Andric                               const MipsRegisterBankInfo &);
470b57cec5SDimitry Andric 
480b57cec5SDimitry Andric void initializeMicroMipsSizeReducePass(PassRegistry &);
49bdd1243dSDimitry Andric void initializeMipsBranchExpansionPass(PassRegistry &);
50*0fca6ea1SDimitry Andric void initializeMipsDAGToDAGISelLegacyPass(PassRegistry &);
51bdd1243dSDimitry Andric void initializeMipsDelaySlotFillerPass(PassRegistry &);
5204eeddc0SDimitry Andric void initializeMipsMulMulBugFixPass(PassRegistry &);
53bdd1243dSDimitry Andric void initializeMipsPostLegalizerCombinerPass(PassRegistry &);
54bdd1243dSDimitry Andric void initializeMipsPreLegalizerCombinerPass(PassRegistry &);
55bdd1243dSDimitry Andric } // namespace llvm
560b57cec5SDimitry Andric 
570b57cec5SDimitry Andric #endif
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