1 //===-- MipsELFObjectWriter.cpp - Mips ELF Writer -------------------------===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 9 #include "MCTargetDesc/MipsFixupKinds.h" 10 #include "MCTargetDesc/MipsMCTargetDesc.h" 11 #include "llvm/ADT/STLExtras.h" 12 #include "llvm/BinaryFormat/ELF.h" 13 #include "llvm/MC/MCContext.h" 14 #include "llvm/MC/MCELFObjectWriter.h" 15 #include "llvm/MC/MCFixup.h" 16 #include "llvm/MC/MCObjectWriter.h" 17 #include "llvm/MC/MCSymbolELF.h" 18 #include "llvm/Support/Casting.h" 19 #include "llvm/Support/Compiler.h" 20 #include "llvm/Support/Debug.h" 21 #include "llvm/Support/ErrorHandling.h" 22 #include "llvm/Support/MathExtras.h" 23 #include "llvm/Support/raw_ostream.h" 24 #include <algorithm> 25 #include <cassert> 26 #include <cstdint> 27 #include <iterator> 28 #include <list> 29 #include <utility> 30 31 #define DEBUG_TYPE "mips-elf-object-writer" 32 33 using namespace llvm; 34 35 namespace { 36 37 /// Holds additional information needed by the relocation ordering algorithm. 38 struct MipsRelocationEntry { 39 const ELFRelocationEntry R; ///< The relocation. 40 bool Matched = false; ///< Is this relocation part of a match. 41 42 MipsRelocationEntry(const ELFRelocationEntry &R) : R(R) {} 43 44 void print(raw_ostream &Out) const { 45 R.print(Out); 46 Out << ", Matched=" << Matched; 47 } 48 }; 49 50 #ifndef NDEBUG 51 raw_ostream &operator<<(raw_ostream &OS, const MipsRelocationEntry &RHS) { 52 RHS.print(OS); 53 return OS; 54 } 55 #endif 56 57 class MipsELFObjectWriter : public MCELFObjectTargetWriter { 58 public: 59 MipsELFObjectWriter(uint8_t OSABI, bool HasRelocationAddend, bool Is64); 60 61 ~MipsELFObjectWriter() override = default; 62 63 unsigned getRelocType(MCContext &Ctx, const MCValue &Target, 64 const MCFixup &Fixup, bool IsPCRel) const override; 65 bool needsRelocateWithSymbol(const MCSymbol &Sym, 66 unsigned Type) const override; 67 void sortRelocs(const MCAssembler &Asm, 68 std::vector<ELFRelocationEntry> &Relocs) override; 69 }; 70 71 /// The possible results of the Predicate function used by find_best. 72 enum FindBestPredicateResult { 73 FindBest_NoMatch = 0, ///< The current element is not a match. 74 FindBest_Match, ///< The current element is a match but better ones are 75 /// possible. 76 FindBest_PerfectMatch, ///< The current element is an unbeatable match. 77 }; 78 79 } // end anonymous namespace 80 81 /// Copy elements in the range [First, Last) to d1 when the predicate is true or 82 /// d2 when the predicate is false. This is essentially both std::copy_if and 83 /// std::remove_copy_if combined into a single pass. 84 template <class InputIt, class OutputIt1, class OutputIt2, class UnaryPredicate> 85 static std::pair<OutputIt1, OutputIt2> copy_if_else(InputIt First, InputIt Last, 86 OutputIt1 d1, OutputIt2 d2, 87 UnaryPredicate Predicate) { 88 for (InputIt I = First; I != Last; ++I) { 89 if (Predicate(*I)) { 90 *d1 = *I; 91 d1++; 92 } else { 93 *d2 = *I; 94 d2++; 95 } 96 } 97 98 return std::make_pair(d1, d2); 99 } 100 101 /// Find the best match in the range [First, Last). 102 /// 103 /// An element matches when Predicate(X) returns FindBest_Match or 104 /// FindBest_PerfectMatch. A value of FindBest_PerfectMatch also terminates 105 /// the search. BetterThan(A, B) is a comparator that returns true when A is a 106 /// better match than B. The return value is the position of the best match. 107 /// 108 /// This is similar to std::find_if but finds the best of multiple possible 109 /// matches. 110 template <class InputIt, class UnaryPredicate, class Comparator> 111 static InputIt find_best(InputIt First, InputIt Last, UnaryPredicate Predicate, 112 Comparator BetterThan) { 113 InputIt Best = Last; 114 115 for (InputIt I = First; I != Last; ++I) { 116 unsigned Matched = Predicate(*I); 117 if (Matched != FindBest_NoMatch) { 118 LLVM_DEBUG(dbgs() << std::distance(First, I) << " is a match ("; 119 I->print(dbgs()); dbgs() << ")\n"); 120 if (Best == Last || BetterThan(*I, *Best)) { 121 LLVM_DEBUG(dbgs() << ".. and it beats the last one\n"); 122 Best = I; 123 } 124 } 125 if (Matched == FindBest_PerfectMatch) { 126 LLVM_DEBUG(dbgs() << ".. and it is unbeatable\n"); 127 break; 128 } 129 } 130 131 return Best; 132 } 133 134 /// Determine the low relocation that matches the given relocation. 135 /// If the relocation does not need a low relocation then the return value 136 /// is ELF::R_MIPS_NONE. 137 /// 138 /// The relocations that need a matching low part are 139 /// R_(MIPS|MICROMIPS|MIPS16)_HI16 for all symbols and 140 /// R_(MIPS|MICROMIPS|MIPS16)_GOT16 for local symbols only. 141 static unsigned getMatchingLoType(const ELFRelocationEntry &Reloc) { 142 unsigned Type = Reloc.Type; 143 if (Type == ELF::R_MIPS_HI16) 144 return ELF::R_MIPS_LO16; 145 if (Type == ELF::R_MICROMIPS_HI16) 146 return ELF::R_MICROMIPS_LO16; 147 if (Type == ELF::R_MIPS16_HI16) 148 return ELF::R_MIPS16_LO16; 149 150 if (Reloc.OriginalSymbol && 151 Reloc.OriginalSymbol->getBinding() != ELF::STB_LOCAL) 152 return ELF::R_MIPS_NONE; 153 154 if (Type == ELF::R_MIPS_GOT16) 155 return ELF::R_MIPS_LO16; 156 if (Type == ELF::R_MICROMIPS_GOT16) 157 return ELF::R_MICROMIPS_LO16; 158 if (Type == ELF::R_MIPS16_GOT16) 159 return ELF::R_MIPS16_LO16; 160 161 return ELF::R_MIPS_NONE; 162 } 163 164 /// Determine whether a relocation (X) matches the one given in R. 165 /// 166 /// A relocation matches if: 167 /// - It's type matches that of a corresponding low part. This is provided in 168 /// MatchingType for efficiency. 169 /// - It's based on the same symbol. 170 /// - It's offset of greater or equal to that of the one given in R. 171 /// It should be noted that this rule assumes the programmer does not use 172 /// offsets that exceed the alignment of the symbol. The carry-bit will be 173 /// incorrect if this is not true. 174 /// 175 /// A matching relocation is unbeatable if: 176 /// - It is not already involved in a match. 177 /// - It's offset is exactly that of the one given in R. 178 static FindBestPredicateResult isMatchingReloc(const MipsRelocationEntry &X, 179 const ELFRelocationEntry &R, 180 unsigned MatchingType) { 181 if (X.R.Type == MatchingType && X.R.OriginalSymbol == R.OriginalSymbol) { 182 if (!X.Matched && 183 X.R.OriginalAddend == R.OriginalAddend) 184 return FindBest_PerfectMatch; 185 else if (X.R.OriginalAddend >= R.OriginalAddend) 186 return FindBest_Match; 187 } 188 return FindBest_NoMatch; 189 } 190 191 /// Determine whether Candidate or PreviousBest is the better match. 192 /// The return value is true if Candidate is the better match. 193 /// 194 /// A matching relocation is a better match if: 195 /// - It has a smaller addend. 196 /// - It is not already involved in a match. 197 static bool compareMatchingRelocs(const MipsRelocationEntry &Candidate, 198 const MipsRelocationEntry &PreviousBest) { 199 if (Candidate.R.OriginalAddend != PreviousBest.R.OriginalAddend) 200 return Candidate.R.OriginalAddend < PreviousBest.R.OriginalAddend; 201 return PreviousBest.Matched && !Candidate.Matched; 202 } 203 204 #ifndef NDEBUG 205 /// Print all the relocations. 206 template <class Container> 207 static void dumpRelocs(const char *Prefix, const Container &Relocs) { 208 for (const auto &R : Relocs) 209 dbgs() << Prefix << R << "\n"; 210 } 211 #endif 212 213 MipsELFObjectWriter::MipsELFObjectWriter(uint8_t OSABI, 214 bool HasRelocationAddend, bool Is64) 215 : MCELFObjectTargetWriter(Is64, OSABI, ELF::EM_MIPS, HasRelocationAddend) {} 216 217 unsigned MipsELFObjectWriter::getRelocType(MCContext &Ctx, 218 const MCValue &Target, 219 const MCFixup &Fixup, 220 bool IsPCRel) const { 221 // Determine the type of the relocation. 222 unsigned Kind = Fixup.getTargetKind(); 223 224 switch (Kind) { 225 case FK_NONE: 226 return ELF::R_MIPS_NONE; 227 case FK_Data_1: 228 Ctx.reportError(Fixup.getLoc(), 229 "MIPS does not support one byte relocations"); 230 return ELF::R_MIPS_NONE; 231 case Mips::fixup_Mips_16: 232 case FK_Data_2: 233 return IsPCRel ? ELF::R_MIPS_PC16 : ELF::R_MIPS_16; 234 case Mips::fixup_Mips_32: 235 case FK_Data_4: 236 return IsPCRel ? ELF::R_MIPS_PC32 : ELF::R_MIPS_32; 237 case Mips::fixup_Mips_64: 238 case FK_Data_8: 239 return IsPCRel 240 ? setRTypes(ELF::R_MIPS_PC32, ELF::R_MIPS_64, ELF::R_MIPS_NONE) 241 : (unsigned)ELF::R_MIPS_64; 242 } 243 244 if (IsPCRel) { 245 switch (Kind) { 246 case Mips::fixup_Mips_Branch_PCRel: 247 case Mips::fixup_Mips_PC16: 248 return ELF::R_MIPS_PC16; 249 case Mips::fixup_MICROMIPS_PC7_S1: 250 return ELF::R_MICROMIPS_PC7_S1; 251 case Mips::fixup_MICROMIPS_PC10_S1: 252 return ELF::R_MICROMIPS_PC10_S1; 253 case Mips::fixup_MICROMIPS_PC16_S1: 254 return ELF::R_MICROMIPS_PC16_S1; 255 case Mips::fixup_MICROMIPS_PC26_S1: 256 return ELF::R_MICROMIPS_PC26_S1; 257 case Mips::fixup_MICROMIPS_PC19_S2: 258 return ELF::R_MICROMIPS_PC19_S2; 259 case Mips::fixup_MICROMIPS_PC18_S3: 260 return ELF::R_MICROMIPS_PC18_S3; 261 case Mips::fixup_MICROMIPS_PC21_S1: 262 return ELF::R_MICROMIPS_PC21_S1; 263 case Mips::fixup_MIPS_PC19_S2: 264 return ELF::R_MIPS_PC19_S2; 265 case Mips::fixup_MIPS_PC18_S3: 266 return ELF::R_MIPS_PC18_S3; 267 case Mips::fixup_MIPS_PC21_S2: 268 return ELF::R_MIPS_PC21_S2; 269 case Mips::fixup_MIPS_PC26_S2: 270 return ELF::R_MIPS_PC26_S2; 271 case Mips::fixup_MIPS_PCHI16: 272 return ELF::R_MIPS_PCHI16; 273 case Mips::fixup_MIPS_PCLO16: 274 return ELF::R_MIPS_PCLO16; 275 } 276 277 llvm_unreachable("invalid PC-relative fixup kind!"); 278 } 279 280 switch (Kind) { 281 case FK_DTPRel_4: 282 return ELF::R_MIPS_TLS_DTPREL32; 283 case FK_DTPRel_8: 284 return ELF::R_MIPS_TLS_DTPREL64; 285 case FK_TPRel_4: 286 return ELF::R_MIPS_TLS_TPREL32; 287 case FK_TPRel_8: 288 return ELF::R_MIPS_TLS_TPREL64; 289 case FK_GPRel_4: 290 return setRTypes(ELF::R_MIPS_GPREL32, 291 is64Bit() ? ELF::R_MIPS_64 : ELF::R_MIPS_NONE, 292 ELF::R_MIPS_NONE); 293 case Mips::fixup_Mips_GPREL16: 294 return ELF::R_MIPS_GPREL16; 295 case Mips::fixup_Mips_26: 296 return ELF::R_MIPS_26; 297 case Mips::fixup_Mips_CALL16: 298 return ELF::R_MIPS_CALL16; 299 case Mips::fixup_Mips_GOT: 300 return ELF::R_MIPS_GOT16; 301 case Mips::fixup_Mips_HI16: 302 return ELF::R_MIPS_HI16; 303 case Mips::fixup_Mips_LO16: 304 return ELF::R_MIPS_LO16; 305 case Mips::fixup_Mips_TLSGD: 306 return ELF::R_MIPS_TLS_GD; 307 case Mips::fixup_Mips_GOTTPREL: 308 return ELF::R_MIPS_TLS_GOTTPREL; 309 case Mips::fixup_Mips_TPREL_HI: 310 return ELF::R_MIPS_TLS_TPREL_HI16; 311 case Mips::fixup_Mips_TPREL_LO: 312 return ELF::R_MIPS_TLS_TPREL_LO16; 313 case Mips::fixup_Mips_TLSLDM: 314 return ELF::R_MIPS_TLS_LDM; 315 case Mips::fixup_Mips_DTPREL_HI: 316 return ELF::R_MIPS_TLS_DTPREL_HI16; 317 case Mips::fixup_Mips_DTPREL_LO: 318 return ELF::R_MIPS_TLS_DTPREL_LO16; 319 case Mips::fixup_Mips_GOT_PAGE: 320 return ELF::R_MIPS_GOT_PAGE; 321 case Mips::fixup_Mips_GOT_OFST: 322 return ELF::R_MIPS_GOT_OFST; 323 case Mips::fixup_Mips_GOT_DISP: 324 return ELF::R_MIPS_GOT_DISP; 325 case Mips::fixup_Mips_GPOFF_HI: 326 return setRTypes(ELF::R_MIPS_GPREL16, ELF::R_MIPS_SUB, ELF::R_MIPS_HI16); 327 case Mips::fixup_MICROMIPS_GPOFF_HI: 328 return setRTypes(ELF::R_MICROMIPS_GPREL16, ELF::R_MICROMIPS_SUB, 329 ELF::R_MICROMIPS_HI16); 330 case Mips::fixup_Mips_GPOFF_LO: 331 return setRTypes(ELF::R_MIPS_GPREL16, ELF::R_MIPS_SUB, ELF::R_MIPS_LO16); 332 case Mips::fixup_MICROMIPS_GPOFF_LO: 333 return setRTypes(ELF::R_MICROMIPS_GPREL16, ELF::R_MICROMIPS_SUB, 334 ELF::R_MICROMIPS_LO16); 335 case Mips::fixup_Mips_HIGHER: 336 return ELF::R_MIPS_HIGHER; 337 case Mips::fixup_Mips_HIGHEST: 338 return ELF::R_MIPS_HIGHEST; 339 case Mips::fixup_Mips_SUB: 340 return ELF::R_MIPS_SUB; 341 case Mips::fixup_Mips_GOT_HI16: 342 return ELF::R_MIPS_GOT_HI16; 343 case Mips::fixup_Mips_GOT_LO16: 344 return ELF::R_MIPS_GOT_LO16; 345 case Mips::fixup_Mips_CALL_HI16: 346 return ELF::R_MIPS_CALL_HI16; 347 case Mips::fixup_Mips_CALL_LO16: 348 return ELF::R_MIPS_CALL_LO16; 349 case Mips::fixup_MICROMIPS_26_S1: 350 return ELF::R_MICROMIPS_26_S1; 351 case Mips::fixup_MICROMIPS_HI16: 352 return ELF::R_MICROMIPS_HI16; 353 case Mips::fixup_MICROMIPS_LO16: 354 return ELF::R_MICROMIPS_LO16; 355 case Mips::fixup_MICROMIPS_GOT16: 356 return ELF::R_MICROMIPS_GOT16; 357 case Mips::fixup_MICROMIPS_CALL16: 358 return ELF::R_MICROMIPS_CALL16; 359 case Mips::fixup_MICROMIPS_GOT_DISP: 360 return ELF::R_MICROMIPS_GOT_DISP; 361 case Mips::fixup_MICROMIPS_GOT_PAGE: 362 return ELF::R_MICROMIPS_GOT_PAGE; 363 case Mips::fixup_MICROMIPS_GOT_OFST: 364 return ELF::R_MICROMIPS_GOT_OFST; 365 case Mips::fixup_MICROMIPS_TLS_GD: 366 return ELF::R_MICROMIPS_TLS_GD; 367 case Mips::fixup_MICROMIPS_TLS_LDM: 368 return ELF::R_MICROMIPS_TLS_LDM; 369 case Mips::fixup_MICROMIPS_TLS_DTPREL_HI16: 370 return ELF::R_MICROMIPS_TLS_DTPREL_HI16; 371 case Mips::fixup_MICROMIPS_TLS_DTPREL_LO16: 372 return ELF::R_MICROMIPS_TLS_DTPREL_LO16; 373 case Mips::fixup_MICROMIPS_GOTTPREL: 374 return ELF::R_MICROMIPS_TLS_GOTTPREL; 375 case Mips::fixup_MICROMIPS_TLS_TPREL_HI16: 376 return ELF::R_MICROMIPS_TLS_TPREL_HI16; 377 case Mips::fixup_MICROMIPS_TLS_TPREL_LO16: 378 return ELF::R_MICROMIPS_TLS_TPREL_LO16; 379 case Mips::fixup_MICROMIPS_SUB: 380 return ELF::R_MICROMIPS_SUB; 381 case Mips::fixup_MICROMIPS_HIGHER: 382 return ELF::R_MICROMIPS_HIGHER; 383 case Mips::fixup_MICROMIPS_HIGHEST: 384 return ELF::R_MICROMIPS_HIGHEST; 385 case Mips::fixup_Mips_JALR: 386 return ELF::R_MIPS_JALR; 387 case Mips::fixup_MICROMIPS_JALR: 388 return ELF::R_MICROMIPS_JALR; 389 } 390 391 llvm_unreachable("invalid fixup kind!"); 392 } 393 394 /// Sort relocation table entries by offset except where another order is 395 /// required by the MIPS ABI. 396 /// 397 /// MIPS has a few relocations that have an AHL component in the expression used 398 /// to evaluate them. This AHL component is an addend with the same number of 399 /// bits as a symbol value but not all of our ABI's are able to supply a 400 /// sufficiently sized addend in a single relocation. 401 /// 402 /// The O32 ABI for example, uses REL relocations which store the addend in the 403 /// section data. All the relocations with AHL components affect 16-bit fields 404 /// so the addend for a single relocation is limited to 16-bit. This ABI 405 /// resolves the limitation by linking relocations (e.g. R_MIPS_HI16 and 406 /// R_MIPS_LO16) and distributing the addend between the linked relocations. The 407 /// ABI mandates that such relocations must be next to each other in a 408 /// particular order (e.g. R_MIPS_HI16 must be immediately followed by a 409 /// matching R_MIPS_LO16) but the rule is less strict in practice. 410 /// 411 /// The de facto standard is lenient in the following ways: 412 /// - 'Immediately following' does not refer to the next relocation entry but 413 /// the next matching relocation. 414 /// - There may be multiple high parts relocations for one low part relocation. 415 /// - There may be multiple low part relocations for one high part relocation. 416 /// - The AHL addend in each part does not have to be exactly equal as long as 417 /// the difference does not affect the carry bit from bit 15 into 16. This is 418 /// to allow, for example, the use of %lo(foo) and %lo(foo+4) when loading 419 /// both halves of a long long. 420 /// 421 /// See getMatchingLoType() for a description of which high part relocations 422 /// match which low part relocations. One particular thing to note is that 423 /// R_MIPS_GOT16 and similar only have AHL addends if they refer to local 424 /// symbols. 425 /// 426 /// It should also be noted that this function is not affected by whether 427 /// the symbol was kept or rewritten into a section-relative equivalent. We 428 /// always match using the expressions from the source. 429 void MipsELFObjectWriter::sortRelocs(const MCAssembler &Asm, 430 std::vector<ELFRelocationEntry> &Relocs) { 431 // We do not need to sort the relocation table for RELA relocations which 432 // N32/N64 uses as the relocation addend contains the value we require, 433 // rather than it being split across a pair of relocations. 434 if (hasRelocationAddend()) 435 return; 436 437 if (Relocs.size() < 2) 438 return; 439 440 // Sort relocations by the address they are applied to. 441 llvm::sort(Relocs, 442 [](const ELFRelocationEntry &A, const ELFRelocationEntry &B) { 443 return A.Offset < B.Offset; 444 }); 445 446 std::list<MipsRelocationEntry> Sorted; 447 std::list<ELFRelocationEntry> Remainder; 448 449 LLVM_DEBUG(dumpRelocs("R: ", Relocs)); 450 451 // Separate the movable relocations (AHL relocations using the high bits) from 452 // the immobile relocations (everything else). This does not preserve high/low 453 // matches that already existed in the input. 454 copy_if_else(Relocs.begin(), Relocs.end(), std::back_inserter(Remainder), 455 std::back_inserter(Sorted), [](const ELFRelocationEntry &Reloc) { 456 return getMatchingLoType(Reloc) != ELF::R_MIPS_NONE; 457 }); 458 459 for (auto &R : Remainder) { 460 LLVM_DEBUG(dbgs() << "Matching: " << R << "\n"); 461 462 unsigned MatchingType = getMatchingLoType(R); 463 assert(MatchingType != ELF::R_MIPS_NONE && 464 "Wrong list for reloc that doesn't need a match"); 465 466 // Find the best matching relocation for the current high part. 467 // See isMatchingReloc for a description of a matching relocation and 468 // compareMatchingRelocs for a description of what 'best' means. 469 auto InsertionPoint = 470 find_best(Sorted.begin(), Sorted.end(), 471 [&R, &MatchingType](const MipsRelocationEntry &X) { 472 return isMatchingReloc(X, R, MatchingType); 473 }, 474 compareMatchingRelocs); 475 476 // If we matched then insert the high part in front of the match and mark 477 // both relocations as being involved in a match. We only mark the high 478 // part for cosmetic reasons in the debug output. 479 // 480 // If we failed to find a match then the high part is orphaned. This is not 481 // permitted since the relocation cannot be evaluated without knowing the 482 // carry-in. We can sometimes handle this using a matching low part that is 483 // already used in a match but we already cover that case in 484 // isMatchingReloc and compareMatchingRelocs. For the remaining cases we 485 // should insert the high part at the end of the list. This will cause the 486 // linker to fail but the alternative is to cause the linker to bind the 487 // high part to a semi-matching low part and silently calculate the wrong 488 // value. Unfortunately we have no means to warn the user that we did this 489 // so leave it up to the linker to complain about it. 490 if (InsertionPoint != Sorted.end()) 491 InsertionPoint->Matched = true; 492 Sorted.insert(InsertionPoint, R)->Matched = true; 493 } 494 495 LLVM_DEBUG(dumpRelocs("S: ", Sorted)); 496 497 assert(Relocs.size() == Sorted.size() && "Some relocs were not consumed"); 498 499 // Overwrite the original vector with the sorted elements. The caller expects 500 // them in reverse order. 501 unsigned CopyTo = 0; 502 for (const auto &R : reverse(Sorted)) 503 Relocs[CopyTo++] = R.R; 504 } 505 506 bool MipsELFObjectWriter::needsRelocateWithSymbol(const MCSymbol &Sym, 507 unsigned Type) const { 508 // If it's a compound relocation for N64 then we need the relocation if any 509 // sub-relocation needs it. 510 if (!isUInt<8>(Type)) 511 return needsRelocateWithSymbol(Sym, Type & 0xff) || 512 needsRelocateWithSymbol(Sym, (Type >> 8) & 0xff) || 513 needsRelocateWithSymbol(Sym, (Type >> 16) & 0xff); 514 515 switch (Type) { 516 default: 517 errs() << Type << "\n"; 518 llvm_unreachable("Unexpected relocation"); 519 return true; 520 521 // This relocation doesn't affect the section data. 522 case ELF::R_MIPS_NONE: 523 return false; 524 525 // On REL ABI's (e.g. O32), these relocations form pairs. The pairing is done 526 // by the static linker by matching the symbol and offset. 527 // We only see one relocation at a time but it's still safe to relocate with 528 // the section so long as both relocations make the same decision. 529 // 530 // Some older linkers may require the symbol for particular cases. Such cases 531 // are not supported yet but can be added as required. 532 case ELF::R_MIPS_GOT16: 533 case ELF::R_MIPS16_GOT16: 534 case ELF::R_MICROMIPS_GOT16: 535 case ELF::R_MIPS_HIGHER: 536 case ELF::R_MIPS_HIGHEST: 537 case ELF::R_MIPS_HI16: 538 case ELF::R_MIPS16_HI16: 539 case ELF::R_MICROMIPS_HI16: 540 case ELF::R_MIPS_LO16: 541 case ELF::R_MIPS16_LO16: 542 case ELF::R_MICROMIPS_LO16: 543 // FIXME: It should be safe to return false for the STO_MIPS_MICROMIPS but 544 // we neglect to handle the adjustment to the LSB of the addend that 545 // it causes in applyFixup() and similar. 546 if (cast<MCSymbolELF>(Sym).getOther() & ELF::STO_MIPS_MICROMIPS) 547 return true; 548 return false; 549 550 case ELF::R_MIPS_GOT_PAGE: 551 case ELF::R_MICROMIPS_GOT_PAGE: 552 case ELF::R_MIPS_GOT_OFST: 553 case ELF::R_MICROMIPS_GOT_OFST: 554 case ELF::R_MIPS_16: 555 case ELF::R_MIPS_32: 556 case ELF::R_MIPS_GPREL32: 557 if (cast<MCSymbolELF>(Sym).getOther() & ELF::STO_MIPS_MICROMIPS) 558 return true; 559 LLVM_FALLTHROUGH; 560 case ELF::R_MIPS_26: 561 case ELF::R_MIPS_64: 562 case ELF::R_MIPS_GPREL16: 563 case ELF::R_MIPS_PC16: 564 case ELF::R_MIPS_SUB: 565 return false; 566 567 // FIXME: Many of these relocations should probably return false but this 568 // hasn't been confirmed to be safe yet. 569 case ELF::R_MIPS_REL32: 570 case ELF::R_MIPS_LITERAL: 571 case ELF::R_MIPS_CALL16: 572 case ELF::R_MIPS_SHIFT5: 573 case ELF::R_MIPS_SHIFT6: 574 case ELF::R_MIPS_GOT_DISP: 575 case ELF::R_MIPS_GOT_HI16: 576 case ELF::R_MIPS_GOT_LO16: 577 case ELF::R_MIPS_INSERT_A: 578 case ELF::R_MIPS_INSERT_B: 579 case ELF::R_MIPS_DELETE: 580 case ELF::R_MIPS_CALL_HI16: 581 case ELF::R_MIPS_CALL_LO16: 582 case ELF::R_MIPS_SCN_DISP: 583 case ELF::R_MIPS_REL16: 584 case ELF::R_MIPS_ADD_IMMEDIATE: 585 case ELF::R_MIPS_PJUMP: 586 case ELF::R_MIPS_RELGOT: 587 case ELF::R_MIPS_JALR: 588 case ELF::R_MIPS_TLS_DTPMOD32: 589 case ELF::R_MIPS_TLS_DTPREL32: 590 case ELF::R_MIPS_TLS_DTPMOD64: 591 case ELF::R_MIPS_TLS_DTPREL64: 592 case ELF::R_MIPS_TLS_GD: 593 case ELF::R_MIPS_TLS_LDM: 594 case ELF::R_MIPS_TLS_DTPREL_HI16: 595 case ELF::R_MIPS_TLS_DTPREL_LO16: 596 case ELF::R_MIPS_TLS_GOTTPREL: 597 case ELF::R_MIPS_TLS_TPREL32: 598 case ELF::R_MIPS_TLS_TPREL64: 599 case ELF::R_MIPS_TLS_TPREL_HI16: 600 case ELF::R_MIPS_TLS_TPREL_LO16: 601 case ELF::R_MIPS_GLOB_DAT: 602 case ELF::R_MIPS_PC21_S2: 603 case ELF::R_MIPS_PC26_S2: 604 case ELF::R_MIPS_PC18_S3: 605 case ELF::R_MIPS_PC19_S2: 606 case ELF::R_MIPS_PCHI16: 607 case ELF::R_MIPS_PCLO16: 608 case ELF::R_MIPS_COPY: 609 case ELF::R_MIPS_JUMP_SLOT: 610 case ELF::R_MIPS_NUM: 611 case ELF::R_MIPS_PC32: 612 case ELF::R_MIPS_EH: 613 case ELF::R_MICROMIPS_26_S1: 614 case ELF::R_MICROMIPS_GPREL16: 615 case ELF::R_MICROMIPS_LITERAL: 616 case ELF::R_MICROMIPS_PC7_S1: 617 case ELF::R_MICROMIPS_PC10_S1: 618 case ELF::R_MICROMIPS_PC16_S1: 619 case ELF::R_MICROMIPS_CALL16: 620 case ELF::R_MICROMIPS_GOT_DISP: 621 case ELF::R_MICROMIPS_GOT_HI16: 622 case ELF::R_MICROMIPS_GOT_LO16: 623 case ELF::R_MICROMIPS_SUB: 624 case ELF::R_MICROMIPS_HIGHER: 625 case ELF::R_MICROMIPS_HIGHEST: 626 case ELF::R_MICROMIPS_CALL_HI16: 627 case ELF::R_MICROMIPS_CALL_LO16: 628 case ELF::R_MICROMIPS_SCN_DISP: 629 case ELF::R_MICROMIPS_JALR: 630 case ELF::R_MICROMIPS_HI0_LO16: 631 case ELF::R_MICROMIPS_TLS_GD: 632 case ELF::R_MICROMIPS_TLS_LDM: 633 case ELF::R_MICROMIPS_TLS_DTPREL_HI16: 634 case ELF::R_MICROMIPS_TLS_DTPREL_LO16: 635 case ELF::R_MICROMIPS_TLS_GOTTPREL: 636 case ELF::R_MICROMIPS_TLS_TPREL_HI16: 637 case ELF::R_MICROMIPS_TLS_TPREL_LO16: 638 case ELF::R_MICROMIPS_GPREL7_S2: 639 case ELF::R_MICROMIPS_PC23_S2: 640 case ELF::R_MICROMIPS_PC21_S1: 641 case ELF::R_MICROMIPS_PC26_S1: 642 case ELF::R_MICROMIPS_PC18_S3: 643 case ELF::R_MICROMIPS_PC19_S2: 644 return true; 645 646 // FIXME: Many of these should probably return false but MIPS16 isn't 647 // supported by the integrated assembler. 648 case ELF::R_MIPS16_26: 649 case ELF::R_MIPS16_GPREL: 650 case ELF::R_MIPS16_CALL16: 651 case ELF::R_MIPS16_TLS_GD: 652 case ELF::R_MIPS16_TLS_LDM: 653 case ELF::R_MIPS16_TLS_DTPREL_HI16: 654 case ELF::R_MIPS16_TLS_DTPREL_LO16: 655 case ELF::R_MIPS16_TLS_GOTTPREL: 656 case ELF::R_MIPS16_TLS_TPREL_HI16: 657 case ELF::R_MIPS16_TLS_TPREL_LO16: 658 llvm_unreachable("Unsupported MIPS16 relocation"); 659 return true; 660 } 661 } 662 663 std::unique_ptr<MCObjectTargetWriter> 664 llvm::createMipsELFObjectWriter(const Triple &TT, bool IsN32) { 665 uint8_t OSABI = MCELFObjectTargetWriter::getOSABI(TT.getOS()); 666 bool IsN64 = TT.isArch64Bit() && !IsN32; 667 bool HasRelocationAddend = TT.isArch64Bit(); 668 return std::make_unique<MipsELFObjectWriter>(OSABI, HasRelocationAddend, 669 IsN64); 670 } 671