1 //===-- MipsBaseInfo.h - Top level definitions for MIPS MC ------*- C++ -*-===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 // 9 // This file contains small standalone helper functions and enum definitions for 10 // the Mips target useful for the compiler back-end and the MC libraries. 11 // 12 //===----------------------------------------------------------------------===// 13 #ifndef LLVM_LIB_TARGET_MIPS_MCTARGETDESC_MIPSBASEINFO_H 14 #define LLVM_LIB_TARGET_MIPS_MCTARGETDESC_MIPSBASEINFO_H 15 16 #include "MipsFixupKinds.h" 17 #include "MipsMCTargetDesc.h" 18 #include "llvm/MC/MCExpr.h" 19 #include "llvm/Support/DataTypes.h" 20 #include "llvm/Support/ErrorHandling.h" 21 22 namespace llvm { 23 24 /// MipsII - This namespace holds all of the target specific flags that 25 /// instruction info tracks. 26 /// 27 namespace MipsII { 28 /// Target Operand Flag enum. 29 enum TOF { 30 //===------------------------------------------------------------------===// 31 // Mips Specific MachineOperand flags. 32 33 MO_NO_FLAG, 34 35 /// MO_GOT - Represents the offset into the global offset table at which 36 /// the address the relocation entry symbol resides during execution. 37 MO_GOT, 38 39 /// MO_GOT_CALL - Represents the offset into the global offset table at 40 /// which the address of a call site relocation entry symbol resides 41 /// during execution. This is different from the above since this flag 42 /// can only be present in call instructions. 43 MO_GOT_CALL, 44 45 /// MO_GPREL - Represents the offset from the current gp value to be used 46 /// for the relocatable object file being produced. 47 MO_GPREL, 48 49 /// MO_ABS_HI/LO - Represents the hi or low part of an absolute symbol 50 /// address. 51 MO_ABS_HI, 52 MO_ABS_LO, 53 54 /// MO_TLSGD - Represents the offset into the global offset table at which 55 // the module ID and TSL block offset reside during execution (General 56 // Dynamic TLS). 57 MO_TLSGD, 58 59 /// MO_TLSLDM - Represents the offset into the global offset table at which 60 // the module ID and TSL block offset reside during execution (Local 61 // Dynamic TLS). 62 MO_TLSLDM, 63 MO_DTPREL_HI, 64 MO_DTPREL_LO, 65 66 /// MO_GOTTPREL - Represents the offset from the thread pointer (Initial 67 // Exec TLS). 68 MO_GOTTPREL, 69 70 /// MO_TPREL_HI/LO - Represents the hi and low part of the offset from 71 // the thread pointer (Local Exec TLS). 72 MO_TPREL_HI, 73 MO_TPREL_LO, 74 75 // N32/64 Flags. 76 MO_GPOFF_HI, 77 MO_GPOFF_LO, 78 MO_GOT_DISP, 79 MO_GOT_PAGE, 80 MO_GOT_OFST, 81 82 /// MO_HIGHER/HIGHEST - Represents the highest or higher half word of a 83 /// 64-bit symbol address. 84 MO_HIGHER, 85 MO_HIGHEST, 86 87 /// MO_GOT_HI16/LO16, MO_CALL_HI16/LO16 - Relocations used for large GOTs. 88 MO_GOT_HI16, 89 MO_GOT_LO16, 90 MO_CALL_HI16, 91 MO_CALL_LO16, 92 93 /// Helper operand used to generate R_MIPS_JALR 94 MO_JALR 95 }; 96 97 enum { 98 //===------------------------------------------------------------------===// 99 // Instruction encodings. These are the standard/most common forms for 100 // Mips instructions. 101 // 102 103 // Pseudo - This represents an instruction that is a pseudo instruction 104 // or one that has not been implemented yet. It is illegal to code generate 105 // it, but tolerated for intermediate implementation stages. 106 Pseudo = 0, 107 108 /// FrmR - This form is for instructions of the format R. 109 FrmR = 1, 110 /// FrmI - This form is for instructions of the format I. 111 FrmI = 2, 112 /// FrmJ - This form is for instructions of the format J. 113 FrmJ = 3, 114 /// FrmFR - This form is for instructions of the format FR. 115 FrmFR = 4, 116 /// FrmFI - This form is for instructions of the format FI. 117 FrmFI = 5, 118 /// FrmOther - This form is for instructions that have no specific format. 119 FrmOther = 6, 120 121 FormMask = 15, 122 /// IsCTI - Instruction is a Control Transfer Instruction. 123 IsCTI = 1 << 4, 124 /// HasForbiddenSlot - Instruction has a forbidden slot. 125 HasForbiddenSlot = 1 << 5, 126 /// IsPCRelativeLoad - A Load instruction with implicit source register 127 /// ($pc) with explicit offset and destination register 128 IsPCRelativeLoad = 1 << 6, 129 /// HasFCCRegOperand - Instruction uses an $fcc<x> register. 130 HasFCCRegOperand = 1 << 7 131 132 }; 133 } 134 } 135 136 #endif 137