10b57cec5SDimitry Andric //===-- MipsAsmBackend.h - Mips Asm Backend ------------------------------===// 20b57cec5SDimitry Andric // 30b57cec5SDimitry Andric // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 40b57cec5SDimitry Andric // See https://llvm.org/LICENSE.txt for license information. 50b57cec5SDimitry Andric // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 60b57cec5SDimitry Andric // 70b57cec5SDimitry Andric //===----------------------------------------------------------------------===// 80b57cec5SDimitry Andric // 90b57cec5SDimitry Andric // This file defines the MipsAsmBackend class. 100b57cec5SDimitry Andric // 110b57cec5SDimitry Andric //===----------------------------------------------------------------------===// 120b57cec5SDimitry Andric // 130b57cec5SDimitry Andric 140b57cec5SDimitry Andric #ifndef LLVM_LIB_TARGET_MIPS_MCTARGETDESC_MIPSASMBACKEND_H 150b57cec5SDimitry Andric #define LLVM_LIB_TARGET_MIPS_MCTARGETDESC_MIPSASMBACKEND_H 160b57cec5SDimitry Andric 170b57cec5SDimitry Andric #include "MCTargetDesc/MipsFixupKinds.h" 180b57cec5SDimitry Andric #include "llvm/MC/MCAsmBackend.h" 1906c3fb27SDimitry Andric #include "llvm/TargetParser/Triple.h" 200b57cec5SDimitry Andric 210b57cec5SDimitry Andric namespace llvm { 220b57cec5SDimitry Andric 230b57cec5SDimitry Andric class MCAssembler; 240b57cec5SDimitry Andric struct MCFixupKindInfo; 250b57cec5SDimitry Andric class MCRegisterInfo; 260b57cec5SDimitry Andric class Target; 270b57cec5SDimitry Andric 280b57cec5SDimitry Andric class MipsAsmBackend : public MCAsmBackend { 290b57cec5SDimitry Andric Triple TheTriple; 300b57cec5SDimitry Andric bool IsN32; 310b57cec5SDimitry Andric 320b57cec5SDimitry Andric public: MipsAsmBackend(const Target & T,const MCRegisterInfo & MRI,const Triple & TT,StringRef CPU,bool N32)330b57cec5SDimitry Andric MipsAsmBackend(const Target &T, const MCRegisterInfo &MRI, const Triple &TT, 340b57cec5SDimitry Andric StringRef CPU, bool N32) 35*5f757f3fSDimitry Andric : MCAsmBackend(TT.isLittleEndian() ? llvm::endianness::little 36*5f757f3fSDimitry Andric : llvm::endianness::big), 370b57cec5SDimitry Andric TheTriple(TT), IsN32(N32) {} 380b57cec5SDimitry Andric 390b57cec5SDimitry Andric std::unique_ptr<MCObjectTargetWriter> 400b57cec5SDimitry Andric createObjectTargetWriter() const override; 410b57cec5SDimitry Andric 420b57cec5SDimitry Andric void applyFixup(const MCAssembler &Asm, const MCFixup &Fixup, 430b57cec5SDimitry Andric const MCValue &Target, MutableArrayRef<char> Data, 440b57cec5SDimitry Andric uint64_t Value, bool IsResolved, 450b57cec5SDimitry Andric const MCSubtargetInfo *STI) const override; 460b57cec5SDimitry Andric 47bdd1243dSDimitry Andric std::optional<MCFixupKind> getFixupKind(StringRef Name) const override; 480b57cec5SDimitry Andric const MCFixupKindInfo &getFixupKindInfo(MCFixupKind Kind) const override; 490b57cec5SDimitry Andric getNumFixupKinds()500b57cec5SDimitry Andric unsigned getNumFixupKinds() const override { 510b57cec5SDimitry Andric return Mips::NumTargetFixupKinds; 520b57cec5SDimitry Andric } 530b57cec5SDimitry Andric 54349cc55cSDimitry Andric bool writeNopData(raw_ostream &OS, uint64_t Count, 55349cc55cSDimitry Andric const MCSubtargetInfo *STI) const override; 560b57cec5SDimitry Andric 570b57cec5SDimitry Andric bool shouldForceRelocation(const MCAssembler &Asm, const MCFixup &Fixup, 58*5f757f3fSDimitry Andric const MCValue &Target, 59*5f757f3fSDimitry Andric const MCSubtargetInfo *STI) override; 600b57cec5SDimitry Andric 610b57cec5SDimitry Andric bool isMicroMips(const MCSymbol *Sym) const override; 620b57cec5SDimitry Andric }; // class MipsAsmBackend 630b57cec5SDimitry Andric 640b57cec5SDimitry Andric } // namespace 650b57cec5SDimitry Andric 660b57cec5SDimitry Andric #endif 67