1 //===---- MipsABIInfo.cpp - Information about MIPS ABI's ------------------===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 9 #include "MipsABIInfo.h" 10 #include "MipsRegisterInfo.h" 11 #include "llvm/ADT/StringRef.h" 12 #include "llvm/CodeGen/MachineMemOperand.h" 13 #include "llvm/MC/MCTargetOptions.h" 14 #include "llvm/Support/CommandLine.h" 15 #include "llvm/Support/LowLevelTypeImpl.h" 16 17 using namespace llvm; 18 19 // Note: this option is defined here to be visible from libLLVMMipsAsmParser 20 // and libLLVMMipsCodeGen 21 cl::opt<bool> 22 EmitJalrReloc("mips-jalr-reloc", cl::Hidden, 23 cl::desc("MIPS: Emit R_{MICRO}MIPS_JALR relocation with jalr"), 24 cl::init(true)); 25 26 namespace { 27 static const MCPhysReg O32IntRegs[4] = {Mips::A0, Mips::A1, Mips::A2, Mips::A3}; 28 29 static const MCPhysReg Mips64IntRegs[8] = { 30 Mips::A0_64, Mips::A1_64, Mips::A2_64, Mips::A3_64, 31 Mips::T0_64, Mips::T1_64, Mips::T2_64, Mips::T3_64}; 32 } 33 34 ArrayRef<MCPhysReg> MipsABIInfo::GetByValArgRegs() const { 35 if (IsO32()) 36 return ArrayRef(O32IntRegs); 37 if (IsN32() || IsN64()) 38 return ArrayRef(Mips64IntRegs); 39 llvm_unreachable("Unhandled ABI"); 40 } 41 42 ArrayRef<MCPhysReg> MipsABIInfo::GetVarArgRegs() const { 43 if (IsO32()) 44 return ArrayRef(O32IntRegs); 45 if (IsN32() || IsN64()) 46 return ArrayRef(Mips64IntRegs); 47 llvm_unreachable("Unhandled ABI"); 48 } 49 50 unsigned MipsABIInfo::GetCalleeAllocdArgSizeInBytes(CallingConv::ID CC) const { 51 if (IsO32()) 52 return CC != CallingConv::Fast ? 16 : 0; 53 if (IsN32() || IsN64()) 54 return 0; 55 llvm_unreachable("Unhandled ABI"); 56 } 57 58 MipsABIInfo MipsABIInfo::computeTargetABI(const Triple &TT, StringRef CPU, 59 const MCTargetOptions &Options) { 60 if (Options.getABIName().startswith("o32")) 61 return MipsABIInfo::O32(); 62 if (Options.getABIName().startswith("n32")) 63 return MipsABIInfo::N32(); 64 if (Options.getABIName().startswith("n64")) 65 return MipsABIInfo::N64(); 66 if (TT.getEnvironment() == llvm::Triple::GNUABIN32) 67 return MipsABIInfo::N32(); 68 assert(Options.getABIName().empty() && "Unknown ABI option for MIPS"); 69 70 if (TT.isMIPS64()) 71 return MipsABIInfo::N64(); 72 return MipsABIInfo::O32(); 73 } 74 75 unsigned MipsABIInfo::GetStackPtr() const { 76 return ArePtrs64bit() ? Mips::SP_64 : Mips::SP; 77 } 78 79 unsigned MipsABIInfo::GetFramePtr() const { 80 return ArePtrs64bit() ? Mips::FP_64 : Mips::FP; 81 } 82 83 unsigned MipsABIInfo::GetBasePtr() const { 84 return ArePtrs64bit() ? Mips::S7_64 : Mips::S7; 85 } 86 87 unsigned MipsABIInfo::GetGlobalPtr() const { 88 return ArePtrs64bit() ? Mips::GP_64 : Mips::GP; 89 } 90 91 unsigned MipsABIInfo::GetNullPtr() const { 92 return ArePtrs64bit() ? Mips::ZERO_64 : Mips::ZERO; 93 } 94 95 unsigned MipsABIInfo::GetZeroReg() const { 96 return AreGprs64bit() ? Mips::ZERO_64 : Mips::ZERO; 97 } 98 99 unsigned MipsABIInfo::GetPtrAdduOp() const { 100 return ArePtrs64bit() ? Mips::DADDu : Mips::ADDu; 101 } 102 103 unsigned MipsABIInfo::GetPtrAddiuOp() const { 104 return ArePtrs64bit() ? Mips::DADDiu : Mips::ADDiu; 105 } 106 107 unsigned MipsABIInfo::GetPtrSubuOp() const { 108 return ArePtrs64bit() ? Mips::DSUBu : Mips::SUBu; 109 } 110 111 unsigned MipsABIInfo::GetPtrAndOp() const { 112 return ArePtrs64bit() ? Mips::AND64 : Mips::AND; 113 } 114 115 unsigned MipsABIInfo::GetGPRMoveOp() const { 116 return ArePtrs64bit() ? Mips::OR64 : Mips::OR; 117 } 118 119 unsigned MipsABIInfo::GetEhDataReg(unsigned I) const { 120 static const unsigned EhDataReg[] = { 121 Mips::A0, Mips::A1, Mips::A2, Mips::A3 122 }; 123 static const unsigned EhDataReg64[] = { 124 Mips::A0_64, Mips::A1_64, Mips::A2_64, Mips::A3_64 125 }; 126 127 return IsN64() ? EhDataReg64[I] : EhDataReg[I]; 128 } 129 130