1 //===---- MipsABIInfo.cpp - Information about MIPS ABI's ------------------===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 9 #include "MipsABIInfo.h" 10 #include "Mips.h" 11 #include "llvm/ADT/StringRef.h" 12 #include "llvm/CodeGen/LowLevelType.h" 13 #include "llvm/MC/MCTargetOptions.h" 14 #include "llvm/Support/CommandLine.h" 15 16 using namespace llvm; 17 18 // Note: this option is defined here to be visible from libLLVMMipsAsmParser 19 // and libLLVMMipsCodeGen 20 cl::opt<bool> 21 EmitJalrReloc("mips-jalr-reloc", cl::Hidden, 22 cl::desc("MIPS: Emit R_{MICRO}MIPS_JALR relocation with jalr"), 23 cl::init(true)); 24 25 namespace { 26 static const MCPhysReg O32IntRegs[4] = {Mips::A0, Mips::A1, Mips::A2, Mips::A3}; 27 28 static const MCPhysReg Mips64IntRegs[8] = { 29 Mips::A0_64, Mips::A1_64, Mips::A2_64, Mips::A3_64, 30 Mips::T0_64, Mips::T1_64, Mips::T2_64, Mips::T3_64}; 31 } 32 33 ArrayRef<MCPhysReg> MipsABIInfo::GetByValArgRegs() const { 34 if (IsO32()) 35 return ArrayRef(O32IntRegs); 36 if (IsN32() || IsN64()) 37 return ArrayRef(Mips64IntRegs); 38 llvm_unreachable("Unhandled ABI"); 39 } 40 41 ArrayRef<MCPhysReg> MipsABIInfo::GetVarArgRegs() const { 42 if (IsO32()) 43 return ArrayRef(O32IntRegs); 44 if (IsN32() || IsN64()) 45 return ArrayRef(Mips64IntRegs); 46 llvm_unreachable("Unhandled ABI"); 47 } 48 49 unsigned MipsABIInfo::GetCalleeAllocdArgSizeInBytes(CallingConv::ID CC) const { 50 if (IsO32()) 51 return CC != CallingConv::Fast ? 16 : 0; 52 if (IsN32() || IsN64()) 53 return 0; 54 llvm_unreachable("Unhandled ABI"); 55 } 56 57 MipsABIInfo MipsABIInfo::computeTargetABI(const Triple &TT, StringRef CPU, 58 const MCTargetOptions &Options) { 59 if (Options.getABIName().starts_with("o32")) 60 return MipsABIInfo::O32(); 61 if (Options.getABIName().starts_with("n32")) 62 return MipsABIInfo::N32(); 63 if (Options.getABIName().starts_with("n64")) 64 return MipsABIInfo::N64(); 65 if (TT.getEnvironment() == llvm::Triple::GNUABIN32) 66 return MipsABIInfo::N32(); 67 assert(Options.getABIName().empty() && "Unknown ABI option for MIPS"); 68 69 if (TT.isMIPS64()) 70 return MipsABIInfo::N64(); 71 return MipsABIInfo::O32(); 72 } 73 74 unsigned MipsABIInfo::GetStackPtr() const { 75 return ArePtrs64bit() ? Mips::SP_64 : Mips::SP; 76 } 77 78 unsigned MipsABIInfo::GetFramePtr() const { 79 return ArePtrs64bit() ? Mips::FP_64 : Mips::FP; 80 } 81 82 unsigned MipsABIInfo::GetBasePtr() const { 83 return ArePtrs64bit() ? Mips::S7_64 : Mips::S7; 84 } 85 86 unsigned MipsABIInfo::GetGlobalPtr() const { 87 return ArePtrs64bit() ? Mips::GP_64 : Mips::GP; 88 } 89 90 unsigned MipsABIInfo::GetNullPtr() const { 91 return ArePtrs64bit() ? Mips::ZERO_64 : Mips::ZERO; 92 } 93 94 unsigned MipsABIInfo::GetZeroReg() const { 95 return AreGprs64bit() ? Mips::ZERO_64 : Mips::ZERO; 96 } 97 98 unsigned MipsABIInfo::GetPtrAdduOp() const { 99 return ArePtrs64bit() ? Mips::DADDu : Mips::ADDu; 100 } 101 102 unsigned MipsABIInfo::GetPtrAddiuOp() const { 103 return ArePtrs64bit() ? Mips::DADDiu : Mips::ADDiu; 104 } 105 106 unsigned MipsABIInfo::GetPtrSubuOp() const { 107 return ArePtrs64bit() ? Mips::DSUBu : Mips::SUBu; 108 } 109 110 unsigned MipsABIInfo::GetPtrAndOp() const { 111 return ArePtrs64bit() ? Mips::AND64 : Mips::AND; 112 } 113 114 unsigned MipsABIInfo::GetGPRMoveOp() const { 115 return ArePtrs64bit() ? Mips::OR64 : Mips::OR; 116 } 117 118 unsigned MipsABIInfo::GetEhDataReg(unsigned I) const { 119 static const unsigned EhDataReg[] = { 120 Mips::A0, Mips::A1, Mips::A2, Mips::A3 121 }; 122 static const unsigned EhDataReg64[] = { 123 Mips::A0_64, Mips::A1_64, Mips::A2_64, Mips::A3_64 124 }; 125 126 return IsN64() ? EhDataReg64[I] : EhDataReg[I]; 127 } 128 129