1//===-- M68kInstrBits.td - Bit Manipulation Instrs ---------*- tablegen -*-===// 2// 3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4// See https://llvm.org/LICENSE.txt for license information. 5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6// 7//===----------------------------------------------------------------------===// 8/// 9/// \file 10/// This file describes the bit manipulation instructions in the M68k 11/// architecture. Here is the current status of the file: 12/// 13/// Machine: 14/// 15/// BCHG [ ] BCLR [ ] BSET [ ] BTST [~] 16/// 17/// Map: 18/// 19/// [ ] - was not touched at all 20/// [!] - requires extarnal stuff implemented 21/// [~] - in progress but usable 22/// [x] - done 23/// 24//===----------------------------------------------------------------------===// 25 26//===----------------------------------------------------------------------===// 27// BTST 28//===----------------------------------------------------------------------===// 29 30/// ------------+---------+---------+---------+--------- 31/// F E D C | B A 9 | 8 7 6 | 5 4 3 | 2 1 0 32/// ------------+---------+---------+---------+--------- 33/// 0 0 0 0 | REG | 1 0 0 | MODE | REG 34/// ------------+---------+---------+---------+--------- 35class MxBTSTEnc_R<MxEncMemOp dst_enc, string bitno_name> { 36 dag Value = (ascend 37 (descend 0b0000, 38 (operand "$"#bitno_name, 3), 39 0b100, dst_enc.EA 40 ), 41 dst_enc.Supplement 42 ); 43} 44 45/// -------------------------------+---------+--------- 46/// F E D C B A 9 8 . 7 6 | 5 4 3 | 2 1 0 47/// -------------------------------+---------+--------- 48/// 0 0 0 0 1 0 0 0 . 0 0 | MODE | REG 49/// ------------------------+------+---------+--------- 50/// 0 0 0 0 0 0 0 0 | BIT NUMBER 51/// ------------------------+-------------------------- 52class MxBTSTEnc_I<MxEncMemOp dst_enc, string bitno_name> { 53 dag Value = (ascend 54 (descend 0b0000100000, dst_enc.EA), 55 (descend 0b00000000, (operand "$"#bitno_name, 8)), 56 dst_enc.Supplement 57 ); 58} 59 60let Defs = [CCR] in { 61class MxBTST_RR<MxType TYPE> 62 : MxInst<(outs), (ins TYPE.ROp:$dst, TYPE.ROp:$bitno), "btst\t$bitno, $dst", 63 [(set CCR, (MxBtst TYPE.VT:$dst, TYPE.VT:$bitno))]> { 64 let Inst = MxBTSTEnc_R<MxEncAddrMode_r<"dst">, "bitno">.Value; 65} 66 67class MxBTST_RI<MxType TYPE> 68 : MxInst<(outs), (ins TYPE.ROp:$dst, TYPE.IOp:$bitno), "btst\t$bitno, $dst", 69 [(set CCR, (MxBtst TYPE.VT:$dst, TYPE.IPat:$bitno))]> { 70 let Inst = MxBTSTEnc_I<MxEncAddrMode_r<"dst">, "bitno">.Value; 71} 72 73class MxBTST_MR<MxType TYPE, MxOperand MEMOpd, ComplexPattern MEMPat, 74 MxEncMemOp DST_ENC> 75 : MxInst<(outs), (ins MEMOpd:$dst, TYPE.ROp:$bitno), "btst\t$bitno, $dst", 76 [(set CCR, (MxBtst (TYPE.Load MEMPat:$dst), TYPE.VT:$bitno))]> { 77 let Inst = MxBTSTEnc_R<DST_ENC, "bitno">.Value; 78} 79 80class MxBTST_MI<MxType TYPE, MxOperand MEMOpd, ComplexPattern MEMPat, 81 MxEncMemOp DST_ENC> 82 : MxInst<(outs), (ins MEMOpd:$dst, TYPE.IOp:$bitno), "btst\t$bitno, $dst", 83 [(set CCR, (MxBtst (TYPE.Load MEMPat:$dst), TYPE.IPat:$bitno))]> { 84 let Inst = MxBTSTEnc_I<DST_ENC, "bitno">.Value; 85} 86} // Defs = [CCR] 87 88// Register BTST limited to 32 bits only 89def BTST32dd : MxBTST_RR<MxType32d>; 90def BTST32di : MxBTST_RI<MxType32d>; 91 92// Memory BTST limited to 8 bits only 93def BTST8jd : MxBTST_MR<MxType8d, MxType8.JOp, MxType8.JPat, 94 MxEncAddrMode_j<"dst">>; 95def BTST8od : MxBTST_MR<MxType8d, MxType8.OOp, MxType8.OPat, 96 MxEncAddrMode_o<"dst">>; 97def BTST8ed : MxBTST_MR<MxType8d, MxType8.EOp, MxType8.EPat, 98 MxEncAddrMode_e<"dst">>; 99def BTST8pd : MxBTST_MR<MxType8d, MxType8.POp, MxType8.PPat, 100 MxEncAddrMode_p<"dst">>; 101def BTST8fd : MxBTST_MR<MxType8d, MxType8.FOp, MxType8.FPat, 102 MxEncAddrMode_f<"dst">>; 103def BTST8qd : MxBTST_MR<MxType8d, MxType8.QOp, MxType8.QPat, 104 MxEncAddrMode_q<"dst">>; 105def BTST8kd : MxBTST_MR<MxType8d, MxType8.KOp, MxType8.KPat, 106 MxEncAddrMode_k<"dst">>; 107 108def BTST8ji : MxBTST_MI<MxType8d, MxType8.JOp, MxType8.JPat, 109 MxEncAddrMode_j<"dst">>; 110def BTST8oi : MxBTST_MI<MxType8d, MxType8.OOp, MxType8.OPat, 111 MxEncAddrMode_o<"dst">>; 112def BTST8ei : MxBTST_MI<MxType8d, MxType8.EOp, MxType8.EPat, 113 MxEncAddrMode_e<"dst">>; 114def BTST8pi : MxBTST_MI<MxType8d, MxType8.POp, MxType8.PPat, 115 MxEncAddrMode_p<"dst">>; 116def BTST8fi : MxBTST_MI<MxType8d, MxType8.FOp, MxType8.FPat, 117 MxEncAddrMode_f<"dst">>; 118def BTST8qi : MxBTST_MI<MxType8d, MxType8.QOp, MxType8.QPat, 119 MxEncAddrMode_q<"dst">>; 120def BTST8ki : MxBTST_MI<MxType8d, MxType8.KOp, MxType8.KPat, 121 MxEncAddrMode_k<"dst">>; 122