1*fe6060f1SDimitry Andric //===- M68k.h - Top-level interface for M68k representation -*- C++ -*-===// 2*fe6060f1SDimitry Andric // 3*fe6060f1SDimitry Andric // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4*fe6060f1SDimitry Andric // See https://llvm.org/LICENSE.txt for license information. 5*fe6060f1SDimitry Andric // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6*fe6060f1SDimitry Andric // 7*fe6060f1SDimitry Andric //===----------------------------------------------------------------------===// 8*fe6060f1SDimitry Andric /// 9*fe6060f1SDimitry Andric /// \file 10*fe6060f1SDimitry Andric /// This file contains the entry points for global functions defined in the 11*fe6060f1SDimitry Andric /// M68k target library, as used by the LLVM JIT. 12*fe6060f1SDimitry Andric /// 13*fe6060f1SDimitry Andric //===----------------------------------------------------------------------===// 14*fe6060f1SDimitry Andric 15*fe6060f1SDimitry Andric #ifndef LLVM_LIB_TARGET_M68K_M68K_H 16*fe6060f1SDimitry Andric #define LLVM_LIB_TARGET_M68K_M68K_H 17*fe6060f1SDimitry Andric 18*fe6060f1SDimitry Andric namespace llvm { 19*fe6060f1SDimitry Andric 20*fe6060f1SDimitry Andric class FunctionPass; 21*fe6060f1SDimitry Andric class InstructionSelector; 22*fe6060f1SDimitry Andric class M68kRegisterBankInfo; 23*fe6060f1SDimitry Andric class M68kSubtarget; 24*fe6060f1SDimitry Andric class M68kTargetMachine; 25*fe6060f1SDimitry Andric 26*fe6060f1SDimitry Andric /// This pass converts a legalized DAG into a M68k-specific DAG, ready for 27*fe6060f1SDimitry Andric /// instruction scheduling. 28*fe6060f1SDimitry Andric FunctionPass *createM68kISelDag(M68kTargetMachine &TM); 29*fe6060f1SDimitry Andric 30*fe6060f1SDimitry Andric /// Return a Machine IR pass that expands M68k-specific pseudo 31*fe6060f1SDimitry Andric /// instructions into a sequence of actual instructions. This pass 32*fe6060f1SDimitry Andric /// must run after prologue/epilogue insertion and before lowering 33*fe6060f1SDimitry Andric /// the MachineInstr to MC. 34*fe6060f1SDimitry Andric FunctionPass *createM68kExpandPseudoPass(); 35*fe6060f1SDimitry Andric 36*fe6060f1SDimitry Andric /// This pass initializes a global base register for PIC on M68k. 37*fe6060f1SDimitry Andric FunctionPass *createM68kGlobalBaseRegPass(); 38*fe6060f1SDimitry Andric 39*fe6060f1SDimitry Andric /// Finds sequential MOVEM instruction and collapse them into a single one. This 40*fe6060f1SDimitry Andric /// pass has to be run after all pseudo expansions and prologue/epilogue 41*fe6060f1SDimitry Andric /// emission so that all possible MOVEM are already in place. 42*fe6060f1SDimitry Andric FunctionPass *createM68kCollapseMOVEMPass(); 43*fe6060f1SDimitry Andric 44*fe6060f1SDimitry Andric /// Finds MOVE instructions before any conditioanl branch instruction and 45*fe6060f1SDimitry Andric /// replaces them with MOVEM instruction. Motorola's MOVEs do trash(V,C) flags 46*fe6060f1SDimitry Andric /// register which prevents branch from taking the correct route. This pass 47*fe6060f1SDimitry Andric /// has to be run after all pseudo expansions and prologue/epilogue emission 48*fe6060f1SDimitry Andric /// so that all possible MOVEs are present. 49*fe6060f1SDimitry Andric FunctionPass *createM68kConvertMOVToMOVMPass(); 50*fe6060f1SDimitry Andric 51*fe6060f1SDimitry Andric InstructionSelector * 52*fe6060f1SDimitry Andric createM68kInstructionSelector(const M68kTargetMachine &, const M68kSubtarget &, 53*fe6060f1SDimitry Andric const M68kRegisterBankInfo &); 54*fe6060f1SDimitry Andric 55*fe6060f1SDimitry Andric } // namespace llvm 56*fe6060f1SDimitry Andric 57*fe6060f1SDimitry Andric #endif 58