1 //===-- M68kDisassembler.cpp - Disassembler for M68k ------------*- C++ -*-===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 // 9 // This file is part of the M68k Disassembler. 10 // 11 //===----------------------------------------------------------------------===// 12 13 #include "M68k.h" 14 #include "M68kRegisterInfo.h" 15 #include "M68kSubtarget.h" 16 #include "MCTargetDesc/M68kMCCodeEmitter.h" 17 #include "MCTargetDesc/M68kMCTargetDesc.h" 18 #include "TargetInfo/M68kTargetInfo.h" 19 20 #include "llvm/MC/MCAsmInfo.h" 21 #include "llvm/MC/MCContext.h" 22 #include "llvm/MC/MCDisassembler/MCDisassembler.h" 23 #include "llvm/MC/MCDecoderOps.h" 24 #include "llvm/MC/MCInst.h" 25 #include "llvm/MC/TargetRegistry.h" 26 #include "llvm/Support/Endian.h" 27 #include "llvm/Support/ErrorHandling.h" 28 29 using namespace llvm; 30 31 #define DEBUG_TYPE "m68k-disassembler" 32 33 typedef MCDisassembler::DecodeStatus DecodeStatus; 34 35 static const unsigned RegisterDecode[] = { 36 M68k::D0, M68k::D1, M68k::D2, M68k::D3, M68k::D4, M68k::D5, 37 M68k::D6, M68k::D7, M68k::A0, M68k::A1, M68k::A2, M68k::A3, 38 M68k::A4, M68k::A5, M68k::A6, M68k::SP, M68k::FP0, M68k::FP1, 39 M68k::FP2, M68k::FP3, M68k::FP4, M68k::FP5, M68k::FP6, M68k::FP7}; 40 41 static DecodeStatus DecodeRegisterClass(MCInst &Inst, uint64_t RegNo, 42 uint64_t Address, const void *Decoder) { 43 if (RegNo >= 24) 44 return DecodeStatus::Fail; 45 Inst.addOperand(MCOperand::createReg(RegisterDecode[RegNo])); 46 return DecodeStatus::Success; 47 } 48 49 static DecodeStatus DecodeDR32RegisterClass(MCInst &Inst, uint64_t RegNo, 50 uint64_t Address, 51 const void *Decoder) { 52 return DecodeRegisterClass(Inst, RegNo, Address, Decoder); 53 } 54 55 static DecodeStatus DecodeDR16RegisterClass(MCInst &Inst, uint64_t RegNo, 56 uint64_t Address, 57 const void *Decoder) { 58 return DecodeRegisterClass(Inst, RegNo, Address, Decoder); 59 } 60 61 static DecodeStatus DecodeDR8RegisterClass(MCInst &Inst, uint64_t RegNo, 62 uint64_t Address, 63 const void *Decoder) { 64 return DecodeRegisterClass(Inst, RegNo, Address, Decoder); 65 } 66 67 static DecodeStatus DecodeAR32RegisterClass(MCInst &Inst, uint64_t RegNo, 68 uint64_t Address, 69 const void *Decoder) { 70 return DecodeRegisterClass(Inst, RegNo | 8ULL, Address, Decoder); 71 } 72 73 static DecodeStatus DecodeAR16RegisterClass(MCInst &Inst, uint64_t RegNo, 74 uint64_t Address, 75 const void *Decoder) { 76 return DecodeRegisterClass(Inst, RegNo | 8ULL, Address, Decoder); 77 } 78 79 static DecodeStatus DecodeXR32RegisterClass(MCInst &Inst, uint64_t RegNo, 80 uint64_t Address, 81 const void *Decoder) { 82 return DecodeRegisterClass(Inst, RegNo, Address, Decoder); 83 } 84 85 static DecodeStatus DecodeXR16RegisterClass(MCInst &Inst, uint64_t RegNo, 86 uint64_t Address, 87 const void *Decoder) { 88 return DecodeRegisterClass(Inst, RegNo, Address, Decoder); 89 } 90 91 static DecodeStatus DecodeFPDRRegisterClass(MCInst &Inst, uint64_t RegNo, 92 uint64_t Address, 93 const void *Decoder) { 94 return DecodeRegisterClass(Inst, RegNo | 16ULL, Address, Decoder); 95 } 96 #define DecodeFPDR32RegisterClass DecodeFPDRRegisterClass 97 #define DecodeFPDR64RegisterClass DecodeFPDRRegisterClass 98 #define DecodeFPDR80RegisterClass DecodeFPDRRegisterClass 99 100 static DecodeStatus DecodeCCRCRegisterClass(MCInst &Inst, APInt &Insn, 101 uint64_t Address, 102 const void *Decoder) { 103 llvm_unreachable("unimplemented"); 104 } 105 106 static DecodeStatus DecodeImm32(MCInst &Inst, uint64_t Imm, uint64_t Address, 107 const void *Decoder) { 108 Inst.addOperand(MCOperand::createImm(M68k::swapWord<uint32_t>(Imm))); 109 return DecodeStatus::Success; 110 } 111 112 #include "M68kGenDisassemblerTable.inc" 113 114 #undef DecodeFPDR32RegisterClass 115 #undef DecodeFPDR64RegisterClass 116 #undef DecodeFPDR80RegisterClass 117 118 /// A disassembler class for M68k. 119 struct M68kDisassembler : public MCDisassembler { 120 M68kDisassembler(const MCSubtargetInfo &STI, MCContext &Ctx) 121 : MCDisassembler(STI, Ctx) {} 122 virtual ~M68kDisassembler() {} 123 124 DecodeStatus getInstruction(MCInst &Instr, uint64_t &Size, 125 ArrayRef<uint8_t> Bytes, uint64_t Address, 126 raw_ostream &CStream) const override; 127 }; 128 129 DecodeStatus M68kDisassembler::getInstruction(MCInst &Instr, uint64_t &Size, 130 ArrayRef<uint8_t> Bytes, 131 uint64_t Address, 132 raw_ostream &CStream) const { 133 DecodeStatus Result; 134 auto MakeUp = [&](APInt &Insn, unsigned InstrBits) { 135 unsigned Idx = Insn.getBitWidth() >> 3; 136 unsigned RoundUp = alignTo(InstrBits, Align(16)); 137 if (RoundUp > Insn.getBitWidth()) 138 Insn = Insn.zext(RoundUp); 139 RoundUp = RoundUp >> 3; 140 for (; Idx < RoundUp; Idx += 2) { 141 Insn.insertBits(support::endian::read16be(&Bytes[Idx]), Idx * 8, 16); 142 } 143 }; 144 APInt Insn(16, support::endian::read16be(Bytes.data())); 145 // 2 bytes of data are consumed, so set Size to 2 146 // If we don't do this, disassembler may generate result even 147 // the encoding is invalid. We need to let it fail correctly. 148 Size = 2; 149 Result = decodeInstruction(DecoderTable80, Instr, Insn, Address, this, STI, 150 MakeUp); 151 if (Result == DecodeStatus::Success) 152 Size = InstrLenTable[Instr.getOpcode()] >> 3; 153 return Result; 154 } 155 156 static MCDisassembler *createM68kDisassembler(const Target &T, 157 const MCSubtargetInfo &STI, 158 MCContext &Ctx) { 159 return new M68kDisassembler(STI, Ctx); 160 } 161 162 extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeM68kDisassembler() { 163 // Register the disassembler. 164 TargetRegistry::RegisterMCDisassembler(getTheM68kTarget(), 165 createM68kDisassembler); 166 } 167