1 //===-- LoongArchMCTargetDesc.cpp - LoongArch Target Descriptions ---------===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 // 9 // This file provides LoongArch specific target descriptions. 10 // 11 //===----------------------------------------------------------------------===// 12 13 #include "LoongArchMCTargetDesc.h" 14 #include "LoongArchBaseInfo.h" 15 #include "LoongArchInstPrinter.h" 16 #include "LoongArchMCAsmInfo.h" 17 #include "TargetInfo/LoongArchTargetInfo.h" 18 #include "llvm/MC/MCAsmInfo.h" 19 #include "llvm/MC/MCDwarf.h" 20 #include "llvm/MC/MCInstrAnalysis.h" 21 #include "llvm/MC/MCInstrInfo.h" 22 #include "llvm/MC/MCRegisterInfo.h" 23 #include "llvm/MC/MCSubtargetInfo.h" 24 #include "llvm/MC/TargetRegistry.h" 25 #include "llvm/Support/Compiler.h" 26 27 #define GET_INSTRINFO_MC_DESC 28 #define ENABLE_INSTR_PREDICATE_VERIFIER 29 #include "LoongArchGenInstrInfo.inc" 30 31 #define GET_REGINFO_MC_DESC 32 #include "LoongArchGenRegisterInfo.inc" 33 34 #define GET_SUBTARGETINFO_MC_DESC 35 #include "LoongArchGenSubtargetInfo.inc" 36 37 using namespace llvm; 38 39 static MCRegisterInfo *createLoongArchMCRegisterInfo(const Triple &TT) { 40 MCRegisterInfo *X = new MCRegisterInfo(); 41 InitLoongArchMCRegisterInfo(X, LoongArch::R1); 42 return X; 43 } 44 45 static MCInstrInfo *createLoongArchMCInstrInfo() { 46 MCInstrInfo *X = new MCInstrInfo(); 47 InitLoongArchMCInstrInfo(X); 48 return X; 49 } 50 51 static MCSubtargetInfo * 52 createLoongArchMCSubtargetInfo(const Triple &TT, StringRef CPU, StringRef FS) { 53 if (CPU.empty()) 54 CPU = TT.isArch64Bit() ? "la464" : "generic-la32"; 55 return createLoongArchMCSubtargetInfoImpl(TT, CPU, /*TuneCPU*/ CPU, FS); 56 } 57 58 static MCAsmInfo *createLoongArchMCAsmInfo(const MCRegisterInfo &MRI, 59 const Triple &TT, 60 const MCTargetOptions &Options) { 61 MCAsmInfo *MAI = new LoongArchMCAsmInfo(TT); 62 63 // Initial state of the frame pointer is sp(r3). 64 MCRegister SP = MRI.getDwarfRegNum(LoongArch::R3, true); 65 MCCFIInstruction Inst = MCCFIInstruction::cfiDefCfa(nullptr, SP, 0); 66 MAI->addInitialFrameState(Inst); 67 68 return MAI; 69 } 70 71 static MCInstPrinter *createLoongArchMCInstPrinter(const Triple &T, 72 unsigned SyntaxVariant, 73 const MCAsmInfo &MAI, 74 const MCInstrInfo &MII, 75 const MCRegisterInfo &MRI) { 76 return new LoongArchInstPrinter(MAI, MII, MRI); 77 } 78 79 namespace { 80 81 class LoongArchMCInstrAnalysis : public MCInstrAnalysis { 82 public: 83 explicit LoongArchMCInstrAnalysis(const MCInstrInfo *Info) 84 : MCInstrAnalysis(Info) {} 85 86 bool evaluateBranch(const MCInst &Inst, uint64_t Addr, uint64_t Size, 87 uint64_t &Target) const override { 88 unsigned NumOps = Inst.getNumOperands(); 89 if (isBranch(Inst) || Inst.getOpcode() == LoongArch::BL) { 90 Target = Addr + Inst.getOperand(NumOps - 1).getImm(); 91 return true; 92 } 93 94 return false; 95 } 96 }; 97 98 } // end namespace 99 100 static MCInstrAnalysis *createLoongArchInstrAnalysis(const MCInstrInfo *Info) { 101 return new LoongArchMCInstrAnalysis(Info); 102 } 103 104 extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeLoongArchTargetMC() { 105 for (Target *T : {&getTheLoongArch32Target(), &getTheLoongArch64Target()}) { 106 TargetRegistry::RegisterMCRegInfo(*T, createLoongArchMCRegisterInfo); 107 TargetRegistry::RegisterMCInstrInfo(*T, createLoongArchMCInstrInfo); 108 TargetRegistry::RegisterMCSubtargetInfo(*T, createLoongArchMCSubtargetInfo); 109 TargetRegistry::RegisterMCAsmInfo(*T, createLoongArchMCAsmInfo); 110 TargetRegistry::RegisterMCCodeEmitter(*T, createLoongArchMCCodeEmitter); 111 TargetRegistry::RegisterMCAsmBackend(*T, createLoongArchAsmBackend); 112 TargetRegistry::RegisterMCInstPrinter(*T, createLoongArchMCInstPrinter); 113 TargetRegistry::RegisterMCInstrAnalysis(*T, createLoongArchInstrAnalysis); 114 } 115 } 116