xref: /freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/LoongArchLSXInstrInfo.td (revision 59c8e88e72633afbc47a4ace0d2170d00d51f7dc) 
1//===- LoongArchLSXInstrInfo.td - LoongArch LSX instructions -*- tablegen -*-=//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This file describes the SIMD extension instructions.
10//
11//===----------------------------------------------------------------------===//
12
13//===----------------------------------------------------------------------===//
14// Instruction class templates
15//===----------------------------------------------------------------------===//
16
17class LSX1RI13_VI<bits<32> op, Operand ImmOpnd = simm13>
18    : Fmt1RI13_VI<op, (outs LSX128:$vd), (ins ImmOpnd:$imm13), "$vd, $imm13">;
19
20class LSX2R_VV<bits<32> op>
21    : Fmt2R_VV<op, (outs LSX128:$vd), (ins LSX128:$vj), "$vd, $vj">;
22
23class LSX2R_VR<bits<32> op>
24    : Fmt2R_VR<op, (outs LSX128:$vd), (ins GPR:$rj), "$vd, $rj">;
25
26class LSX2R_CV<bits<32> op>
27    : Fmt2R_CV<op, (outs CFR:$cd), (ins LSX128:$vj), "$cd, $vj">;
28
29class LSX2RI1_VVI<bits<32> op, Operand ImmOpnd = uimm1>
30    : Fmt2RI1_VVI<op, (outs LSX128:$vd), (ins LSX128:$vj, ImmOpnd:$imm1),
31                  "$vd, $vj, $imm1">;
32
33class LSX2RI1_RVI<bits<32> op, Operand ImmOpnd = uimm1>
34    : Fmt2RI1_RVI<op, (outs GPR:$rd), (ins LSX128:$vj, ImmOpnd:$imm1),
35                  "$rd, $vj, $imm1">;
36
37class LSX2RI2_VVI<bits<32> op, Operand ImmOpnd = uimm2>
38    : Fmt2RI2_VVI<op, (outs LSX128:$vd), (ins LSX128:$vj, ImmOpnd:$imm2),
39                  "$vd, $vj, $imm2">;
40
41class LSX2RI2_RVI<bits<32> op, Operand ImmOpnd = uimm2>
42    : Fmt2RI2_RVI<op, (outs GPR:$rd), (ins LSX128:$vj, ImmOpnd:$imm2),
43                  "$rd, $vj, $imm2">;
44
45class LSX2RI3_VVI<bits<32> op, Operand ImmOpnd = uimm3>
46    : Fmt2RI3_VVI<op, (outs LSX128:$vd), (ins LSX128:$vj, ImmOpnd:$imm3),
47                  "$vd, $vj, $imm3">;
48
49class LSX2RI3_RVI<bits<32> op, Operand ImmOpnd = uimm3>
50    : Fmt2RI3_RVI<op, (outs GPR:$rd), (ins LSX128:$vj, ImmOpnd:$imm3),
51                  "$rd, $vj, $imm3">;
52
53class LSX2RI4_VVI<bits<32> op, Operand ImmOpnd = uimm4>
54    : Fmt2RI4_VVI<op, (outs LSX128:$vd), (ins LSX128:$vj, ImmOpnd:$imm4),
55                  "$vd, $vj, $imm4">;
56
57class LSX2RI4_RVI<bits<32> op, Operand ImmOpnd = uimm4>
58    : Fmt2RI4_RVI<op, (outs GPR:$rd), (ins LSX128:$vj, ImmOpnd:$imm4),
59                  "$rd, $vj, $imm4">;
60
61class LSX2RI5_VVI<bits<32> op, Operand ImmOpnd = uimm5>
62    : Fmt2RI5_VVI<op, (outs LSX128:$vd), (ins LSX128:$vj, ImmOpnd:$imm5),
63                  "$vd, $vj, $imm5">;
64
65class LSX2RI6_VVI<bits<32> op, Operand ImmOpnd = uimm6>
66    : Fmt2RI6_VVI<op, (outs LSX128:$vd), (ins LSX128:$vj, ImmOpnd:$imm6),
67                  "$vd, $vj, $imm6">;
68
69class LSX2RI8_VVI<bits<32> op, Operand ImmOpnd = uimm8>
70    : Fmt2RI8_VVI<op, (outs LSX128:$vd), (ins LSX128:$vj, ImmOpnd:$imm8),
71                  "$vd, $vj, $imm8">;
72
73class LSX2RI8I1_VRII<bits<32> op, Operand ImmOpnd = simm8,
74                     Operand IdxOpnd = uimm1>
75    : Fmt2RI8I1_VRII<op, (outs),
76                     (ins LSX128:$vd, GPR:$rj, ImmOpnd:$imm8, IdxOpnd:$imm1),
77                     "$vd, $rj, $imm8, $imm1">;
78class LSX2RI8I2_VRII<bits<32> op, Operand ImmOpnd = simm8,
79                     Operand IdxOpnd = uimm2>
80    : Fmt2RI8I2_VRII<op, (outs),
81                     (ins LSX128:$vd, GPR:$rj, ImmOpnd:$imm8, IdxOpnd:$imm2),
82                     "$vd, $rj, $imm8, $imm2">;
83class LSX2RI8I3_VRII<bits<32> op, Operand ImmOpnd = simm8,
84                     Operand IdxOpnd = uimm3>
85    : Fmt2RI8I3_VRII<op, (outs),
86                     (ins LSX128:$vd, GPR:$rj, ImmOpnd:$imm8, IdxOpnd:$imm3),
87                     "$vd, $rj, $imm8, $imm3">;
88class LSX2RI8I4_VRII<bits<32> op, Operand ImmOpnd = simm8,
89                     Operand IdxOpnd = uimm4>
90    : Fmt2RI8I4_VRII<op, (outs),
91                     (ins LSX128:$vd, GPR:$rj, ImmOpnd:$imm8, IdxOpnd:$imm4),
92                     "$vd, $rj, $imm8, $imm4">;
93
94class LSX3R_VVV<bits<32> op>
95    : Fmt3R_VVV<op, (outs LSX128:$vd), (ins LSX128:$vj, LSX128:$vk),
96                "$vd, $vj, $vk">;
97
98class LSX3R_VVR<bits<32> op>
99    : Fmt3R_VVR<op, (outs LSX128:$vd), (ins LSX128:$vj, GPR:$rk),
100                "$vd, $vj, $rk">;
101
102class LSX4R_VVVV<bits<32> op>
103    : Fmt4R_VVVV<op, (outs LSX128:$vd),
104                 (ins LSX128:$vj, LSX128:$vk, LSX128:$va),
105                 "$vd, $vj, $vk, $va">;
106
107let Constraints = "$vd = $dst" in {
108
109class LSX2RI1_VVRI<bits<32> op, Operand ImmOpnd = uimm1>
110    : Fmt2RI1_VRI<op, (outs LSX128:$dst), (ins LSX128:$vd, GPR:$rj, ImmOpnd:$imm1),
111                  "$vd, $rj, $imm1">;
112class LSX2RI2_VVRI<bits<32> op, Operand ImmOpnd = uimm2>
113    : Fmt2RI2_VRI<op, (outs LSX128:$dst), (ins LSX128:$vd, GPR:$rj, ImmOpnd:$imm2),
114                  "$vd, $rj, $imm2">;
115class LSX2RI3_VVRI<bits<32> op, Operand ImmOpnd = uimm3>
116    : Fmt2RI3_VRI<op, (outs LSX128:$dst), (ins LSX128:$vd, GPR:$rj, ImmOpnd:$imm3),
117                  "$vd, $rj, $imm3">;
118class LSX2RI4_VVRI<bits<32> op, Operand ImmOpnd = uimm4>
119    : Fmt2RI4_VRI<op, (outs LSX128:$dst), (ins LSX128:$vd, GPR:$rj, ImmOpnd:$imm4),
120                  "$vd, $rj, $imm4">;
121
122class LSX2RI4_VVVI<bits<32> op, Operand ImmOpnd = uimm4>
123    : Fmt2RI4_VVI<op, (outs LSX128:$dst), (ins LSX128:$vd, LSX128:$vj, ImmOpnd:$imm4),
124                  "$vd, $vj, $imm4">;
125class LSX2RI5_VVVI<bits<32> op, Operand ImmOpnd = uimm5>
126    : Fmt2RI5_VVI<op, (outs LSX128:$dst), (ins LSX128:$vd, LSX128:$vj, ImmOpnd:$imm5),
127                  "$vd, $vj, $imm5">;
128class LSX2RI6_VVVI<bits<32> op, Operand ImmOpnd = uimm6>
129    : Fmt2RI6_VVI<op, (outs LSX128:$dst), (ins LSX128:$vd, LSX128:$vj, ImmOpnd:$imm6),
130                  "$vd, $vj, $imm6">;
131class LSX2RI7_VVVI<bits<32> op, Operand ImmOpnd = uimm7>
132    : Fmt2RI7_VVI<op, (outs LSX128:$dst), (ins LSX128:$vd, LSX128:$vj, ImmOpnd:$imm7),
133                  "$vd, $vj, $imm7">;
134
135class LSX2RI8_VVVI<bits<32> op, Operand ImmOpnd = uimm8>
136    : Fmt2RI8_VVI<op, (outs LSX128:$dst), (ins LSX128:$vd, LSX128:$vj, ImmOpnd:$imm8),
137                  "$vd, $vj, $imm8">;
138
139class LSX3R_VVVV<bits<32> op>
140    : Fmt3R_VVV<op, (outs LSX128:$dst), (ins LSX128:$vd, LSX128:$vj, LSX128:$vk),
141                "$vd, $vj, $vk">;
142
143} // Constraints = "$vd = $dst"
144
145class LSX2RI9_Load<bits<32> op, Operand ImmOpnd = simm9_lsl3>
146    : Fmt2RI9_VRI<op, (outs LSX128:$vd), (ins GPR:$rj, ImmOpnd:$imm9),
147                  "$vd, $rj, $imm9">;
148class LSX2RI10_Load<bits<32> op, Operand ImmOpnd = simm10_lsl2>
149    : Fmt2RI10_VRI<op, (outs LSX128:$vd), (ins GPR:$rj, ImmOpnd:$imm10),
150                  "$vd, $rj, $imm10">;
151class LSX2RI11_Load<bits<32> op, Operand ImmOpnd = simm11_lsl1>
152    : Fmt2RI11_VRI<op, (outs LSX128:$vd), (ins GPR:$rj, ImmOpnd:$imm11),
153                  "$vd, $rj, $imm11">;
154class LSX2RI12_Load<bits<32> op, Operand ImmOpnd = simm12>
155    : Fmt2RI12_VRI<op, (outs LSX128:$vd), (ins GPR:$rj, ImmOpnd:$imm12),
156                  "$vd, $rj, $imm12">;
157class LSX2RI12_Store<bits<32> op, Operand ImmOpnd = simm12>
158    : Fmt2RI12_VRI<op, (outs), (ins LSX128:$vd, GPR:$rj, ImmOpnd:$imm12),
159                  "$vd, $rj, $imm12">;
160
161class LSX3R_Load<bits<32> op>
162    : Fmt3R_VRR<op, (outs LSX128:$vd), (ins GPR:$rj, GPR:$rk),
163                "$vd, $rj, $rk">;
164class LSX3R_Store<bits<32> op>
165    : Fmt3R_VRR<op, (outs), (ins LSX128:$vd, GPR:$rj, GPR:$rk),
166                "$vd, $rj, $rk">;
167
168//===----------------------------------------------------------------------===//
169// Instructions
170//===----------------------------------------------------------------------===//
171
172let hasSideEffects = 0, Predicates = [HasExtLSX] in {
173
174let mayLoad = 0, mayStore = 0 in {
175
176def VADD_B : LSX3R_VVV<0x700a0000>;
177def VADD_H : LSX3R_VVV<0x700a8000>;
178def VADD_W : LSX3R_VVV<0x700b0000>;
179def VADD_D : LSX3R_VVV<0x700b8000>;
180def VADD_Q : LSX3R_VVV<0x712d0000>;
181
182def VSUB_B : LSX3R_VVV<0x700c0000>;
183def VSUB_H : LSX3R_VVV<0x700c8000>;
184def VSUB_W : LSX3R_VVV<0x700d0000>;
185def VSUB_D : LSX3R_VVV<0x700d8000>;
186def VSUB_Q : LSX3R_VVV<0x712d8000>;
187
188def VADDI_BU : LSX2RI5_VVI<0x728a0000>;
189def VADDI_HU : LSX2RI5_VVI<0x728a8000>;
190def VADDI_WU : LSX2RI5_VVI<0x728b0000>;
191def VADDI_DU : LSX2RI5_VVI<0x728b8000>;
192
193def VSUBI_BU : LSX2RI5_VVI<0x728c0000>;
194def VSUBI_HU : LSX2RI5_VVI<0x728c8000>;
195def VSUBI_WU : LSX2RI5_VVI<0x728d0000>;
196def VSUBI_DU : LSX2RI5_VVI<0x728d8000>;
197
198def VNEG_B : LSX2R_VV<0x729c3000>;
199def VNEG_H : LSX2R_VV<0x729c3400>;
200def VNEG_W : LSX2R_VV<0x729c3800>;
201def VNEG_D : LSX2R_VV<0x729c3c00>;
202
203def VSADD_B : LSX3R_VVV<0x70460000>;
204def VSADD_H : LSX3R_VVV<0x70468000>;
205def VSADD_W : LSX3R_VVV<0x70470000>;
206def VSADD_D : LSX3R_VVV<0x70478000>;
207def VSADD_BU : LSX3R_VVV<0x704a0000>;
208def VSADD_HU : LSX3R_VVV<0x704a8000>;
209def VSADD_WU : LSX3R_VVV<0x704b0000>;
210def VSADD_DU : LSX3R_VVV<0x704b8000>;
211
212def VSSUB_B : LSX3R_VVV<0x70480000>;
213def VSSUB_H : LSX3R_VVV<0x70488000>;
214def VSSUB_W : LSX3R_VVV<0x70490000>;
215def VSSUB_D : LSX3R_VVV<0x70498000>;
216def VSSUB_BU : LSX3R_VVV<0x704c0000>;
217def VSSUB_HU : LSX3R_VVV<0x704c8000>;
218def VSSUB_WU : LSX3R_VVV<0x704d0000>;
219def VSSUB_DU : LSX3R_VVV<0x704d8000>;
220
221def VHADDW_H_B : LSX3R_VVV<0x70540000>;
222def VHADDW_W_H : LSX3R_VVV<0x70548000>;
223def VHADDW_D_W : LSX3R_VVV<0x70550000>;
224def VHADDW_Q_D : LSX3R_VVV<0x70558000>;
225def VHADDW_HU_BU : LSX3R_VVV<0x70580000>;
226def VHADDW_WU_HU : LSX3R_VVV<0x70588000>;
227def VHADDW_DU_WU : LSX3R_VVV<0x70590000>;
228def VHADDW_QU_DU : LSX3R_VVV<0x70598000>;
229
230def VHSUBW_H_B : LSX3R_VVV<0x70560000>;
231def VHSUBW_W_H : LSX3R_VVV<0x70568000>;
232def VHSUBW_D_W : LSX3R_VVV<0x70570000>;
233def VHSUBW_Q_D : LSX3R_VVV<0x70578000>;
234def VHSUBW_HU_BU : LSX3R_VVV<0x705a0000>;
235def VHSUBW_WU_HU : LSX3R_VVV<0x705a8000>;
236def VHSUBW_DU_WU : LSX3R_VVV<0x705b0000>;
237def VHSUBW_QU_DU : LSX3R_VVV<0x705b8000>;
238
239def VADDWEV_H_B : LSX3R_VVV<0x701e0000>;
240def VADDWEV_W_H : LSX3R_VVV<0x701e8000>;
241def VADDWEV_D_W : LSX3R_VVV<0x701f0000>;
242def VADDWEV_Q_D : LSX3R_VVV<0x701f8000>;
243def VADDWOD_H_B : LSX3R_VVV<0x70220000>;
244def VADDWOD_W_H : LSX3R_VVV<0x70228000>;
245def VADDWOD_D_W : LSX3R_VVV<0x70230000>;
246def VADDWOD_Q_D : LSX3R_VVV<0x70238000>;
247
248def VSUBWEV_H_B : LSX3R_VVV<0x70200000>;
249def VSUBWEV_W_H : LSX3R_VVV<0x70208000>;
250def VSUBWEV_D_W : LSX3R_VVV<0x70210000>;
251def VSUBWEV_Q_D : LSX3R_VVV<0x70218000>;
252def VSUBWOD_H_B : LSX3R_VVV<0x70240000>;
253def VSUBWOD_W_H : LSX3R_VVV<0x70248000>;
254def VSUBWOD_D_W : LSX3R_VVV<0x70250000>;
255def VSUBWOD_Q_D : LSX3R_VVV<0x70258000>;
256
257def VADDWEV_H_BU : LSX3R_VVV<0x702e0000>;
258def VADDWEV_W_HU : LSX3R_VVV<0x702e8000>;
259def VADDWEV_D_WU : LSX3R_VVV<0x702f0000>;
260def VADDWEV_Q_DU : LSX3R_VVV<0x702f8000>;
261def VADDWOD_H_BU : LSX3R_VVV<0x70320000>;
262def VADDWOD_W_HU : LSX3R_VVV<0x70328000>;
263def VADDWOD_D_WU : LSX3R_VVV<0x70330000>;
264def VADDWOD_Q_DU : LSX3R_VVV<0x70338000>;
265
266def VSUBWEV_H_BU : LSX3R_VVV<0x70300000>;
267def VSUBWEV_W_HU : LSX3R_VVV<0x70308000>;
268def VSUBWEV_D_WU : LSX3R_VVV<0x70310000>;
269def VSUBWEV_Q_DU : LSX3R_VVV<0x70318000>;
270def VSUBWOD_H_BU : LSX3R_VVV<0x70340000>;
271def VSUBWOD_W_HU : LSX3R_VVV<0x70348000>;
272def VSUBWOD_D_WU : LSX3R_VVV<0x70350000>;
273def VSUBWOD_Q_DU : LSX3R_VVV<0x70358000>;
274
275def VADDWEV_H_BU_B : LSX3R_VVV<0x703e0000>;
276def VADDWEV_W_HU_H : LSX3R_VVV<0x703e8000>;
277def VADDWEV_D_WU_W : LSX3R_VVV<0x703f0000>;
278def VADDWEV_Q_DU_D : LSX3R_VVV<0x703f8000>;
279def VADDWOD_H_BU_B : LSX3R_VVV<0x70400000>;
280def VADDWOD_W_HU_H : LSX3R_VVV<0x70408000>;
281def VADDWOD_D_WU_W : LSX3R_VVV<0x70410000>;
282def VADDWOD_Q_DU_D : LSX3R_VVV<0x70418000>;
283
284def VAVG_B : LSX3R_VVV<0x70640000>;
285def VAVG_H : LSX3R_VVV<0x70648000>;
286def VAVG_W : LSX3R_VVV<0x70650000>;
287def VAVG_D : LSX3R_VVV<0x70658000>;
288def VAVG_BU : LSX3R_VVV<0x70660000>;
289def VAVG_HU : LSX3R_VVV<0x70668000>;
290def VAVG_WU : LSX3R_VVV<0x70670000>;
291def VAVG_DU : LSX3R_VVV<0x70678000>;
292def VAVGR_B : LSX3R_VVV<0x70680000>;
293def VAVGR_H : LSX3R_VVV<0x70688000>;
294def VAVGR_W : LSX3R_VVV<0x70690000>;
295def VAVGR_D : LSX3R_VVV<0x70698000>;
296def VAVGR_BU : LSX3R_VVV<0x706a0000>;
297def VAVGR_HU : LSX3R_VVV<0x706a8000>;
298def VAVGR_WU : LSX3R_VVV<0x706b0000>;
299def VAVGR_DU : LSX3R_VVV<0x706b8000>;
300
301def VABSD_B : LSX3R_VVV<0x70600000>;
302def VABSD_H : LSX3R_VVV<0x70608000>;
303def VABSD_W : LSX3R_VVV<0x70610000>;
304def VABSD_D : LSX3R_VVV<0x70618000>;
305def VABSD_BU : LSX3R_VVV<0x70620000>;
306def VABSD_HU : LSX3R_VVV<0x70628000>;
307def VABSD_WU : LSX3R_VVV<0x70630000>;
308def VABSD_DU : LSX3R_VVV<0x70638000>;
309
310def VADDA_B : LSX3R_VVV<0x705c0000>;
311def VADDA_H : LSX3R_VVV<0x705c8000>;
312def VADDA_W : LSX3R_VVV<0x705d0000>;
313def VADDA_D : LSX3R_VVV<0x705d8000>;
314
315def VMAX_B : LSX3R_VVV<0x70700000>;
316def VMAX_H : LSX3R_VVV<0x70708000>;
317def VMAX_W : LSX3R_VVV<0x70710000>;
318def VMAX_D : LSX3R_VVV<0x70718000>;
319def VMAXI_B : LSX2RI5_VVI<0x72900000, simm5>;
320def VMAXI_H : LSX2RI5_VVI<0x72908000, simm5>;
321def VMAXI_W : LSX2RI5_VVI<0x72910000, simm5>;
322def VMAXI_D : LSX2RI5_VVI<0x72918000, simm5>;
323def VMAX_BU : LSX3R_VVV<0x70740000>;
324def VMAX_HU : LSX3R_VVV<0x70748000>;
325def VMAX_WU : LSX3R_VVV<0x70750000>;
326def VMAX_DU : LSX3R_VVV<0x70758000>;
327def VMAXI_BU : LSX2RI5_VVI<0x72940000>;
328def VMAXI_HU : LSX2RI5_VVI<0x72948000>;
329def VMAXI_WU : LSX2RI5_VVI<0x72950000>;
330def VMAXI_DU : LSX2RI5_VVI<0x72958000>;
331
332def VMIN_B : LSX3R_VVV<0x70720000>;
333def VMIN_H : LSX3R_VVV<0x70728000>;
334def VMIN_W : LSX3R_VVV<0x70730000>;
335def VMIN_D : LSX3R_VVV<0x70738000>;
336def VMINI_B : LSX2RI5_VVI<0x72920000, simm5>;
337def VMINI_H : LSX2RI5_VVI<0x72928000, simm5>;
338def VMINI_W : LSX2RI5_VVI<0x72930000, simm5>;
339def VMINI_D : LSX2RI5_VVI<0x72938000, simm5>;
340def VMIN_BU : LSX3R_VVV<0x70760000>;
341def VMIN_HU : LSX3R_VVV<0x70768000>;
342def VMIN_WU : LSX3R_VVV<0x70770000>;
343def VMIN_DU : LSX3R_VVV<0x70778000>;
344def VMINI_BU : LSX2RI5_VVI<0x72960000>;
345def VMINI_HU : LSX2RI5_VVI<0x72968000>;
346def VMINI_WU : LSX2RI5_VVI<0x72970000>;
347def VMINI_DU : LSX2RI5_VVI<0x72978000>;
348
349def VMUL_B : LSX3R_VVV<0x70840000>;
350def VMUL_H : LSX3R_VVV<0x70848000>;
351def VMUL_W : LSX3R_VVV<0x70850000>;
352def VMUL_D : LSX3R_VVV<0x70858000>;
353
354def VMUH_B : LSX3R_VVV<0x70860000>;
355def VMUH_H : LSX3R_VVV<0x70868000>;
356def VMUH_W : LSX3R_VVV<0x70870000>;
357def VMUH_D : LSX3R_VVV<0x70878000>;
358def VMUH_BU : LSX3R_VVV<0x70880000>;
359def VMUH_HU : LSX3R_VVV<0x70888000>;
360def VMUH_WU : LSX3R_VVV<0x70890000>;
361def VMUH_DU : LSX3R_VVV<0x70898000>;
362
363def VMULWEV_H_B : LSX3R_VVV<0x70900000>;
364def VMULWEV_W_H : LSX3R_VVV<0x70908000>;
365def VMULWEV_D_W : LSX3R_VVV<0x70910000>;
366def VMULWEV_Q_D : LSX3R_VVV<0x70918000>;
367def VMULWOD_H_B : LSX3R_VVV<0x70920000>;
368def VMULWOD_W_H : LSX3R_VVV<0x70928000>;
369def VMULWOD_D_W : LSX3R_VVV<0x70930000>;
370def VMULWOD_Q_D : LSX3R_VVV<0x70938000>;
371def VMULWEV_H_BU : LSX3R_VVV<0x70980000>;
372def VMULWEV_W_HU : LSX3R_VVV<0x70988000>;
373def VMULWEV_D_WU : LSX3R_VVV<0x70990000>;
374def VMULWEV_Q_DU : LSX3R_VVV<0x70998000>;
375def VMULWOD_H_BU : LSX3R_VVV<0x709a0000>;
376def VMULWOD_W_HU : LSX3R_VVV<0x709a8000>;
377def VMULWOD_D_WU : LSX3R_VVV<0x709b0000>;
378def VMULWOD_Q_DU : LSX3R_VVV<0x709b8000>;
379def VMULWEV_H_BU_B : LSX3R_VVV<0x70a00000>;
380def VMULWEV_W_HU_H : LSX3R_VVV<0x70a08000>;
381def VMULWEV_D_WU_W : LSX3R_VVV<0x70a10000>;
382def VMULWEV_Q_DU_D : LSX3R_VVV<0x70a18000>;
383def VMULWOD_H_BU_B : LSX3R_VVV<0x70a20000>;
384def VMULWOD_W_HU_H : LSX3R_VVV<0x70a28000>;
385def VMULWOD_D_WU_W : LSX3R_VVV<0x70a30000>;
386def VMULWOD_Q_DU_D : LSX3R_VVV<0x70a38000>;
387
388def VMADD_B : LSX3R_VVVV<0x70a80000>;
389def VMADD_H : LSX3R_VVVV<0x70a88000>;
390def VMADD_W : LSX3R_VVVV<0x70a90000>;
391def VMADD_D : LSX3R_VVVV<0x70a98000>;
392
393def VMSUB_B : LSX3R_VVVV<0x70aa0000>;
394def VMSUB_H : LSX3R_VVVV<0x70aa8000>;
395def VMSUB_W : LSX3R_VVVV<0x70ab0000>;
396def VMSUB_D : LSX3R_VVVV<0x70ab8000>;
397
398def VMADDWEV_H_B : LSX3R_VVVV<0x70ac0000>;
399def VMADDWEV_W_H : LSX3R_VVVV<0x70ac8000>;
400def VMADDWEV_D_W : LSX3R_VVVV<0x70ad0000>;
401def VMADDWEV_Q_D : LSX3R_VVVV<0x70ad8000>;
402def VMADDWOD_H_B : LSX3R_VVVV<0x70ae0000>;
403def VMADDWOD_W_H : LSX3R_VVVV<0x70ae8000>;
404def VMADDWOD_D_W : LSX3R_VVVV<0x70af0000>;
405def VMADDWOD_Q_D : LSX3R_VVVV<0x70af8000>;
406def VMADDWEV_H_BU : LSX3R_VVVV<0x70b40000>;
407def VMADDWEV_W_HU : LSX3R_VVVV<0x70b48000>;
408def VMADDWEV_D_WU : LSX3R_VVVV<0x70b50000>;
409def VMADDWEV_Q_DU : LSX3R_VVVV<0x70b58000>;
410def VMADDWOD_H_BU : LSX3R_VVVV<0x70b60000>;
411def VMADDWOD_W_HU : LSX3R_VVVV<0x70b68000>;
412def VMADDWOD_D_WU : LSX3R_VVVV<0x70b70000>;
413def VMADDWOD_Q_DU : LSX3R_VVVV<0x70b78000>;
414def VMADDWEV_H_BU_B : LSX3R_VVVV<0x70bc0000>;
415def VMADDWEV_W_HU_H : LSX3R_VVVV<0x70bc8000>;
416def VMADDWEV_D_WU_W : LSX3R_VVVV<0x70bd0000>;
417def VMADDWEV_Q_DU_D : LSX3R_VVVV<0x70bd8000>;
418def VMADDWOD_H_BU_B : LSX3R_VVVV<0x70be0000>;
419def VMADDWOD_W_HU_H : LSX3R_VVVV<0x70be8000>;
420def VMADDWOD_D_WU_W : LSX3R_VVVV<0x70bf0000>;
421def VMADDWOD_Q_DU_D : LSX3R_VVVV<0x70bf8000>;
422
423def VDIV_B : LSX3R_VVV<0x70e00000>;
424def VDIV_H : LSX3R_VVV<0x70e08000>;
425def VDIV_W : LSX3R_VVV<0x70e10000>;
426def VDIV_D : LSX3R_VVV<0x70e18000>;
427def VDIV_BU : LSX3R_VVV<0x70e40000>;
428def VDIV_HU : LSX3R_VVV<0x70e48000>;
429def VDIV_WU : LSX3R_VVV<0x70e50000>;
430def VDIV_DU : LSX3R_VVV<0x70e58000>;
431
432def VMOD_B : LSX3R_VVV<0x70e20000>;
433def VMOD_H : LSX3R_VVV<0x70e28000>;
434def VMOD_W : LSX3R_VVV<0x70e30000>;
435def VMOD_D : LSX3R_VVV<0x70e38000>;
436def VMOD_BU : LSX3R_VVV<0x70e60000>;
437def VMOD_HU : LSX3R_VVV<0x70e68000>;
438def VMOD_WU : LSX3R_VVV<0x70e70000>;
439def VMOD_DU : LSX3R_VVV<0x70e78000>;
440
441def VSAT_B : LSX2RI3_VVI<0x73242000>;
442def VSAT_H : LSX2RI4_VVI<0x73244000>;
443def VSAT_W : LSX2RI5_VVI<0x73248000>;
444def VSAT_D : LSX2RI6_VVI<0x73250000>;
445def VSAT_BU : LSX2RI3_VVI<0x73282000>;
446def VSAT_HU : LSX2RI4_VVI<0x73284000>;
447def VSAT_WU : LSX2RI5_VVI<0x73288000>;
448def VSAT_DU : LSX2RI6_VVI<0x73290000>;
449
450def VEXTH_H_B : LSX2R_VV<0x729ee000>;
451def VEXTH_W_H : LSX2R_VV<0x729ee400>;
452def VEXTH_D_W : LSX2R_VV<0x729ee800>;
453def VEXTH_Q_D : LSX2R_VV<0x729eec00>;
454def VEXTH_HU_BU : LSX2R_VV<0x729ef000>;
455def VEXTH_WU_HU : LSX2R_VV<0x729ef400>;
456def VEXTH_DU_WU : LSX2R_VV<0x729ef800>;
457def VEXTH_QU_DU : LSX2R_VV<0x729efc00>;
458
459def VSIGNCOV_B : LSX3R_VVV<0x712e0000>;
460def VSIGNCOV_H : LSX3R_VVV<0x712e8000>;
461def VSIGNCOV_W : LSX3R_VVV<0x712f0000>;
462def VSIGNCOV_D : LSX3R_VVV<0x712f8000>;
463
464def VMSKLTZ_B : LSX2R_VV<0x729c4000>;
465def VMSKLTZ_H : LSX2R_VV<0x729c4400>;
466def VMSKLTZ_W : LSX2R_VV<0x729c4800>;
467def VMSKLTZ_D : LSX2R_VV<0x729c4c00>;
468
469def VMSKGEZ_B : LSX2R_VV<0x729c5000>;
470
471def VMSKNZ_B : LSX2R_VV<0x729c6000>;
472
473def VLDI : LSX1RI13_VI<0x73e00000>;
474
475def VAND_V : LSX3R_VVV<0x71260000>;
476def VOR_V : LSX3R_VVV<0x71268000>;
477def VXOR_V : LSX3R_VVV<0x71270000>;
478def VNOR_V : LSX3R_VVV<0x71278000>;
479def VANDN_V : LSX3R_VVV<0x71280000>;
480def VORN_V : LSX3R_VVV<0x71288000>;
481
482def VANDI_B : LSX2RI8_VVI<0x73d00000>;
483def VORI_B : LSX2RI8_VVI<0x73d40000>;
484def VXORI_B : LSX2RI8_VVI<0x73d80000>;
485def VNORI_B : LSX2RI8_VVI<0x73dc0000>;
486
487def VSLL_B : LSX3R_VVV<0x70e80000>;
488def VSLL_H : LSX3R_VVV<0x70e88000>;
489def VSLL_W : LSX3R_VVV<0x70e90000>;
490def VSLL_D : LSX3R_VVV<0x70e98000>;
491def VSLLI_B : LSX2RI3_VVI<0x732c2000>;
492def VSLLI_H : LSX2RI4_VVI<0x732c4000>;
493def VSLLI_W : LSX2RI5_VVI<0x732c8000>;
494def VSLLI_D : LSX2RI6_VVI<0x732d0000>;
495
496def VSRL_B : LSX3R_VVV<0x70ea0000>;
497def VSRL_H : LSX3R_VVV<0x70ea8000>;
498def VSRL_W : LSX3R_VVV<0x70eb0000>;
499def VSRL_D : LSX3R_VVV<0x70eb8000>;
500def VSRLI_B : LSX2RI3_VVI<0x73302000>;
501def VSRLI_H : LSX2RI4_VVI<0x73304000>;
502def VSRLI_W : LSX2RI5_VVI<0x73308000>;
503def VSRLI_D : LSX2RI6_VVI<0x73310000>;
504
505def VSRA_B : LSX3R_VVV<0x70ec0000>;
506def VSRA_H : LSX3R_VVV<0x70ec8000>;
507def VSRA_W : LSX3R_VVV<0x70ed0000>;
508def VSRA_D : LSX3R_VVV<0x70ed8000>;
509def VSRAI_B : LSX2RI3_VVI<0x73342000>;
510def VSRAI_H : LSX2RI4_VVI<0x73344000>;
511def VSRAI_W : LSX2RI5_VVI<0x73348000>;
512def VSRAI_D : LSX2RI6_VVI<0x73350000>;
513
514def VROTR_B : LSX3R_VVV<0x70ee0000>;
515def VROTR_H : LSX3R_VVV<0x70ee8000>;
516def VROTR_W : LSX3R_VVV<0x70ef0000>;
517def VROTR_D : LSX3R_VVV<0x70ef8000>;
518def VROTRI_B : LSX2RI3_VVI<0x72a02000>;
519def VROTRI_H : LSX2RI4_VVI<0x72a04000>;
520def VROTRI_W : LSX2RI5_VVI<0x72a08000>;
521def VROTRI_D : LSX2RI6_VVI<0x72a10000>;
522
523def VSLLWIL_H_B : LSX2RI3_VVI<0x73082000>;
524def VSLLWIL_W_H : LSX2RI4_VVI<0x73084000>;
525def VSLLWIL_D_W : LSX2RI5_VVI<0x73088000>;
526def VEXTL_Q_D : LSX2R_VV<0x73090000>;
527def VSLLWIL_HU_BU : LSX2RI3_VVI<0x730c2000>;
528def VSLLWIL_WU_HU : LSX2RI4_VVI<0x730c4000>;
529def VSLLWIL_DU_WU : LSX2RI5_VVI<0x730c8000>;
530def VEXTL_QU_DU : LSX2R_VV<0x730d0000>;
531
532def VSRLR_B : LSX3R_VVV<0x70f00000>;
533def VSRLR_H : LSX3R_VVV<0x70f08000>;
534def VSRLR_W : LSX3R_VVV<0x70f10000>;
535def VSRLR_D : LSX3R_VVV<0x70f18000>;
536def VSRLRI_B : LSX2RI3_VVI<0x72a42000>;
537def VSRLRI_H : LSX2RI4_VVI<0x72a44000>;
538def VSRLRI_W : LSX2RI5_VVI<0x72a48000>;
539def VSRLRI_D : LSX2RI6_VVI<0x72a50000>;
540
541def VSRAR_B : LSX3R_VVV<0x70f20000>;
542def VSRAR_H : LSX3R_VVV<0x70f28000>;
543def VSRAR_W : LSX3R_VVV<0x70f30000>;
544def VSRAR_D : LSX3R_VVV<0x70f38000>;
545def VSRARI_B : LSX2RI3_VVI<0x72a82000>;
546def VSRARI_H : LSX2RI4_VVI<0x72a84000>;
547def VSRARI_W : LSX2RI5_VVI<0x72a88000>;
548def VSRARI_D : LSX2RI6_VVI<0x72a90000>;
549
550def VSRLN_B_H : LSX3R_VVV<0x70f48000>;
551def VSRLN_H_W : LSX3R_VVV<0x70f50000>;
552def VSRLN_W_D : LSX3R_VVV<0x70f58000>;
553def VSRAN_B_H : LSX3R_VVV<0x70f68000>;
554def VSRAN_H_W : LSX3R_VVV<0x70f70000>;
555def VSRAN_W_D : LSX3R_VVV<0x70f78000>;
556
557def VSRLNI_B_H : LSX2RI4_VVVI<0x73404000>;
558def VSRLNI_H_W : LSX2RI5_VVVI<0x73408000>;
559def VSRLNI_W_D : LSX2RI6_VVVI<0x73410000>;
560def VSRLNI_D_Q : LSX2RI7_VVVI<0x73420000>;
561def VSRANI_B_H : LSX2RI4_VVVI<0x73584000>;
562def VSRANI_H_W : LSX2RI5_VVVI<0x73588000>;
563def VSRANI_W_D : LSX2RI6_VVVI<0x73590000>;
564def VSRANI_D_Q : LSX2RI7_VVVI<0x735a0000>;
565
566def VSRLRN_B_H : LSX3R_VVV<0x70f88000>;
567def VSRLRN_H_W : LSX3R_VVV<0x70f90000>;
568def VSRLRN_W_D : LSX3R_VVV<0x70f98000>;
569def VSRARN_B_H : LSX3R_VVV<0x70fa8000>;
570def VSRARN_H_W : LSX3R_VVV<0x70fb0000>;
571def VSRARN_W_D : LSX3R_VVV<0x70fb8000>;
572
573def VSRLRNI_B_H : LSX2RI4_VVVI<0x73444000>;
574def VSRLRNI_H_W : LSX2RI5_VVVI<0x73448000>;
575def VSRLRNI_W_D : LSX2RI6_VVVI<0x73450000>;
576def VSRLRNI_D_Q : LSX2RI7_VVVI<0x73460000>;
577def VSRARNI_B_H : LSX2RI4_VVVI<0x735c4000>;
578def VSRARNI_H_W : LSX2RI5_VVVI<0x735c8000>;
579def VSRARNI_W_D : LSX2RI6_VVVI<0x735d0000>;
580def VSRARNI_D_Q : LSX2RI7_VVVI<0x735e0000>;
581
582def VSSRLN_B_H : LSX3R_VVV<0x70fc8000>;
583def VSSRLN_H_W : LSX3R_VVV<0x70fd0000>;
584def VSSRLN_W_D : LSX3R_VVV<0x70fd8000>;
585def VSSRAN_B_H : LSX3R_VVV<0x70fe8000>;
586def VSSRAN_H_W : LSX3R_VVV<0x70ff0000>;
587def VSSRAN_W_D : LSX3R_VVV<0x70ff8000>;
588def VSSRLN_BU_H : LSX3R_VVV<0x71048000>;
589def VSSRLN_HU_W : LSX3R_VVV<0x71050000>;
590def VSSRLN_WU_D : LSX3R_VVV<0x71058000>;
591def VSSRAN_BU_H : LSX3R_VVV<0x71068000>;
592def VSSRAN_HU_W : LSX3R_VVV<0x71070000>;
593def VSSRAN_WU_D : LSX3R_VVV<0x71078000>;
594
595def VSSRLNI_B_H : LSX2RI4_VVVI<0x73484000>;
596def VSSRLNI_H_W : LSX2RI5_VVVI<0x73488000>;
597def VSSRLNI_W_D : LSX2RI6_VVVI<0x73490000>;
598def VSSRLNI_D_Q : LSX2RI7_VVVI<0x734a0000>;
599def VSSRANI_B_H : LSX2RI4_VVVI<0x73604000>;
600def VSSRANI_H_W : LSX2RI5_VVVI<0x73608000>;
601def VSSRANI_W_D : LSX2RI6_VVVI<0x73610000>;
602def VSSRANI_D_Q : LSX2RI7_VVVI<0x73620000>;
603def VSSRLNI_BU_H : LSX2RI4_VVVI<0x734c4000>;
604def VSSRLNI_HU_W : LSX2RI5_VVVI<0x734c8000>;
605def VSSRLNI_WU_D : LSX2RI6_VVVI<0x734d0000>;
606def VSSRLNI_DU_Q : LSX2RI7_VVVI<0x734e0000>;
607def VSSRANI_BU_H : LSX2RI4_VVVI<0x73644000>;
608def VSSRANI_HU_W : LSX2RI5_VVVI<0x73648000>;
609def VSSRANI_WU_D : LSX2RI6_VVVI<0x73650000>;
610def VSSRANI_DU_Q : LSX2RI7_VVVI<0x73660000>;
611
612def VSSRLRN_B_H : LSX3R_VVV<0x71008000>;
613def VSSRLRN_H_W : LSX3R_VVV<0x71010000>;
614def VSSRLRN_W_D : LSX3R_VVV<0x71018000>;
615def VSSRARN_B_H : LSX3R_VVV<0x71028000>;
616def VSSRARN_H_W : LSX3R_VVV<0x71030000>;
617def VSSRARN_W_D : LSX3R_VVV<0x71038000>;
618def VSSRLRN_BU_H : LSX3R_VVV<0x71088000>;
619def VSSRLRN_HU_W : LSX3R_VVV<0x71090000>;
620def VSSRLRN_WU_D : LSX3R_VVV<0x71098000>;
621def VSSRARN_BU_H : LSX3R_VVV<0x710a8000>;
622def VSSRARN_HU_W : LSX3R_VVV<0x710b0000>;
623def VSSRARN_WU_D : LSX3R_VVV<0x710b8000>;
624
625def VSSRLRNI_B_H : LSX2RI4_VVVI<0x73504000>;
626def VSSRLRNI_H_W : LSX2RI5_VVVI<0x73508000>;
627def VSSRLRNI_W_D : LSX2RI6_VVVI<0x73510000>;
628def VSSRLRNI_D_Q : LSX2RI7_VVVI<0x73520000>;
629def VSSRARNI_B_H : LSX2RI4_VVVI<0x73684000>;
630def VSSRARNI_H_W : LSX2RI5_VVVI<0x73688000>;
631def VSSRARNI_W_D : LSX2RI6_VVVI<0x73690000>;
632def VSSRARNI_D_Q : LSX2RI7_VVVI<0x736a0000>;
633def VSSRLRNI_BU_H : LSX2RI4_VVVI<0x73544000>;
634def VSSRLRNI_HU_W : LSX2RI5_VVVI<0x73548000>;
635def VSSRLRNI_WU_D : LSX2RI6_VVVI<0x73550000>;
636def VSSRLRNI_DU_Q : LSX2RI7_VVVI<0x73560000>;
637def VSSRARNI_BU_H : LSX2RI4_VVVI<0x736c4000>;
638def VSSRARNI_HU_W : LSX2RI5_VVVI<0x736c8000>;
639def VSSRARNI_WU_D : LSX2RI6_VVVI<0x736d0000>;
640def VSSRARNI_DU_Q : LSX2RI7_VVVI<0x736e0000>;
641
642def VCLO_B : LSX2R_VV<0x729c0000>;
643def VCLO_H : LSX2R_VV<0x729c0400>;
644def VCLO_W : LSX2R_VV<0x729c0800>;
645def VCLO_D : LSX2R_VV<0x729c0c00>;
646def VCLZ_B : LSX2R_VV<0x729c1000>;
647def VCLZ_H : LSX2R_VV<0x729c1400>;
648def VCLZ_W : LSX2R_VV<0x729c1800>;
649def VCLZ_D : LSX2R_VV<0x729c1c00>;
650
651def VPCNT_B : LSX2R_VV<0x729c2000>;
652def VPCNT_H : LSX2R_VV<0x729c2400>;
653def VPCNT_W : LSX2R_VV<0x729c2800>;
654def VPCNT_D : LSX2R_VV<0x729c2c00>;
655
656def VBITCLR_B : LSX3R_VVV<0x710c0000>;
657def VBITCLR_H : LSX3R_VVV<0x710c8000>;
658def VBITCLR_W : LSX3R_VVV<0x710d0000>;
659def VBITCLR_D : LSX3R_VVV<0x710d8000>;
660def VBITCLRI_B : LSX2RI3_VVI<0x73102000>;
661def VBITCLRI_H : LSX2RI4_VVI<0x73104000>;
662def VBITCLRI_W : LSX2RI5_VVI<0x73108000>;
663def VBITCLRI_D : LSX2RI6_VVI<0x73110000>;
664
665def VBITSET_B : LSX3R_VVV<0x710e0000>;
666def VBITSET_H : LSX3R_VVV<0x710e8000>;
667def VBITSET_W : LSX3R_VVV<0x710f0000>;
668def VBITSET_D : LSX3R_VVV<0x710f8000>;
669def VBITSETI_B : LSX2RI3_VVI<0x73142000>;
670def VBITSETI_H : LSX2RI4_VVI<0x73144000>;
671def VBITSETI_W : LSX2RI5_VVI<0x73148000>;
672def VBITSETI_D : LSX2RI6_VVI<0x73150000>;
673
674def VBITREV_B : LSX3R_VVV<0x71100000>;
675def VBITREV_H : LSX3R_VVV<0x71108000>;
676def VBITREV_W : LSX3R_VVV<0x71110000>;
677def VBITREV_D : LSX3R_VVV<0x71118000>;
678def VBITREVI_B : LSX2RI3_VVI<0x73182000>;
679def VBITREVI_H : LSX2RI4_VVI<0x73184000>;
680def VBITREVI_W : LSX2RI5_VVI<0x73188000>;
681def VBITREVI_D : LSX2RI6_VVI<0x73190000>;
682
683def VFRSTP_B : LSX3R_VVVV<0x712b0000>;
684def VFRSTP_H : LSX3R_VVVV<0x712b8000>;
685def VFRSTPI_B : LSX2RI5_VVVI<0x729a0000>;
686def VFRSTPI_H : LSX2RI5_VVVI<0x729a8000>;
687
688def VFADD_S : LSX3R_VVV<0x71308000>;
689def VFADD_D : LSX3R_VVV<0x71310000>;
690def VFSUB_S : LSX3R_VVV<0x71328000>;
691def VFSUB_D : LSX3R_VVV<0x71330000>;
692def VFMUL_S : LSX3R_VVV<0x71388000>;
693def VFMUL_D : LSX3R_VVV<0x71390000>;
694def VFDIV_S : LSX3R_VVV<0x713a8000>;
695def VFDIV_D : LSX3R_VVV<0x713b0000>;
696
697def VFMADD_S : LSX4R_VVVV<0x09100000>;
698def VFMADD_D : LSX4R_VVVV<0x09200000>;
699def VFMSUB_S : LSX4R_VVVV<0x09500000>;
700def VFMSUB_D : LSX4R_VVVV<0x09600000>;
701def VFNMADD_S : LSX4R_VVVV<0x09900000>;
702def VFNMADD_D : LSX4R_VVVV<0x09a00000>;
703def VFNMSUB_S : LSX4R_VVVV<0x09d00000>;
704def VFNMSUB_D : LSX4R_VVVV<0x09e00000>;
705
706def VFMAX_S : LSX3R_VVV<0x713c8000>;
707def VFMAX_D : LSX3R_VVV<0x713d0000>;
708def VFMIN_S : LSX3R_VVV<0x713e8000>;
709def VFMIN_D : LSX3R_VVV<0x713f0000>;
710
711def VFMAXA_S : LSX3R_VVV<0x71408000>;
712def VFMAXA_D : LSX3R_VVV<0x71410000>;
713def VFMINA_S : LSX3R_VVV<0x71428000>;
714def VFMINA_D : LSX3R_VVV<0x71430000>;
715
716def VFLOGB_S : LSX2R_VV<0x729cc400>;
717def VFLOGB_D : LSX2R_VV<0x729cc800>;
718
719def VFCLASS_S : LSX2R_VV<0x729cd400>;
720def VFCLASS_D : LSX2R_VV<0x729cd800>;
721
722def VFSQRT_S : LSX2R_VV<0x729ce400>;
723def VFSQRT_D : LSX2R_VV<0x729ce800>;
724def VFRECIP_S : LSX2R_VV<0x729cf400>;
725def VFRECIP_D : LSX2R_VV<0x729cf800>;
726def VFRSQRT_S : LSX2R_VV<0x729d0400>;
727def VFRSQRT_D : LSX2R_VV<0x729d0800>;
728
729def VFCVTL_S_H : LSX2R_VV<0x729de800>;
730def VFCVTH_S_H : LSX2R_VV<0x729dec00>;
731def VFCVTL_D_S : LSX2R_VV<0x729df000>;
732def VFCVTH_D_S : LSX2R_VV<0x729df400>;
733def VFCVT_H_S : LSX3R_VVV<0x71460000>;
734def VFCVT_S_D : LSX3R_VVV<0x71468000>;
735
736def VFRINTRNE_S : LSX2R_VV<0x729d7400>;
737def VFRINTRNE_D : LSX2R_VV<0x729d7800>;
738def VFRINTRZ_S : LSX2R_VV<0x729d6400>;
739def VFRINTRZ_D : LSX2R_VV<0x729d6800>;
740def VFRINTRP_S : LSX2R_VV<0x729d5400>;
741def VFRINTRP_D : LSX2R_VV<0x729d5800>;
742def VFRINTRM_S : LSX2R_VV<0x729d4400>;
743def VFRINTRM_D : LSX2R_VV<0x729d4800>;
744def VFRINT_S : LSX2R_VV<0x729d3400>;
745def VFRINT_D : LSX2R_VV<0x729d3800>;
746
747def VFTINTRNE_W_S : LSX2R_VV<0x729e5000>;
748def VFTINTRNE_L_D : LSX2R_VV<0x729e5400>;
749def VFTINTRZ_W_S : LSX2R_VV<0x729e4800>;
750def VFTINTRZ_L_D : LSX2R_VV<0x729e4c00>;
751def VFTINTRP_W_S : LSX2R_VV<0x729e4000>;
752def VFTINTRP_L_D : LSX2R_VV<0x729e4400>;
753def VFTINTRM_W_S : LSX2R_VV<0x729e3800>;
754def VFTINTRM_L_D : LSX2R_VV<0x729e3c00>;
755def VFTINT_W_S : LSX2R_VV<0x729e3000>;
756def VFTINT_L_D : LSX2R_VV<0x729e3400>;
757def VFTINTRZ_WU_S : LSX2R_VV<0x729e7000>;
758def VFTINTRZ_LU_D : LSX2R_VV<0x729e7400>;
759def VFTINT_WU_S : LSX2R_VV<0x729e5800>;
760def VFTINT_LU_D : LSX2R_VV<0x729e5c00>;
761
762def VFTINTRNE_W_D : LSX3R_VVV<0x714b8000>;
763def VFTINTRZ_W_D : LSX3R_VVV<0x714b0000>;
764def VFTINTRP_W_D : LSX3R_VVV<0x714a8000>;
765def VFTINTRM_W_D : LSX3R_VVV<0x714a0000>;
766def VFTINT_W_D : LSX3R_VVV<0x71498000>;
767
768def VFTINTRNEL_L_S : LSX2R_VV<0x729ea000>;
769def VFTINTRNEH_L_S : LSX2R_VV<0x729ea400>;
770def VFTINTRZL_L_S : LSX2R_VV<0x729e9800>;
771def VFTINTRZH_L_S : LSX2R_VV<0x729e9c00>;
772def VFTINTRPL_L_S : LSX2R_VV<0x729e9000>;
773def VFTINTRPH_L_S : LSX2R_VV<0x729e9400>;
774def VFTINTRML_L_S : LSX2R_VV<0x729e8800>;
775def VFTINTRMH_L_S : LSX2R_VV<0x729e8c00>;
776def VFTINTL_L_S : LSX2R_VV<0x729e8000>;
777def VFTINTH_L_S : LSX2R_VV<0x729e8400>;
778
779def VFFINT_S_W : LSX2R_VV<0x729e0000>;
780def VFFINT_D_L : LSX2R_VV<0x729e0800>;
781def VFFINT_S_WU : LSX2R_VV<0x729e0400>;
782def VFFINT_D_LU : LSX2R_VV<0x729e0c00>;
783def VFFINTL_D_W : LSX2R_VV<0x729e1000>;
784def VFFINTH_D_W : LSX2R_VV<0x729e1400>;
785def VFFINT_S_L : LSX3R_VVV<0x71480000>;
786
787def VSEQ_B : LSX3R_VVV<0x70000000>;
788def VSEQ_H : LSX3R_VVV<0x70008000>;
789def VSEQ_W : LSX3R_VVV<0x70010000>;
790def VSEQ_D : LSX3R_VVV<0x70018000>;
791def VSEQI_B : LSX2RI5_VVI<0x72800000, simm5>;
792def VSEQI_H : LSX2RI5_VVI<0x72808000, simm5>;
793def VSEQI_W : LSX2RI5_VVI<0x72810000, simm5>;
794def VSEQI_D : LSX2RI5_VVI<0x72818000, simm5>;
795
796def VSLE_B : LSX3R_VVV<0x70020000>;
797def VSLE_H : LSX3R_VVV<0x70028000>;
798def VSLE_W : LSX3R_VVV<0x70030000>;
799def VSLE_D : LSX3R_VVV<0x70038000>;
800def VSLEI_B : LSX2RI5_VVI<0x72820000, simm5>;
801def VSLEI_H : LSX2RI5_VVI<0x72828000, simm5>;
802def VSLEI_W : LSX2RI5_VVI<0x72830000, simm5>;
803def VSLEI_D : LSX2RI5_VVI<0x72838000, simm5>;
804
805def VSLE_BU : LSX3R_VVV<0x70040000>;
806def VSLE_HU : LSX3R_VVV<0x70048000>;
807def VSLE_WU : LSX3R_VVV<0x70050000>;
808def VSLE_DU : LSX3R_VVV<0x70058000>;
809def VSLEI_BU : LSX2RI5_VVI<0x72840000>;
810def VSLEI_HU : LSX2RI5_VVI<0x72848000>;
811def VSLEI_WU : LSX2RI5_VVI<0x72850000>;
812def VSLEI_DU : LSX2RI5_VVI<0x72858000>;
813
814def VSLT_B : LSX3R_VVV<0x70060000>;
815def VSLT_H : LSX3R_VVV<0x70068000>;
816def VSLT_W : LSX3R_VVV<0x70070000>;
817def VSLT_D : LSX3R_VVV<0x70078000>;
818def VSLTI_B : LSX2RI5_VVI<0x72860000, simm5>;
819def VSLTI_H : LSX2RI5_VVI<0x72868000, simm5>;
820def VSLTI_W : LSX2RI5_VVI<0x72870000, simm5>;
821def VSLTI_D : LSX2RI5_VVI<0x72878000, simm5>;
822
823def VSLT_BU : LSX3R_VVV<0x70080000>;
824def VSLT_HU : LSX3R_VVV<0x70088000>;
825def VSLT_WU : LSX3R_VVV<0x70090000>;
826def VSLT_DU : LSX3R_VVV<0x70098000>;
827def VSLTI_BU : LSX2RI5_VVI<0x72880000>;
828def VSLTI_HU : LSX2RI5_VVI<0x72888000>;
829def VSLTI_WU : LSX2RI5_VVI<0x72890000>;
830def VSLTI_DU : LSX2RI5_VVI<0x72898000>;
831
832def VFCMP_CAF_S : LSX3R_VVV<0x0c500000>;
833def VFCMP_SAF_S : LSX3R_VVV<0x0c508000>;
834def VFCMP_CLT_S : LSX3R_VVV<0x0c510000>;
835def VFCMP_SLT_S : LSX3R_VVV<0x0c518000>;
836def VFCMP_CEQ_S : LSX3R_VVV<0x0c520000>;
837def VFCMP_SEQ_S : LSX3R_VVV<0x0c528000>;
838def VFCMP_CLE_S : LSX3R_VVV<0x0c530000>;
839def VFCMP_SLE_S : LSX3R_VVV<0x0c538000>;
840def VFCMP_CUN_S : LSX3R_VVV<0x0c540000>;
841def VFCMP_SUN_S : LSX3R_VVV<0x0c548000>;
842def VFCMP_CULT_S : LSX3R_VVV<0x0c550000>;
843def VFCMP_SULT_S : LSX3R_VVV<0x0c558000>;
844def VFCMP_CUEQ_S : LSX3R_VVV<0x0c560000>;
845def VFCMP_SUEQ_S : LSX3R_VVV<0x0c568000>;
846def VFCMP_CULE_S : LSX3R_VVV<0x0c570000>;
847def VFCMP_SULE_S : LSX3R_VVV<0x0c578000>;
848def VFCMP_CNE_S : LSX3R_VVV<0x0c580000>;
849def VFCMP_SNE_S : LSX3R_VVV<0x0c588000>;
850def VFCMP_COR_S : LSX3R_VVV<0x0c5a0000>;
851def VFCMP_SOR_S : LSX3R_VVV<0x0c5a8000>;
852def VFCMP_CUNE_S : LSX3R_VVV<0x0c5c0000>;
853def VFCMP_SUNE_S : LSX3R_VVV<0x0c5c8000>;
854
855def VFCMP_CAF_D : LSX3R_VVV<0x0c600000>;
856def VFCMP_SAF_D : LSX3R_VVV<0x0c608000>;
857def VFCMP_CLT_D : LSX3R_VVV<0x0c610000>;
858def VFCMP_SLT_D : LSX3R_VVV<0x0c618000>;
859def VFCMP_CEQ_D : LSX3R_VVV<0x0c620000>;
860def VFCMP_SEQ_D : LSX3R_VVV<0x0c628000>;
861def VFCMP_CLE_D : LSX3R_VVV<0x0c630000>;
862def VFCMP_SLE_D : LSX3R_VVV<0x0c638000>;
863def VFCMP_CUN_D : LSX3R_VVV<0x0c640000>;
864def VFCMP_SUN_D : LSX3R_VVV<0x0c648000>;
865def VFCMP_CULT_D : LSX3R_VVV<0x0c650000>;
866def VFCMP_SULT_D : LSX3R_VVV<0x0c658000>;
867def VFCMP_CUEQ_D : LSX3R_VVV<0x0c660000>;
868def VFCMP_SUEQ_D : LSX3R_VVV<0x0c668000>;
869def VFCMP_CULE_D : LSX3R_VVV<0x0c670000>;
870def VFCMP_SULE_D : LSX3R_VVV<0x0c678000>;
871def VFCMP_CNE_D : LSX3R_VVV<0x0c680000>;
872def VFCMP_SNE_D : LSX3R_VVV<0x0c688000>;
873def VFCMP_COR_D : LSX3R_VVV<0x0c6a0000>;
874def VFCMP_SOR_D : LSX3R_VVV<0x0c6a8000>;
875def VFCMP_CUNE_D : LSX3R_VVV<0x0c6c0000>;
876def VFCMP_SUNE_D : LSX3R_VVV<0x0c6c8000>;
877
878def VBITSEL_V : LSX4R_VVVV<0x0d100000>;
879
880def VBITSELI_B : LSX2RI8_VVVI<0x73c40000>;
881
882def VSETEQZ_V : LSX2R_CV<0x729c9800>;
883def VSETNEZ_V : LSX2R_CV<0x729c9c00>;
884def VSETANYEQZ_B : LSX2R_CV<0x729ca000>;
885def VSETANYEQZ_H : LSX2R_CV<0x729ca400>;
886def VSETANYEQZ_W : LSX2R_CV<0x729ca800>;
887def VSETANYEQZ_D : LSX2R_CV<0x729cac00>;
888def VSETALLNEZ_B : LSX2R_CV<0x729cb000>;
889def VSETALLNEZ_H : LSX2R_CV<0x729cb400>;
890def VSETALLNEZ_W : LSX2R_CV<0x729cb800>;
891def VSETALLNEZ_D : LSX2R_CV<0x729cbc00>;
892
893def VINSGR2VR_B : LSX2RI4_VVRI<0x72eb8000>;
894def VINSGR2VR_H : LSX2RI3_VVRI<0x72ebc000>;
895def VINSGR2VR_W : LSX2RI2_VVRI<0x72ebe000>;
896def VINSGR2VR_D : LSX2RI1_VVRI<0x72ebf000>;
897def VPICKVE2GR_B : LSX2RI4_RVI<0x72ef8000>;
898def VPICKVE2GR_H : LSX2RI3_RVI<0x72efc000>;
899def VPICKVE2GR_W : LSX2RI2_RVI<0x72efe000>;
900def VPICKVE2GR_D : LSX2RI1_RVI<0x72eff000>;
901def VPICKVE2GR_BU : LSX2RI4_RVI<0x72f38000>;
902def VPICKVE2GR_HU : LSX2RI3_RVI<0x72f3c000>;
903def VPICKVE2GR_WU : LSX2RI2_RVI<0x72f3e000>;
904def VPICKVE2GR_DU : LSX2RI1_RVI<0x72f3f000>;
905
906def VREPLGR2VR_B : LSX2R_VR<0x729f0000>;
907def VREPLGR2VR_H : LSX2R_VR<0x729f0400>;
908def VREPLGR2VR_W : LSX2R_VR<0x729f0800>;
909def VREPLGR2VR_D : LSX2R_VR<0x729f0c00>;
910
911def VREPLVE_B : LSX3R_VVR<0x71220000>;
912def VREPLVE_H : LSX3R_VVR<0x71228000>;
913def VREPLVE_W : LSX3R_VVR<0x71230000>;
914def VREPLVE_D : LSX3R_VVR<0x71238000>;
915def VREPLVEI_B : LSX2RI4_VVI<0x72f78000>;
916def VREPLVEI_H : LSX2RI3_VVI<0x72f7c000>;
917def VREPLVEI_W : LSX2RI2_VVI<0x72f7e000>;
918def VREPLVEI_D : LSX2RI1_VVI<0x72f7f000>;
919
920def VBSLL_V : LSX2RI5_VVI<0x728e0000>;
921def VBSRL_V : LSX2RI5_VVI<0x728e8000>;
922
923def VPACKEV_B : LSX3R_VVV<0x71160000>;
924def VPACKEV_H : LSX3R_VVV<0x71168000>;
925def VPACKEV_W : LSX3R_VVV<0x71170000>;
926def VPACKEV_D : LSX3R_VVV<0x71178000>;
927def VPACKOD_B : LSX3R_VVV<0x71180000>;
928def VPACKOD_H : LSX3R_VVV<0x71188000>;
929def VPACKOD_W : LSX3R_VVV<0x71190000>;
930def VPACKOD_D : LSX3R_VVV<0x71198000>;
931
932def VPICKEV_B : LSX3R_VVV<0x711e0000>;
933def VPICKEV_H : LSX3R_VVV<0x711e8000>;
934def VPICKEV_W : LSX3R_VVV<0x711f0000>;
935def VPICKEV_D : LSX3R_VVV<0x711f8000>;
936def VPICKOD_B : LSX3R_VVV<0x71200000>;
937def VPICKOD_H : LSX3R_VVV<0x71208000>;
938def VPICKOD_W : LSX3R_VVV<0x71210000>;
939def VPICKOD_D : LSX3R_VVV<0x71218000>;
940
941def VILVL_B : LSX3R_VVV<0x711a0000>;
942def VILVL_H : LSX3R_VVV<0x711a8000>;
943def VILVL_W : LSX3R_VVV<0x711b0000>;
944def VILVL_D : LSX3R_VVV<0x711b8000>;
945def VILVH_B : LSX3R_VVV<0x711c0000>;
946def VILVH_H : LSX3R_VVV<0x711c8000>;
947def VILVH_W : LSX3R_VVV<0x711d0000>;
948def VILVH_D : LSX3R_VVV<0x711d8000>;
949
950def VSHUF_B : LSX4R_VVVV<0x0d500000>;
951
952def VSHUF_H : LSX3R_VVVV<0x717a8000>;
953def VSHUF_W : LSX3R_VVVV<0x717b0000>;
954def VSHUF_D : LSX3R_VVVV<0x717b8000>;
955
956def VSHUF4I_B : LSX2RI8_VVI<0x73900000>;
957def VSHUF4I_H : LSX2RI8_VVI<0x73940000>;
958def VSHUF4I_W : LSX2RI8_VVI<0x73980000>;
959def VSHUF4I_D : LSX2RI8_VVVI<0x739c0000>;
960
961def VPERMI_W : LSX2RI8_VVVI<0x73e40000>;
962
963def VEXTRINS_D : LSX2RI8_VVVI<0x73800000>;
964def VEXTRINS_W : LSX2RI8_VVVI<0x73840000>;
965def VEXTRINS_H : LSX2RI8_VVVI<0x73880000>;
966def VEXTRINS_B : LSX2RI8_VVVI<0x738c0000>;
967} // mayLoad = 0, mayStore = 0
968
969let mayLoad = 1, mayStore = 0 in {
970def VLD : LSX2RI12_Load<0x2c000000>;
971def VLDX : LSX3R_Load<0x38400000>;
972
973def VLDREPL_B : LSX2RI12_Load<0x30800000>;
974def VLDREPL_H : LSX2RI11_Load<0x30400000>;
975def VLDREPL_W : LSX2RI10_Load<0x30200000>;
976def VLDREPL_D : LSX2RI9_Load<0x30100000>;
977} // mayLoad = 1, mayStore = 0
978
979let mayLoad = 0, mayStore = 1 in {
980def VST : LSX2RI12_Store<0x2c400000>;
981def VSTX : LSX3R_Store<0x38440000>;
982
983def VSTELM_B : LSX2RI8I4_VRII<0x31800000>;
984def VSTELM_H : LSX2RI8I3_VRII<0x31400000, simm8_lsl1>;
985def VSTELM_W : LSX2RI8I2_VRII<0x31200000, simm8_lsl2>;
986def VSTELM_D : LSX2RI8I1_VRII<0x31100000, simm8_lsl3>;
987} // mayLoad = 0, mayStore = 1
988
989} // hasSideEffects = 0, Predicates = [HasExtLSX]
990
991/// Pseudo-instructions
992
993let Predicates = [HasExtLSX] in {
994
995let hasSideEffects = 0, mayLoad = 0, mayStore = 0, isCodeGenOnly = 0,
996    isAsmParserOnly = 1 in {
997def PseudoVREPLI_B : Pseudo<(outs LSX128:$vd), (ins simm10:$imm), [],
998                            "vrepli.b", "$vd, $imm">;
999def PseudoVREPLI_H : Pseudo<(outs LSX128:$vd), (ins simm10:$imm), [],
1000                            "vrepli.h", "$vd, $imm">;
1001def PseudoVREPLI_W : Pseudo<(outs LSX128:$vd), (ins simm10:$imm), [],
1002                            "vrepli.w", "$vd, $imm">;
1003def PseudoVREPLI_D : Pseudo<(outs LSX128:$vd), (ins simm10:$imm), [],
1004                            "vrepli.d", "$vd, $imm">;
1005}
1006
1007} // Predicates = [HasExtLSX]
1008