1//=- LoongArchLASXInstrInfo.td - LoongArch LASX instructions -*- tablegen -*-=// 2// 3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4// See https://llvm.org/LICENSE.txt for license information. 5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6// 7//===----------------------------------------------------------------------===// 8// 9// This file describes the Advanced SIMD extension instructions. 10// 11//===----------------------------------------------------------------------===// 12 13def loongarch_xvpermi: SDNode<"LoongArchISD::XVPERMI", SDT_loongArchV1RUimm>; 14 15def lasxsplati8 16 : PatFrag<(ops node:$e0), 17 (v32i8 (build_vector node:$e0, node:$e0, node:$e0, node:$e0, 18 node:$e0, node:$e0, node:$e0, node:$e0, 19 node:$e0, node:$e0, node:$e0, node:$e0, 20 node:$e0, node:$e0, node:$e0, node:$e0, 21 node:$e0, node:$e0, node:$e0, node:$e0, 22 node:$e0, node:$e0, node:$e0, node:$e0, 23 node:$e0, node:$e0, node:$e0, node:$e0, 24 node:$e0, node:$e0, node:$e0, node:$e0))>; 25def lasxsplati16 26 : PatFrag<(ops node:$e0), 27 (v16i16 (build_vector node:$e0, node:$e0, node:$e0, node:$e0, 28 node:$e0, node:$e0, node:$e0, node:$e0, 29 node:$e0, node:$e0, node:$e0, node:$e0, 30 node:$e0, node:$e0, node:$e0, node:$e0))>; 31def lasxsplati32 32 : PatFrag<(ops node:$e0), 33 (v8i32 (build_vector node:$e0, node:$e0, node:$e0, node:$e0, 34 node:$e0, node:$e0, node:$e0, node:$e0))>; 35def lasxsplati64 36 : PatFrag<(ops node:$e0), 37 (v4i64 (build_vector node:$e0, node:$e0, node:$e0, node:$e0))>; 38def lasxsplatf32 39 : PatFrag<(ops node:$e0), 40 (v8f32 (build_vector node:$e0, node:$e0, node:$e0, node:$e0, 41 node:$e0, node:$e0, node:$e0, node:$e0))>; 42def lasxsplatf64 43 : PatFrag<(ops node:$e0), 44 (v4f64 (build_vector node:$e0, node:$e0, node:$e0, node:$e0))>; 45 46//===----------------------------------------------------------------------===// 47// Instruction class templates 48//===----------------------------------------------------------------------===// 49 50class LASX1RI13_XI<bits<32> op, Operand ImmOpnd = simm13> 51 : Fmt1RI13_XI<op, (outs LASX256:$xd), (ins ImmOpnd:$imm13), "$xd, $imm13">; 52 53class LASX2R_XX<bits<32> op> 54 : Fmt2R_XX<op, (outs LASX256:$xd), (ins LASX256:$xj), "$xd, $xj">; 55 56class LASX2R_XR<bits<32> op> 57 : Fmt2R_XR<op, (outs LASX256:$xd), (ins GPR:$rj), "$xd, $rj">; 58 59class LASX2R_CX<bits<32> op> 60 : Fmt2R_CX<op, (outs CFR:$cd), (ins LASX256:$xj), "$cd, $xj">; 61 62class LASX2RI1_XXI<bits<32> op, Operand ImmOpnd = uimm1> 63 : Fmt2RI1_XXI<op, (outs LASX256:$xd), (ins LASX256:$xj, ImmOpnd:$imm1), 64 "$xd, $xj, $imm1">; 65 66class LASX2RI2_XXI<bits<32> op, Operand ImmOpnd = uimm2> 67 : Fmt2RI2_XXI<op, (outs LASX256:$xd), (ins LASX256:$xj, ImmOpnd:$imm2), 68 "$xd, $xj, $imm2">; 69 70class LASX2RI2_RXI<bits<32> op, Operand ImmOpnd = uimm2> 71 : Fmt2RI2_RXI<op, (outs GPR:$rd), (ins LASX256:$xj, ImmOpnd:$imm2), 72 "$rd, $xj, $imm2">; 73 74class LASX2RI3_XXI<bits<32> op, Operand ImmOpnd = uimm3> 75 : Fmt2RI3_XXI<op, (outs LASX256:$xd), (ins LASX256:$xj, ImmOpnd:$imm3), 76 "$xd, $xj, $imm3">; 77 78class LASX2RI3_RXI<bits<32> op, Operand ImmOpnd = uimm3> 79 : Fmt2RI3_RXI<op, (outs GPR:$rd), (ins LASX256:$xj, ImmOpnd:$imm3), 80 "$rd, $xj, $imm3">; 81 82class LASX2RI4_XXI<bits<32> op, Operand ImmOpnd = uimm4> 83 : Fmt2RI4_XXI<op, (outs LASX256:$xd), (ins LASX256:$xj, ImmOpnd:$imm4), 84 "$xd, $xj, $imm4">; 85 86class LASX2RI4_XRI<bits<32> op, Operand ImmOpnd = uimm4> 87 : Fmt2RI4_XRI<op, (outs LASX256:$xd), (ins GPR:$rj, ImmOpnd:$imm4), 88 "$xd, $rj, $imm4">; 89 90class LASX2RI4_RXI<bits<32> op, Operand ImmOpnd = uimm4> 91 : Fmt2RI4_RXI<op, (outs GPR:$rd), (ins LASX256:$xj, ImmOpnd:$imm4), 92 "$rd, $xj, $imm4">; 93 94class LASX2RI5_XXI<bits<32> op, Operand ImmOpnd = uimm5> 95 : Fmt2RI5_XXI<op, (outs LASX256:$xd), (ins LASX256:$xj, ImmOpnd:$imm5), 96 "$xd, $xj, $imm5">; 97 98class LASX2RI6_XXI<bits<32> op, Operand ImmOpnd = uimm6> 99 : Fmt2RI6_XXI<op, (outs LASX256:$xd), (ins LASX256:$xj, ImmOpnd:$imm6), 100 "$xd, $xj, $imm6">; 101 102class LASX2RI8_XXI<bits<32> op, Operand ImmOpnd = uimm8> 103 : Fmt2RI8_XXI<op, (outs LASX256:$xd), (ins LASX256:$xj, ImmOpnd:$imm8), 104 "$xd, $xj, $imm8">; 105 106class LASX2RI8I2_XRII<bits<32> op, Operand ImmOpnd = simm8, 107 Operand IdxOpnd = uimm2> 108 : Fmt2RI8I2_XRII<op, (outs), 109 (ins LASX256:$xd, GPR:$rj, ImmOpnd:$imm8, IdxOpnd:$imm2), 110 "$xd, $rj, $imm8, $imm2">; 111class LASX2RI8I3_XRII<bits<32> op, Operand ImmOpnd = simm8, 112 Operand IdxOpnd = uimm3> 113 : Fmt2RI8I3_XRII<op, (outs), 114 (ins LASX256:$xd, GPR:$rj, ImmOpnd:$imm8, IdxOpnd:$imm3), 115 "$xd, $rj, $imm8, $imm3">; 116class LASX2RI8I4_XRII<bits<32> op, Operand ImmOpnd = simm8, 117 Operand IdxOpnd = uimm4> 118 : Fmt2RI8I4_XRII<op, (outs), 119 (ins LASX256:$xd, GPR:$rj, ImmOpnd:$imm8, IdxOpnd:$imm4), 120 "$xd, $rj, $imm8, $imm4">; 121class LASX2RI8I5_XRII<bits<32> op, Operand ImmOpnd = simm8, 122 Operand IdxOpnd = uimm5> 123 : Fmt2RI8I5_XRII<op, (outs), 124 (ins LASX256:$xd, GPR:$rj, ImmOpnd:$imm8, IdxOpnd:$imm5), 125 "$xd, $rj, $imm8, $imm5">; 126 127class LASX3R_XXX<bits<32> op> 128 : Fmt3R_XXX<op, (outs LASX256:$xd), (ins LASX256:$xj, LASX256:$xk), 129 "$xd, $xj, $xk">; 130 131class LASX3R_XXR<bits<32> op> 132 : Fmt3R_XXR<op, (outs LASX256:$xd), (ins LASX256:$xj, GPR:$rk), 133 "$xd, $xj, $rk">; 134 135class LASX4R_XXXX<bits<32> op> 136 : Fmt4R_XXXX<op, (outs LASX256:$xd), 137 (ins LASX256:$xj, LASX256:$xk, LASX256:$xa), 138 "$xd, $xj, $xk, $xa">; 139 140let Constraints = "$xd = $dst" in { 141 142class LASX2RI2_XXXI<bits<32> op, Operand ImmOpnd = uimm2> 143 : Fmt2RI2_XXI<op, (outs LASX256:$dst), (ins LASX256:$xd, LASX256:$xj, ImmOpnd:$imm2), 144 "$xd, $xj, $imm2">; 145class LASX2RI3_XXXI<bits<32> op, Operand ImmOpnd = uimm3> 146 : Fmt2RI3_XXI<op, (outs LASX256:$dst), (ins LASX256:$xd, LASX256:$xj, ImmOpnd:$imm3), 147 "$xd, $xj, $imm3">; 148 149class LASX2RI2_XXRI<bits<32> op, Operand ImmOpnd = uimm2> 150 : Fmt2RI2_XRI<op, (outs LASX256:$dst), (ins LASX256:$xd, GPR:$rj, ImmOpnd:$imm2), 151 "$xd, $rj, $imm2">; 152class LASX2RI3_XXRI<bits<32> op, Operand ImmOpnd = uimm3> 153 : Fmt2RI3_XRI<op, (outs LASX256:$dst), (ins LASX256:$xd, GPR:$rj, ImmOpnd:$imm3), 154 "$xd, $rj, $imm3">; 155 156class LASX2RI4_XXXI<bits<32> op, Operand ImmOpnd = uimm4> 157 : Fmt2RI4_XXI<op, (outs LASX256:$dst), (ins LASX256:$xd, LASX256:$xj, ImmOpnd:$imm4), 158 "$xd, $xj, $imm4">; 159class LASX2RI5_XXXI<bits<32> op, Operand ImmOpnd = uimm5> 160 : Fmt2RI5_XXI<op, (outs LASX256:$dst), (ins LASX256:$xd, LASX256:$xj, ImmOpnd:$imm5), 161 "$xd, $xj, $imm5">; 162class LASX2RI6_XXXI<bits<32> op, Operand ImmOpnd = uimm6> 163 : Fmt2RI6_XXI<op, (outs LASX256:$dst), (ins LASX256:$xd, LASX256:$xj, ImmOpnd:$imm6), 164 "$xd, $xj, $imm6">; 165class LASX2RI7_XXXI<bits<32> op, Operand ImmOpnd = uimm7> 166 : Fmt2RI7_XXI<op, (outs LASX256:$dst), (ins LASX256:$xd, LASX256:$xj, ImmOpnd:$imm7), 167 "$xd, $xj, $imm7">; 168 169class LASX2RI8_XXXI<bits<32> op, Operand ImmOpnd = uimm8> 170 : Fmt2RI8_XXI<op, (outs LASX256:$dst), (ins LASX256:$xd, LASX256:$xj, ImmOpnd:$imm8), 171 "$xd, $xj, $imm8">; 172 173class LASX3R_XXXX<bits<32> op> 174 : Fmt3R_XXX<op, (outs LASX256:$dst), (ins LASX256:$xd, LASX256:$xj, LASX256:$xk), 175 "$xd, $xj, $xk">; 176 177} // Constraints = "$xd = $dst" 178 179class LASX2RI9_Load<bits<32> op, Operand ImmOpnd = simm9_lsl3> 180 : Fmt2RI9_XRI<op, (outs LASX256:$xd), (ins GPR:$rj, ImmOpnd:$imm9), 181 "$xd, $rj, $imm9">; 182class LASX2RI10_Load<bits<32> op, Operand ImmOpnd = simm10_lsl2> 183 : Fmt2RI10_XRI<op, (outs LASX256:$xd), (ins GPR:$rj, ImmOpnd:$imm10), 184 "$xd, $rj, $imm10">; 185class LASX2RI11_Load<bits<32> op, Operand ImmOpnd = simm11_lsl1> 186 : Fmt2RI11_XRI<op, (outs LASX256:$xd), (ins GPR:$rj, ImmOpnd:$imm11), 187 "$xd, $rj, $imm11">; 188class LASX2RI12_Load<bits<32> op, Operand ImmOpnd = simm12> 189 : Fmt2RI12_XRI<op, (outs LASX256:$xd), (ins GPR:$rj, ImmOpnd:$imm12), 190 "$xd, $rj, $imm12">; 191class LASX2RI12_Store<bits<32> op, Operand ImmOpnd = simm12> 192 : Fmt2RI12_XRI<op, (outs), (ins LASX256:$xd, GPR:$rj, ImmOpnd:$imm12), 193 "$xd, $rj, $imm12">; 194 195class LASX3R_Load<bits<32> op> 196 : Fmt3R_XRR<op, (outs LASX256:$xd), (ins GPR:$rj, GPR:$rk), 197 "$xd, $rj, $rk">; 198class LASX3R_Store<bits<32> op> 199 : Fmt3R_XRR<op, (outs), (ins LASX256:$xd, GPR:$rj, GPR:$rk), 200 "$xd, $rj, $rk">; 201 202//===----------------------------------------------------------------------===// 203// Instructions 204//===----------------------------------------------------------------------===// 205 206let hasSideEffects = 0, Predicates = [HasExtLASX] in { 207 208let mayLoad = 0, mayStore = 0 in { 209def XVADD_B : LASX3R_XXX<0x740a0000>; 210def XVADD_H : LASX3R_XXX<0x740a8000>; 211def XVADD_W : LASX3R_XXX<0x740b0000>; 212def XVADD_D : LASX3R_XXX<0x740b8000>; 213def XVADD_Q : LASX3R_XXX<0x752d0000>; 214 215def XVSUB_B : LASX3R_XXX<0x740c0000>; 216def XVSUB_H : LASX3R_XXX<0x740c8000>; 217def XVSUB_W : LASX3R_XXX<0x740d0000>; 218def XVSUB_D : LASX3R_XXX<0x740d8000>; 219def XVSUB_Q : LASX3R_XXX<0x752d8000>; 220 221def XVADDI_BU : LASX2RI5_XXI<0x768a0000>; 222def XVADDI_HU : LASX2RI5_XXI<0x768a8000>; 223def XVADDI_WU : LASX2RI5_XXI<0x768b0000>; 224def XVADDI_DU : LASX2RI5_XXI<0x768b8000>; 225 226def XVSUBI_BU : LASX2RI5_XXI<0x768c0000>; 227def XVSUBI_HU : LASX2RI5_XXI<0x768c8000>; 228def XVSUBI_WU : LASX2RI5_XXI<0x768d0000>; 229def XVSUBI_DU : LASX2RI5_XXI<0x768d8000>; 230 231def XVNEG_B : LASX2R_XX<0x769c3000>; 232def XVNEG_H : LASX2R_XX<0x769c3400>; 233def XVNEG_W : LASX2R_XX<0x769c3800>; 234def XVNEG_D : LASX2R_XX<0x769c3c00>; 235 236def XVSADD_B : LASX3R_XXX<0x74460000>; 237def XVSADD_H : LASX3R_XXX<0x74468000>; 238def XVSADD_W : LASX3R_XXX<0x74470000>; 239def XVSADD_D : LASX3R_XXX<0x74478000>; 240def XVSADD_BU : LASX3R_XXX<0x744a0000>; 241def XVSADD_HU : LASX3R_XXX<0x744a8000>; 242def XVSADD_WU : LASX3R_XXX<0x744b0000>; 243def XVSADD_DU : LASX3R_XXX<0x744b8000>; 244 245def XVSSUB_B : LASX3R_XXX<0x74480000>; 246def XVSSUB_H : LASX3R_XXX<0x74488000>; 247def XVSSUB_W : LASX3R_XXX<0x74490000>; 248def XVSSUB_D : LASX3R_XXX<0x74498000>; 249def XVSSUB_BU : LASX3R_XXX<0x744c0000>; 250def XVSSUB_HU : LASX3R_XXX<0x744c8000>; 251def XVSSUB_WU : LASX3R_XXX<0x744d0000>; 252def XVSSUB_DU : LASX3R_XXX<0x744d8000>; 253 254def XVHADDW_H_B : LASX3R_XXX<0x74540000>; 255def XVHADDW_W_H : LASX3R_XXX<0x74548000>; 256def XVHADDW_D_W : LASX3R_XXX<0x74550000>; 257def XVHADDW_Q_D : LASX3R_XXX<0x74558000>; 258def XVHADDW_HU_BU : LASX3R_XXX<0x74580000>; 259def XVHADDW_WU_HU : LASX3R_XXX<0x74588000>; 260def XVHADDW_DU_WU : LASX3R_XXX<0x74590000>; 261def XVHADDW_QU_DU : LASX3R_XXX<0x74598000>; 262 263def XVHSUBW_H_B : LASX3R_XXX<0x74560000>; 264def XVHSUBW_W_H : LASX3R_XXX<0x74568000>; 265def XVHSUBW_D_W : LASX3R_XXX<0x74570000>; 266def XVHSUBW_Q_D : LASX3R_XXX<0x74578000>; 267def XVHSUBW_HU_BU : LASX3R_XXX<0x745a0000>; 268def XVHSUBW_WU_HU : LASX3R_XXX<0x745a8000>; 269def XVHSUBW_DU_WU : LASX3R_XXX<0x745b0000>; 270def XVHSUBW_QU_DU : LASX3R_XXX<0x745b8000>; 271 272def XVADDWEV_H_B : LASX3R_XXX<0x741e0000>; 273def XVADDWEV_W_H : LASX3R_XXX<0x741e8000>; 274def XVADDWEV_D_W : LASX3R_XXX<0x741f0000>; 275def XVADDWEV_Q_D : LASX3R_XXX<0x741f8000>; 276def XVADDWOD_H_B : LASX3R_XXX<0x74220000>; 277def XVADDWOD_W_H : LASX3R_XXX<0x74228000>; 278def XVADDWOD_D_W : LASX3R_XXX<0x74230000>; 279def XVADDWOD_Q_D : LASX3R_XXX<0x74238000>; 280 281def XVSUBWEV_H_B : LASX3R_XXX<0x74200000>; 282def XVSUBWEV_W_H : LASX3R_XXX<0x74208000>; 283def XVSUBWEV_D_W : LASX3R_XXX<0x74210000>; 284def XVSUBWEV_Q_D : LASX3R_XXX<0x74218000>; 285def XVSUBWOD_H_B : LASX3R_XXX<0x74240000>; 286def XVSUBWOD_W_H : LASX3R_XXX<0x74248000>; 287def XVSUBWOD_D_W : LASX3R_XXX<0x74250000>; 288def XVSUBWOD_Q_D : LASX3R_XXX<0x74258000>; 289 290def XVADDWEV_H_BU : LASX3R_XXX<0x742e0000>; 291def XVADDWEV_W_HU : LASX3R_XXX<0x742e8000>; 292def XVADDWEV_D_WU : LASX3R_XXX<0x742f0000>; 293def XVADDWEV_Q_DU : LASX3R_XXX<0x742f8000>; 294def XVADDWOD_H_BU : LASX3R_XXX<0x74320000>; 295def XVADDWOD_W_HU : LASX3R_XXX<0x74328000>; 296def XVADDWOD_D_WU : LASX3R_XXX<0x74330000>; 297def XVADDWOD_Q_DU : LASX3R_XXX<0x74338000>; 298 299def XVSUBWEV_H_BU : LASX3R_XXX<0x74300000>; 300def XVSUBWEV_W_HU : LASX3R_XXX<0x74308000>; 301def XVSUBWEV_D_WU : LASX3R_XXX<0x74310000>; 302def XVSUBWEV_Q_DU : LASX3R_XXX<0x74318000>; 303def XVSUBWOD_H_BU : LASX3R_XXX<0x74340000>; 304def XVSUBWOD_W_HU : LASX3R_XXX<0x74348000>; 305def XVSUBWOD_D_WU : LASX3R_XXX<0x74350000>; 306def XVSUBWOD_Q_DU : LASX3R_XXX<0x74358000>; 307 308def XVADDWEV_H_BU_B : LASX3R_XXX<0x743e0000>; 309def XVADDWEV_W_HU_H : LASX3R_XXX<0x743e8000>; 310def XVADDWEV_D_WU_W : LASX3R_XXX<0x743f0000>; 311def XVADDWEV_Q_DU_D : LASX3R_XXX<0x743f8000>; 312def XVADDWOD_H_BU_B : LASX3R_XXX<0x74400000>; 313def XVADDWOD_W_HU_H : LASX3R_XXX<0x74408000>; 314def XVADDWOD_D_WU_W : LASX3R_XXX<0x74410000>; 315def XVADDWOD_Q_DU_D : LASX3R_XXX<0x74418000>; 316 317def XVAVG_B : LASX3R_XXX<0x74640000>; 318def XVAVG_H : LASX3R_XXX<0x74648000>; 319def XVAVG_W : LASX3R_XXX<0x74650000>; 320def XVAVG_D : LASX3R_XXX<0x74658000>; 321def XVAVG_BU : LASX3R_XXX<0x74660000>; 322def XVAVG_HU : LASX3R_XXX<0x74668000>; 323def XVAVG_WU : LASX3R_XXX<0x74670000>; 324def XVAVG_DU : LASX3R_XXX<0x74678000>; 325def XVAVGR_B : LASX3R_XXX<0x74680000>; 326def XVAVGR_H : LASX3R_XXX<0x74688000>; 327def XVAVGR_W : LASX3R_XXX<0x74690000>; 328def XVAVGR_D : LASX3R_XXX<0x74698000>; 329def XVAVGR_BU : LASX3R_XXX<0x746a0000>; 330def XVAVGR_HU : LASX3R_XXX<0x746a8000>; 331def XVAVGR_WU : LASX3R_XXX<0x746b0000>; 332def XVAVGR_DU : LASX3R_XXX<0x746b8000>; 333 334def XVABSD_B : LASX3R_XXX<0x74600000>; 335def XVABSD_H : LASX3R_XXX<0x74608000>; 336def XVABSD_W : LASX3R_XXX<0x74610000>; 337def XVABSD_D : LASX3R_XXX<0x74618000>; 338def XVABSD_BU : LASX3R_XXX<0x74620000>; 339def XVABSD_HU : LASX3R_XXX<0x74628000>; 340def XVABSD_WU : LASX3R_XXX<0x74630000>; 341def XVABSD_DU : LASX3R_XXX<0x74638000>; 342 343def XVADDA_B : LASX3R_XXX<0x745c0000>; 344def XVADDA_H : LASX3R_XXX<0x745c8000>; 345def XVADDA_W : LASX3R_XXX<0x745d0000>; 346def XVADDA_D : LASX3R_XXX<0x745d8000>; 347 348def XVMAX_B : LASX3R_XXX<0x74700000>; 349def XVMAX_H : LASX3R_XXX<0x74708000>; 350def XVMAX_W : LASX3R_XXX<0x74710000>; 351def XVMAX_D : LASX3R_XXX<0x74718000>; 352def XVMAXI_B : LASX2RI5_XXI<0x76900000, simm5>; 353def XVMAXI_H : LASX2RI5_XXI<0x76908000, simm5>; 354def XVMAXI_W : LASX2RI5_XXI<0x76910000, simm5>; 355def XVMAXI_D : LASX2RI5_XXI<0x76918000, simm5>; 356def XVMAX_BU : LASX3R_XXX<0x74740000>; 357def XVMAX_HU : LASX3R_XXX<0x74748000>; 358def XVMAX_WU : LASX3R_XXX<0x74750000>; 359def XVMAX_DU : LASX3R_XXX<0x74758000>; 360def XVMAXI_BU : LASX2RI5_XXI<0x76940000>; 361def XVMAXI_HU : LASX2RI5_XXI<0x76948000>; 362def XVMAXI_WU : LASX2RI5_XXI<0x76950000>; 363def XVMAXI_DU : LASX2RI5_XXI<0x76958000>; 364 365def XVMIN_B : LASX3R_XXX<0x74720000>; 366def XVMIN_H : LASX3R_XXX<0x74728000>; 367def XVMIN_W : LASX3R_XXX<0x74730000>; 368def XVMIN_D : LASX3R_XXX<0x74738000>; 369def XVMINI_B : LASX2RI5_XXI<0x76920000, simm5>; 370def XVMINI_H : LASX2RI5_XXI<0x76928000, simm5>; 371def XVMINI_W : LASX2RI5_XXI<0x76930000, simm5>; 372def XVMINI_D : LASX2RI5_XXI<0x76938000, simm5>; 373def XVMIN_BU : LASX3R_XXX<0x74760000>; 374def XVMIN_HU : LASX3R_XXX<0x74768000>; 375def XVMIN_WU : LASX3R_XXX<0x74770000>; 376def XVMIN_DU : LASX3R_XXX<0x74778000>; 377def XVMINI_BU : LASX2RI5_XXI<0x76960000>; 378def XVMINI_HU : LASX2RI5_XXI<0x76968000>; 379def XVMINI_WU : LASX2RI5_XXI<0x76970000>; 380def XVMINI_DU : LASX2RI5_XXI<0x76978000>; 381 382def XVMUL_B : LASX3R_XXX<0x74840000>; 383def XVMUL_H : LASX3R_XXX<0x74848000>; 384def XVMUL_W : LASX3R_XXX<0x74850000>; 385def XVMUL_D : LASX3R_XXX<0x74858000>; 386 387def XVMUH_B : LASX3R_XXX<0x74860000>; 388def XVMUH_H : LASX3R_XXX<0x74868000>; 389def XVMUH_W : LASX3R_XXX<0x74870000>; 390def XVMUH_D : LASX3R_XXX<0x74878000>; 391def XVMUH_BU : LASX3R_XXX<0x74880000>; 392def XVMUH_HU : LASX3R_XXX<0x74888000>; 393def XVMUH_WU : LASX3R_XXX<0x74890000>; 394def XVMUH_DU : LASX3R_XXX<0x74898000>; 395 396def XVMULWEV_H_B : LASX3R_XXX<0x74900000>; 397def XVMULWEV_W_H : LASX3R_XXX<0x74908000>; 398def XVMULWEV_D_W : LASX3R_XXX<0x74910000>; 399def XVMULWEV_Q_D : LASX3R_XXX<0x74918000>; 400def XVMULWOD_H_B : LASX3R_XXX<0x74920000>; 401def XVMULWOD_W_H : LASX3R_XXX<0x74928000>; 402def XVMULWOD_D_W : LASX3R_XXX<0x74930000>; 403def XVMULWOD_Q_D : LASX3R_XXX<0x74938000>; 404def XVMULWEV_H_BU : LASX3R_XXX<0x74980000>; 405def XVMULWEV_W_HU : LASX3R_XXX<0x74988000>; 406def XVMULWEV_D_WU : LASX3R_XXX<0x74990000>; 407def XVMULWEV_Q_DU : LASX3R_XXX<0x74998000>; 408def XVMULWOD_H_BU : LASX3R_XXX<0x749a0000>; 409def XVMULWOD_W_HU : LASX3R_XXX<0x749a8000>; 410def XVMULWOD_D_WU : LASX3R_XXX<0x749b0000>; 411def XVMULWOD_Q_DU : LASX3R_XXX<0x749b8000>; 412def XVMULWEV_H_BU_B : LASX3R_XXX<0x74a00000>; 413def XVMULWEV_W_HU_H : LASX3R_XXX<0x74a08000>; 414def XVMULWEV_D_WU_W : LASX3R_XXX<0x74a10000>; 415def XVMULWEV_Q_DU_D : LASX3R_XXX<0x74a18000>; 416def XVMULWOD_H_BU_B : LASX3R_XXX<0x74a20000>; 417def XVMULWOD_W_HU_H : LASX3R_XXX<0x74a28000>; 418def XVMULWOD_D_WU_W : LASX3R_XXX<0x74a30000>; 419def XVMULWOD_Q_DU_D : LASX3R_XXX<0x74a38000>; 420 421def XVMADD_B : LASX3R_XXXX<0x74a80000>; 422def XVMADD_H : LASX3R_XXXX<0x74a88000>; 423def XVMADD_W : LASX3R_XXXX<0x74a90000>; 424def XVMADD_D : LASX3R_XXXX<0x74a98000>; 425 426def XVMSUB_B : LASX3R_XXXX<0x74aa0000>; 427def XVMSUB_H : LASX3R_XXXX<0x74aa8000>; 428def XVMSUB_W : LASX3R_XXXX<0x74ab0000>; 429def XVMSUB_D : LASX3R_XXXX<0x74ab8000>; 430 431def XVMADDWEV_H_B : LASX3R_XXXX<0x74ac0000>; 432def XVMADDWEV_W_H : LASX3R_XXXX<0x74ac8000>; 433def XVMADDWEV_D_W : LASX3R_XXXX<0x74ad0000>; 434def XVMADDWEV_Q_D : LASX3R_XXXX<0x74ad8000>; 435def XVMADDWOD_H_B : LASX3R_XXXX<0x74ae0000>; 436def XVMADDWOD_W_H : LASX3R_XXXX<0x74ae8000>; 437def XVMADDWOD_D_W : LASX3R_XXXX<0x74af0000>; 438def XVMADDWOD_Q_D : LASX3R_XXXX<0x74af8000>; 439def XVMADDWEV_H_BU : LASX3R_XXXX<0x74b40000>; 440def XVMADDWEV_W_HU : LASX3R_XXXX<0x74b48000>; 441def XVMADDWEV_D_WU : LASX3R_XXXX<0x74b50000>; 442def XVMADDWEV_Q_DU : LASX3R_XXXX<0x74b58000>; 443def XVMADDWOD_H_BU : LASX3R_XXXX<0x74b60000>; 444def XVMADDWOD_W_HU : LASX3R_XXXX<0x74b68000>; 445def XVMADDWOD_D_WU : LASX3R_XXXX<0x74b70000>; 446def XVMADDWOD_Q_DU : LASX3R_XXXX<0x74b78000>; 447def XVMADDWEV_H_BU_B : LASX3R_XXXX<0x74bc0000>; 448def XVMADDWEV_W_HU_H : LASX3R_XXXX<0x74bc8000>; 449def XVMADDWEV_D_WU_W : LASX3R_XXXX<0x74bd0000>; 450def XVMADDWEV_Q_DU_D : LASX3R_XXXX<0x74bd8000>; 451def XVMADDWOD_H_BU_B : LASX3R_XXXX<0x74be0000>; 452def XVMADDWOD_W_HU_H : LASX3R_XXXX<0x74be8000>; 453def XVMADDWOD_D_WU_W : LASX3R_XXXX<0x74bf0000>; 454def XVMADDWOD_Q_DU_D : LASX3R_XXXX<0x74bf8000>; 455 456def XVDIV_B : LASX3R_XXX<0x74e00000>; 457def XVDIV_H : LASX3R_XXX<0x74e08000>; 458def XVDIV_W : LASX3R_XXX<0x74e10000>; 459def XVDIV_D : LASX3R_XXX<0x74e18000>; 460def XVDIV_BU : LASX3R_XXX<0x74e40000>; 461def XVDIV_HU : LASX3R_XXX<0x74e48000>; 462def XVDIV_WU : LASX3R_XXX<0x74e50000>; 463def XVDIV_DU : LASX3R_XXX<0x74e58000>; 464 465def XVMOD_B : LASX3R_XXX<0x74e20000>; 466def XVMOD_H : LASX3R_XXX<0x74e28000>; 467def XVMOD_W : LASX3R_XXX<0x74e30000>; 468def XVMOD_D : LASX3R_XXX<0x74e38000>; 469def XVMOD_BU : LASX3R_XXX<0x74e60000>; 470def XVMOD_HU : LASX3R_XXX<0x74e68000>; 471def XVMOD_WU : LASX3R_XXX<0x74e70000>; 472def XVMOD_DU : LASX3R_XXX<0x74e78000>; 473 474def XVSAT_B : LASX2RI3_XXI<0x77242000>; 475def XVSAT_H : LASX2RI4_XXI<0x77244000>; 476def XVSAT_W : LASX2RI5_XXI<0x77248000>; 477def XVSAT_D : LASX2RI6_XXI<0x77250000>; 478def XVSAT_BU : LASX2RI3_XXI<0x77282000>; 479def XVSAT_HU : LASX2RI4_XXI<0x77284000>; 480def XVSAT_WU : LASX2RI5_XXI<0x77288000>; 481def XVSAT_DU : LASX2RI6_XXI<0x77290000>; 482 483def XVEXTH_H_B : LASX2R_XX<0x769ee000>; 484def XVEXTH_W_H : LASX2R_XX<0x769ee400>; 485def XVEXTH_D_W : LASX2R_XX<0x769ee800>; 486def XVEXTH_Q_D : LASX2R_XX<0x769eec00>; 487def XVEXTH_HU_BU : LASX2R_XX<0x769ef000>; 488def XVEXTH_WU_HU : LASX2R_XX<0x769ef400>; 489def XVEXTH_DU_WU : LASX2R_XX<0x769ef800>; 490def XVEXTH_QU_DU : LASX2R_XX<0x769efc00>; 491 492def VEXT2XV_H_B : LASX2R_XX<0x769f1000>; 493def VEXT2XV_W_B : LASX2R_XX<0x769f1400>; 494def VEXT2XV_D_B : LASX2R_XX<0x769f1800>; 495def VEXT2XV_W_H : LASX2R_XX<0x769f1c00>; 496def VEXT2XV_D_H : LASX2R_XX<0x769f2000>; 497def VEXT2XV_D_W : LASX2R_XX<0x769f2400>; 498def VEXT2XV_HU_BU : LASX2R_XX<0x769f2800>; 499def VEXT2XV_WU_BU : LASX2R_XX<0x769f2c00>; 500def VEXT2XV_DU_BU : LASX2R_XX<0x769f3000>; 501def VEXT2XV_WU_HU : LASX2R_XX<0x769f3400>; 502def VEXT2XV_DU_HU : LASX2R_XX<0x769f3800>; 503def VEXT2XV_DU_WU : LASX2R_XX<0x769f3c00>; 504 505def XVHSELI_D : LASX2RI5_XXI<0x769f8000>; 506 507def XVSIGNCOV_B : LASX3R_XXX<0x752e0000>; 508def XVSIGNCOV_H : LASX3R_XXX<0x752e8000>; 509def XVSIGNCOV_W : LASX3R_XXX<0x752f0000>; 510def XVSIGNCOV_D : LASX3R_XXX<0x752f8000>; 511 512def XVMSKLTZ_B : LASX2R_XX<0x769c4000>; 513def XVMSKLTZ_H : LASX2R_XX<0x769c4400>; 514def XVMSKLTZ_W : LASX2R_XX<0x769c4800>; 515def XVMSKLTZ_D : LASX2R_XX<0x769c4c00>; 516 517def XVMSKGEZ_B : LASX2R_XX<0x769c5000>; 518 519def XVMSKNZ_B : LASX2R_XX<0x769c6000>; 520 521def XVLDI : LASX1RI13_XI<0x77e00000>; 522 523def XVAND_V : LASX3R_XXX<0x75260000>; 524def XVOR_V : LASX3R_XXX<0x75268000>; 525def XVXOR_V : LASX3R_XXX<0x75270000>; 526def XVNOR_V : LASX3R_XXX<0x75278000>; 527def XVANDN_V : LASX3R_XXX<0x75280000>; 528def XVORN_V : LASX3R_XXX<0x75288000>; 529 530def XVANDI_B : LASX2RI8_XXI<0x77d00000>; 531def XVORI_B : LASX2RI8_XXI<0x77d40000>; 532def XVXORI_B : LASX2RI8_XXI<0x77d80000>; 533def XVNORI_B : LASX2RI8_XXI<0x77dc0000>; 534 535def XVSLL_B : LASX3R_XXX<0x74e80000>; 536def XVSLL_H : LASX3R_XXX<0x74e88000>; 537def XVSLL_W : LASX3R_XXX<0x74e90000>; 538def XVSLL_D : LASX3R_XXX<0x74e98000>; 539def XVSLLI_B : LASX2RI3_XXI<0x772c2000>; 540def XVSLLI_H : LASX2RI4_XXI<0x772c4000>; 541def XVSLLI_W : LASX2RI5_XXI<0x772c8000>; 542def XVSLLI_D : LASX2RI6_XXI<0x772d0000>; 543 544def XVSRL_B : LASX3R_XXX<0x74ea0000>; 545def XVSRL_H : LASX3R_XXX<0x74ea8000>; 546def XVSRL_W : LASX3R_XXX<0x74eb0000>; 547def XVSRL_D : LASX3R_XXX<0x74eb8000>; 548def XVSRLI_B : LASX2RI3_XXI<0x77302000>; 549def XVSRLI_H : LASX2RI4_XXI<0x77304000>; 550def XVSRLI_W : LASX2RI5_XXI<0x77308000>; 551def XVSRLI_D : LASX2RI6_XXI<0x77310000>; 552 553def XVSRA_B : LASX3R_XXX<0x74ec0000>; 554def XVSRA_H : LASX3R_XXX<0x74ec8000>; 555def XVSRA_W : LASX3R_XXX<0x74ed0000>; 556def XVSRA_D : LASX3R_XXX<0x74ed8000>; 557def XVSRAI_B : LASX2RI3_XXI<0x77342000>; 558def XVSRAI_H : LASX2RI4_XXI<0x77344000>; 559def XVSRAI_W : LASX2RI5_XXI<0x77348000>; 560def XVSRAI_D : LASX2RI6_XXI<0x77350000>; 561 562def XVROTR_B : LASX3R_XXX<0x74ee0000>; 563def XVROTR_H : LASX3R_XXX<0x74ee8000>; 564def XVROTR_W : LASX3R_XXX<0x74ef0000>; 565def XVROTR_D : LASX3R_XXX<0x74ef8000>; 566def XVROTRI_B : LASX2RI3_XXI<0x76a02000>; 567def XVROTRI_H : LASX2RI4_XXI<0x76a04000>; 568def XVROTRI_W : LASX2RI5_XXI<0x76a08000>; 569def XVROTRI_D : LASX2RI6_XXI<0x76a10000>; 570 571def XVSLLWIL_H_B : LASX2RI3_XXI<0x77082000>; 572def XVSLLWIL_W_H : LASX2RI4_XXI<0x77084000>; 573def XVSLLWIL_D_W : LASX2RI5_XXI<0x77088000>; 574def XVEXTL_Q_D : LASX2R_XX<0x77090000>; 575def XVSLLWIL_HU_BU : LASX2RI3_XXI<0x770c2000>; 576def XVSLLWIL_WU_HU : LASX2RI4_XXI<0x770c4000>; 577def XVSLLWIL_DU_WU : LASX2RI5_XXI<0x770c8000>; 578def XVEXTL_QU_DU : LASX2R_XX<0x770d0000>; 579 580def XVSRLR_B : LASX3R_XXX<0x74f00000>; 581def XVSRLR_H : LASX3R_XXX<0x74f08000>; 582def XVSRLR_W : LASX3R_XXX<0x74f10000>; 583def XVSRLR_D : LASX3R_XXX<0x74f18000>; 584def XVSRLRI_B : LASX2RI3_XXI<0x76a42000>; 585def XVSRLRI_H : LASX2RI4_XXI<0x76a44000>; 586def XVSRLRI_W : LASX2RI5_XXI<0x76a48000>; 587def XVSRLRI_D : LASX2RI6_XXI<0x76a50000>; 588 589def XVSRAR_B : LASX3R_XXX<0x74f20000>; 590def XVSRAR_H : LASX3R_XXX<0x74f28000>; 591def XVSRAR_W : LASX3R_XXX<0x74f30000>; 592def XVSRAR_D : LASX3R_XXX<0x74f38000>; 593def XVSRARI_B : LASX2RI3_XXI<0x76a82000>; 594def XVSRARI_H : LASX2RI4_XXI<0x76a84000>; 595def XVSRARI_W : LASX2RI5_XXI<0x76a88000>; 596def XVSRARI_D : LASX2RI6_XXI<0x76a90000>; 597 598def XVSRLN_B_H : LASX3R_XXX<0x74f48000>; 599def XVSRLN_H_W : LASX3R_XXX<0x74f50000>; 600def XVSRLN_W_D : LASX3R_XXX<0x74f58000>; 601def XVSRAN_B_H : LASX3R_XXX<0x74f68000>; 602def XVSRAN_H_W : LASX3R_XXX<0x74f70000>; 603def XVSRAN_W_D : LASX3R_XXX<0x74f78000>; 604 605def XVSRLNI_B_H : LASX2RI4_XXXI<0x77404000>; 606def XVSRLNI_H_W : LASX2RI5_XXXI<0x77408000>; 607def XVSRLNI_W_D : LASX2RI6_XXXI<0x77410000>; 608def XVSRLNI_D_Q : LASX2RI7_XXXI<0x77420000>; 609def XVSRANI_B_H : LASX2RI4_XXXI<0x77584000>; 610def XVSRANI_H_W : LASX2RI5_XXXI<0x77588000>; 611def XVSRANI_W_D : LASX2RI6_XXXI<0x77590000>; 612def XVSRANI_D_Q : LASX2RI7_XXXI<0x775a0000>; 613 614def XVSRLRN_B_H : LASX3R_XXX<0x74f88000>; 615def XVSRLRN_H_W : LASX3R_XXX<0x74f90000>; 616def XVSRLRN_W_D : LASX3R_XXX<0x74f98000>; 617def XVSRARN_B_H : LASX3R_XXX<0x74fa8000>; 618def XVSRARN_H_W : LASX3R_XXX<0x74fb0000>; 619def XVSRARN_W_D : LASX3R_XXX<0x74fb8000>; 620 621def XVSRLRNI_B_H : LASX2RI4_XXXI<0x77444000>; 622def XVSRLRNI_H_W : LASX2RI5_XXXI<0x77448000>; 623def XVSRLRNI_W_D : LASX2RI6_XXXI<0x77450000>; 624def XVSRLRNI_D_Q : LASX2RI7_XXXI<0x77460000>; 625def XVSRARNI_B_H : LASX2RI4_XXXI<0x775c4000>; 626def XVSRARNI_H_W : LASX2RI5_XXXI<0x775c8000>; 627def XVSRARNI_W_D : LASX2RI6_XXXI<0x775d0000>; 628def XVSRARNI_D_Q : LASX2RI7_XXXI<0x775e0000>; 629 630def XVSSRLN_B_H : LASX3R_XXX<0x74fc8000>; 631def XVSSRLN_H_W : LASX3R_XXX<0x74fd0000>; 632def XVSSRLN_W_D : LASX3R_XXX<0x74fd8000>; 633def XVSSRAN_B_H : LASX3R_XXX<0x74fe8000>; 634def XVSSRAN_H_W : LASX3R_XXX<0x74ff0000>; 635def XVSSRAN_W_D : LASX3R_XXX<0x74ff8000>; 636def XVSSRLN_BU_H : LASX3R_XXX<0x75048000>; 637def XVSSRLN_HU_W : LASX3R_XXX<0x75050000>; 638def XVSSRLN_WU_D : LASX3R_XXX<0x75058000>; 639def XVSSRAN_BU_H : LASX3R_XXX<0x75068000>; 640def XVSSRAN_HU_W : LASX3R_XXX<0x75070000>; 641def XVSSRAN_WU_D : LASX3R_XXX<0x75078000>; 642 643def XVSSRLNI_B_H : LASX2RI4_XXXI<0x77484000>; 644def XVSSRLNI_H_W : LASX2RI5_XXXI<0x77488000>; 645def XVSSRLNI_W_D : LASX2RI6_XXXI<0x77490000>; 646def XVSSRLNI_D_Q : LASX2RI7_XXXI<0x774a0000>; 647def XVSSRANI_B_H : LASX2RI4_XXXI<0x77604000>; 648def XVSSRANI_H_W : LASX2RI5_XXXI<0x77608000>; 649def XVSSRANI_W_D : LASX2RI6_XXXI<0x77610000>; 650def XVSSRANI_D_Q : LASX2RI7_XXXI<0x77620000>; 651def XVSSRLNI_BU_H : LASX2RI4_XXXI<0x774c4000>; 652def XVSSRLNI_HU_W : LASX2RI5_XXXI<0x774c8000>; 653def XVSSRLNI_WU_D : LASX2RI6_XXXI<0x774d0000>; 654def XVSSRLNI_DU_Q : LASX2RI7_XXXI<0x774e0000>; 655def XVSSRANI_BU_H : LASX2RI4_XXXI<0x77644000>; 656def XVSSRANI_HU_W : LASX2RI5_XXXI<0x77648000>; 657def XVSSRANI_WU_D : LASX2RI6_XXXI<0x77650000>; 658def XVSSRANI_DU_Q : LASX2RI7_XXXI<0x77660000>; 659 660def XVSSRLRN_B_H : LASX3R_XXX<0x75008000>; 661def XVSSRLRN_H_W : LASX3R_XXX<0x75010000>; 662def XVSSRLRN_W_D : LASX3R_XXX<0x75018000>; 663def XVSSRARN_B_H : LASX3R_XXX<0x75028000>; 664def XVSSRARN_H_W : LASX3R_XXX<0x75030000>; 665def XVSSRARN_W_D : LASX3R_XXX<0x75038000>; 666def XVSSRLRN_BU_H : LASX3R_XXX<0x75088000>; 667def XVSSRLRN_HU_W : LASX3R_XXX<0x75090000>; 668def XVSSRLRN_WU_D : LASX3R_XXX<0x75098000>; 669def XVSSRARN_BU_H : LASX3R_XXX<0x750a8000>; 670def XVSSRARN_HU_W : LASX3R_XXX<0x750b0000>; 671def XVSSRARN_WU_D : LASX3R_XXX<0x750b8000>; 672 673def XVSSRLRNI_B_H : LASX2RI4_XXXI<0x77504000>; 674def XVSSRLRNI_H_W : LASX2RI5_XXXI<0x77508000>; 675def XVSSRLRNI_W_D : LASX2RI6_XXXI<0x77510000>; 676def XVSSRLRNI_D_Q : LASX2RI7_XXXI<0x77520000>; 677def XVSSRARNI_B_H : LASX2RI4_XXXI<0x77684000>; 678def XVSSRARNI_H_W : LASX2RI5_XXXI<0x77688000>; 679def XVSSRARNI_W_D : LASX2RI6_XXXI<0x77690000>; 680def XVSSRARNI_D_Q : LASX2RI7_XXXI<0x776a0000>; 681def XVSSRLRNI_BU_H : LASX2RI4_XXXI<0x77544000>; 682def XVSSRLRNI_HU_W : LASX2RI5_XXXI<0x77548000>; 683def XVSSRLRNI_WU_D : LASX2RI6_XXXI<0x77550000>; 684def XVSSRLRNI_DU_Q : LASX2RI7_XXXI<0x77560000>; 685def XVSSRARNI_BU_H : LASX2RI4_XXXI<0x776c4000>; 686def XVSSRARNI_HU_W : LASX2RI5_XXXI<0x776c8000>; 687def XVSSRARNI_WU_D : LASX2RI6_XXXI<0x776d0000>; 688def XVSSRARNI_DU_Q : LASX2RI7_XXXI<0x776e0000>; 689 690def XVCLO_B : LASX2R_XX<0x769c0000>; 691def XVCLO_H : LASX2R_XX<0x769c0400>; 692def XVCLO_W : LASX2R_XX<0x769c0800>; 693def XVCLO_D : LASX2R_XX<0x769c0c00>; 694def XVCLZ_B : LASX2R_XX<0x769c1000>; 695def XVCLZ_H : LASX2R_XX<0x769c1400>; 696def XVCLZ_W : LASX2R_XX<0x769c1800>; 697def XVCLZ_D : LASX2R_XX<0x769c1c00>; 698 699def XVPCNT_B : LASX2R_XX<0x769c2000>; 700def XVPCNT_H : LASX2R_XX<0x769c2400>; 701def XVPCNT_W : LASX2R_XX<0x769c2800>; 702def XVPCNT_D : LASX2R_XX<0x769c2c00>; 703 704def XVBITCLR_B : LASX3R_XXX<0x750c0000>; 705def XVBITCLR_H : LASX3R_XXX<0x750c8000>; 706def XVBITCLR_W : LASX3R_XXX<0x750d0000>; 707def XVBITCLR_D : LASX3R_XXX<0x750d8000>; 708def XVBITCLRI_B : LASX2RI3_XXI<0x77102000>; 709def XVBITCLRI_H : LASX2RI4_XXI<0x77104000>; 710def XVBITCLRI_W : LASX2RI5_XXI<0x77108000>; 711def XVBITCLRI_D : LASX2RI6_XXI<0x77110000>; 712 713def XVBITSET_B : LASX3R_XXX<0x750e0000>; 714def XVBITSET_H : LASX3R_XXX<0x750e8000>; 715def XVBITSET_W : LASX3R_XXX<0x750f0000>; 716def XVBITSET_D : LASX3R_XXX<0x750f8000>; 717def XVBITSETI_B : LASX2RI3_XXI<0x77142000>; 718def XVBITSETI_H : LASX2RI4_XXI<0x77144000>; 719def XVBITSETI_W : LASX2RI5_XXI<0x77148000>; 720def XVBITSETI_D : LASX2RI6_XXI<0x77150000>; 721 722def XVBITREV_B : LASX3R_XXX<0x75100000>; 723def XVBITREV_H : LASX3R_XXX<0x75108000>; 724def XVBITREV_W : LASX3R_XXX<0x75110000>; 725def XVBITREV_D : LASX3R_XXX<0x75118000>; 726def XVBITREVI_B : LASX2RI3_XXI<0x77182000>; 727def XVBITREVI_H : LASX2RI4_XXI<0x77184000>; 728def XVBITREVI_W : LASX2RI5_XXI<0x77188000>; 729def XVBITREVI_D : LASX2RI6_XXI<0x77190000>; 730 731def XVFRSTP_B : LASX3R_XXXX<0x752b0000>; 732def XVFRSTP_H : LASX3R_XXXX<0x752b8000>; 733def XVFRSTPI_B : LASX2RI5_XXXI<0x769a0000>; 734def XVFRSTPI_H : LASX2RI5_XXXI<0x769a8000>; 735 736def XVFADD_S : LASX3R_XXX<0x75308000>; 737def XVFADD_D : LASX3R_XXX<0x75310000>; 738def XVFSUB_S : LASX3R_XXX<0x75328000>; 739def XVFSUB_D : LASX3R_XXX<0x75330000>; 740def XVFMUL_S : LASX3R_XXX<0x75388000>; 741def XVFMUL_D : LASX3R_XXX<0x75390000>; 742def XVFDIV_S : LASX3R_XXX<0x753a8000>; 743def XVFDIV_D : LASX3R_XXX<0x753b0000>; 744 745def XVFMADD_S : LASX4R_XXXX<0x0a100000>; 746def XVFMADD_D : LASX4R_XXXX<0x0a200000>; 747def XVFMSUB_S : LASX4R_XXXX<0x0a500000>; 748def XVFMSUB_D : LASX4R_XXXX<0x0a600000>; 749def XVFNMADD_S : LASX4R_XXXX<0x0a900000>; 750def XVFNMADD_D : LASX4R_XXXX<0x0aa00000>; 751def XVFNMSUB_S : LASX4R_XXXX<0x0ad00000>; 752def XVFNMSUB_D : LASX4R_XXXX<0x0ae00000>; 753 754def XVFMAX_S : LASX3R_XXX<0x753c8000>; 755def XVFMAX_D : LASX3R_XXX<0x753d0000>; 756def XVFMIN_S : LASX3R_XXX<0x753e8000>; 757def XVFMIN_D : LASX3R_XXX<0x753f0000>; 758 759def XVFMAXA_S : LASX3R_XXX<0x75408000>; 760def XVFMAXA_D : LASX3R_XXX<0x75410000>; 761def XVFMINA_S : LASX3R_XXX<0x75428000>; 762def XVFMINA_D : LASX3R_XXX<0x75430000>; 763 764def XVFLOGB_S : LASX2R_XX<0x769cc400>; 765def XVFLOGB_D : LASX2R_XX<0x769cc800>; 766 767def XVFCLASS_S : LASX2R_XX<0x769cd400>; 768def XVFCLASS_D : LASX2R_XX<0x769cd800>; 769 770def XVFSQRT_S : LASX2R_XX<0x769ce400>; 771def XVFSQRT_D : LASX2R_XX<0x769ce800>; 772def XVFRECIP_S : LASX2R_XX<0x769cf400>; 773def XVFRECIP_D : LASX2R_XX<0x769cf800>; 774def XVFRSQRT_S : LASX2R_XX<0x769d0400>; 775def XVFRSQRT_D : LASX2R_XX<0x769d0800>; 776def XVFRECIPE_S : LASX2R_XX<0x769d1400>; 777def XVFRECIPE_D : LASX2R_XX<0x769d1800>; 778def XVFRSQRTE_S : LASX2R_XX<0x769d2400>; 779def XVFRSQRTE_D : LASX2R_XX<0x769d2800>; 780 781def XVFCVTL_S_H : LASX2R_XX<0x769de800>; 782def XVFCVTH_S_H : LASX2R_XX<0x769dec00>; 783def XVFCVTL_D_S : LASX2R_XX<0x769df000>; 784def XVFCVTH_D_S : LASX2R_XX<0x769df400>; 785def XVFCVT_H_S : LASX3R_XXX<0x75460000>; 786def XVFCVT_S_D : LASX3R_XXX<0x75468000>; 787 788def XVFRINTRNE_S : LASX2R_XX<0x769d7400>; 789def XVFRINTRNE_D : LASX2R_XX<0x769d7800>; 790def XVFRINTRZ_S : LASX2R_XX<0x769d6400>; 791def XVFRINTRZ_D : LASX2R_XX<0x769d6800>; 792def XVFRINTRP_S : LASX2R_XX<0x769d5400>; 793def XVFRINTRP_D : LASX2R_XX<0x769d5800>; 794def XVFRINTRM_S : LASX2R_XX<0x769d4400>; 795def XVFRINTRM_D : LASX2R_XX<0x769d4800>; 796def XVFRINT_S : LASX2R_XX<0x769d3400>; 797def XVFRINT_D : LASX2R_XX<0x769d3800>; 798 799def XVFTINTRNE_W_S : LASX2R_XX<0x769e5000>; 800def XVFTINTRNE_L_D : LASX2R_XX<0x769e5400>; 801def XVFTINTRZ_W_S : LASX2R_XX<0x769e4800>; 802def XVFTINTRZ_L_D : LASX2R_XX<0x769e4c00>; 803def XVFTINTRP_W_S : LASX2R_XX<0x769e4000>; 804def XVFTINTRP_L_D : LASX2R_XX<0x769e4400>; 805def XVFTINTRM_W_S : LASX2R_XX<0x769e3800>; 806def XVFTINTRM_L_D : LASX2R_XX<0x769e3c00>; 807def XVFTINT_W_S : LASX2R_XX<0x769e3000>; 808def XVFTINT_L_D : LASX2R_XX<0x769e3400>; 809def XVFTINTRZ_WU_S : LASX2R_XX<0x769e7000>; 810def XVFTINTRZ_LU_D : LASX2R_XX<0x769e7400>; 811def XVFTINT_WU_S : LASX2R_XX<0x769e5800>; 812def XVFTINT_LU_D : LASX2R_XX<0x769e5c00>; 813 814def XVFTINTRNE_W_D : LASX3R_XXX<0x754b8000>; 815def XVFTINTRZ_W_D : LASX3R_XXX<0x754b0000>; 816def XVFTINTRP_W_D : LASX3R_XXX<0x754a8000>; 817def XVFTINTRM_W_D : LASX3R_XXX<0x754a0000>; 818def XVFTINT_W_D : LASX3R_XXX<0x75498000>; 819 820def XVFTINTRNEL_L_S : LASX2R_XX<0x769ea000>; 821def XVFTINTRNEH_L_S : LASX2R_XX<0x769ea400>; 822def XVFTINTRZL_L_S : LASX2R_XX<0x769e9800>; 823def XVFTINTRZH_L_S : LASX2R_XX<0x769e9c00>; 824def XVFTINTRPL_L_S : LASX2R_XX<0x769e9000>; 825def XVFTINTRPH_L_S : LASX2R_XX<0x769e9400>; 826def XVFTINTRML_L_S : LASX2R_XX<0x769e8800>; 827def XVFTINTRMH_L_S : LASX2R_XX<0x769e8c00>; 828def XVFTINTL_L_S : LASX2R_XX<0x769e8000>; 829def XVFTINTH_L_S : LASX2R_XX<0x769e8400>; 830 831def XVFFINT_S_W : LASX2R_XX<0x769e0000>; 832def XVFFINT_D_L : LASX2R_XX<0x769e0800>; 833def XVFFINT_S_WU : LASX2R_XX<0x769e0400>; 834def XVFFINT_D_LU : LASX2R_XX<0x769e0c00>; 835def XVFFINTL_D_W : LASX2R_XX<0x769e1000>; 836def XVFFINTH_D_W : LASX2R_XX<0x769e1400>; 837def XVFFINT_S_L : LASX3R_XXX<0x75480000>; 838 839def XVSEQ_B : LASX3R_XXX<0x74000000>; 840def XVSEQ_H : LASX3R_XXX<0x74008000>; 841def XVSEQ_W : LASX3R_XXX<0x74010000>; 842def XVSEQ_D : LASX3R_XXX<0x74018000>; 843def XVSEQI_B : LASX2RI5_XXI<0x76800000, simm5>; 844def XVSEQI_H : LASX2RI5_XXI<0x76808000, simm5>; 845def XVSEQI_W : LASX2RI5_XXI<0x76810000, simm5>; 846def XVSEQI_D : LASX2RI5_XXI<0x76818000, simm5>; 847 848def XVSLE_B : LASX3R_XXX<0x74020000>; 849def XVSLE_H : LASX3R_XXX<0x74028000>; 850def XVSLE_W : LASX3R_XXX<0x74030000>; 851def XVSLE_D : LASX3R_XXX<0x74038000>; 852def XVSLEI_B : LASX2RI5_XXI<0x76820000, simm5>; 853def XVSLEI_H : LASX2RI5_XXI<0x76828000, simm5>; 854def XVSLEI_W : LASX2RI5_XXI<0x76830000, simm5>; 855def XVSLEI_D : LASX2RI5_XXI<0x76838000, simm5>; 856 857def XVSLE_BU : LASX3R_XXX<0x74040000>; 858def XVSLE_HU : LASX3R_XXX<0x74048000>; 859def XVSLE_WU : LASX3R_XXX<0x74050000>; 860def XVSLE_DU : LASX3R_XXX<0x74058000>; 861def XVSLEI_BU : LASX2RI5_XXI<0x76840000>; 862def XVSLEI_HU : LASX2RI5_XXI<0x76848000>; 863def XVSLEI_WU : LASX2RI5_XXI<0x76850000>; 864def XVSLEI_DU : LASX2RI5_XXI<0x76858000>; 865 866def XVSLT_B : LASX3R_XXX<0x74060000>; 867def XVSLT_H : LASX3R_XXX<0x74068000>; 868def XVSLT_W : LASX3R_XXX<0x74070000>; 869def XVSLT_D : LASX3R_XXX<0x74078000>; 870def XVSLTI_B : LASX2RI5_XXI<0x76860000, simm5>; 871def XVSLTI_H : LASX2RI5_XXI<0x76868000, simm5>; 872def XVSLTI_W : LASX2RI5_XXI<0x76870000, simm5>; 873def XVSLTI_D : LASX2RI5_XXI<0x76878000, simm5>; 874 875def XVSLT_BU : LASX3R_XXX<0x74080000>; 876def XVSLT_HU : LASX3R_XXX<0x74088000>; 877def XVSLT_WU : LASX3R_XXX<0x74090000>; 878def XVSLT_DU : LASX3R_XXX<0x74098000>; 879def XVSLTI_BU : LASX2RI5_XXI<0x76880000>; 880def XVSLTI_HU : LASX2RI5_XXI<0x76888000>; 881def XVSLTI_WU : LASX2RI5_XXI<0x76890000>; 882def XVSLTI_DU : LASX2RI5_XXI<0x76898000>; 883 884def XVFCMP_CAF_S : LASX3R_XXX<0x0c900000>; 885def XVFCMP_SAF_S : LASX3R_XXX<0x0c908000>; 886def XVFCMP_CLT_S : LASX3R_XXX<0x0c910000>; 887def XVFCMP_SLT_S : LASX3R_XXX<0x0c918000>; 888def XVFCMP_CEQ_S : LASX3R_XXX<0x0c920000>; 889def XVFCMP_SEQ_S : LASX3R_XXX<0x0c928000>; 890def XVFCMP_CLE_S : LASX3R_XXX<0x0c930000>; 891def XVFCMP_SLE_S : LASX3R_XXX<0x0c938000>; 892def XVFCMP_CUN_S : LASX3R_XXX<0x0c940000>; 893def XVFCMP_SUN_S : LASX3R_XXX<0x0c948000>; 894def XVFCMP_CULT_S : LASX3R_XXX<0x0c950000>; 895def XVFCMP_SULT_S : LASX3R_XXX<0x0c958000>; 896def XVFCMP_CUEQ_S : LASX3R_XXX<0x0c960000>; 897def XVFCMP_SUEQ_S : LASX3R_XXX<0x0c968000>; 898def XVFCMP_CULE_S : LASX3R_XXX<0x0c970000>; 899def XVFCMP_SULE_S : LASX3R_XXX<0x0c978000>; 900def XVFCMP_CNE_S : LASX3R_XXX<0x0c980000>; 901def XVFCMP_SNE_S : LASX3R_XXX<0x0c988000>; 902def XVFCMP_COR_S : LASX3R_XXX<0x0c9a0000>; 903def XVFCMP_SOR_S : LASX3R_XXX<0x0c9a8000>; 904def XVFCMP_CUNE_S : LASX3R_XXX<0x0c9c0000>; 905def XVFCMP_SUNE_S : LASX3R_XXX<0x0c9c8000>; 906 907def XVFCMP_CAF_D : LASX3R_XXX<0x0ca00000>; 908def XVFCMP_SAF_D : LASX3R_XXX<0x0ca08000>; 909def XVFCMP_CLT_D : LASX3R_XXX<0x0ca10000>; 910def XVFCMP_SLT_D : LASX3R_XXX<0x0ca18000>; 911def XVFCMP_CEQ_D : LASX3R_XXX<0x0ca20000>; 912def XVFCMP_SEQ_D : LASX3R_XXX<0x0ca28000>; 913def XVFCMP_CLE_D : LASX3R_XXX<0x0ca30000>; 914def XVFCMP_SLE_D : LASX3R_XXX<0x0ca38000>; 915def XVFCMP_CUN_D : LASX3R_XXX<0x0ca40000>; 916def XVFCMP_SUN_D : LASX3R_XXX<0x0ca48000>; 917def XVFCMP_CULT_D : LASX3R_XXX<0x0ca50000>; 918def XVFCMP_SULT_D : LASX3R_XXX<0x0ca58000>; 919def XVFCMP_CUEQ_D : LASX3R_XXX<0x0ca60000>; 920def XVFCMP_SUEQ_D : LASX3R_XXX<0x0ca68000>; 921def XVFCMP_CULE_D : LASX3R_XXX<0x0ca70000>; 922def XVFCMP_SULE_D : LASX3R_XXX<0x0ca78000>; 923def XVFCMP_CNE_D : LASX3R_XXX<0x0ca80000>; 924def XVFCMP_SNE_D : LASX3R_XXX<0x0ca88000>; 925def XVFCMP_COR_D : LASX3R_XXX<0x0caa0000>; 926def XVFCMP_SOR_D : LASX3R_XXX<0x0caa8000>; 927def XVFCMP_CUNE_D : LASX3R_XXX<0x0cac0000>; 928def XVFCMP_SUNE_D : LASX3R_XXX<0x0cac8000>; 929 930def XVBITSEL_V : LASX4R_XXXX<0x0d200000>; 931 932def XVBITSELI_B : LASX2RI8_XXXI<0x77c40000>; 933 934def XVSETEQZ_V : LASX2R_CX<0x769c9800>; 935def XVSETNEZ_V : LASX2R_CX<0x769c9c00>; 936def XVSETANYEQZ_B : LASX2R_CX<0x769ca000>; 937def XVSETANYEQZ_H : LASX2R_CX<0x769ca400>; 938def XVSETANYEQZ_W : LASX2R_CX<0x769ca800>; 939def XVSETANYEQZ_D : LASX2R_CX<0x769cac00>; 940def XVSETALLNEZ_B : LASX2R_CX<0x769cb000>; 941def XVSETALLNEZ_H : LASX2R_CX<0x769cb400>; 942def XVSETALLNEZ_W : LASX2R_CX<0x769cb800>; 943def XVSETALLNEZ_D : LASX2R_CX<0x769cbc00>; 944 945def XVINSGR2VR_W : LASX2RI3_XXRI<0x76ebc000>; 946def XVINSGR2VR_D : LASX2RI2_XXRI<0x76ebe000>; 947def XVPICKVE2GR_W : LASX2RI3_RXI<0x76efc000>; 948def XVPICKVE2GR_D : LASX2RI2_RXI<0x76efe000>; 949def XVPICKVE2GR_WU : LASX2RI3_RXI<0x76f3c000>; 950def XVPICKVE2GR_DU : LASX2RI2_RXI<0x76f3e000>; 951 952def XVREPLGR2VR_B : LASX2R_XR<0x769f0000>; 953def XVREPLGR2VR_H : LASX2R_XR<0x769f0400>; 954def XVREPLGR2VR_W : LASX2R_XR<0x769f0800>; 955def XVREPLGR2VR_D : LASX2R_XR<0x769f0c00>; 956 957def XVREPLVE_B : LASX3R_XXR<0x75220000>; 958def XVREPLVE_H : LASX3R_XXR<0x75228000>; 959def XVREPLVE_W : LASX3R_XXR<0x75230000>; 960def XVREPLVE_D : LASX3R_XXR<0x75238000>; 961def XVREPL128VEI_B : LASX2RI4_XXI<0x76f78000>; 962def XVREPL128VEI_H : LASX2RI3_XXI<0x76f7c000>; 963def XVREPL128VEI_W : LASX2RI2_XXI<0x76f7e000>; 964def XVREPL128VEI_D : LASX2RI1_XXI<0x76f7f000>; 965 966def XVREPLVE0_B : LASX2R_XX<0x77070000>; 967def XVREPLVE0_H : LASX2R_XX<0x77078000>; 968def XVREPLVE0_W : LASX2R_XX<0x7707c000>; 969def XVREPLVE0_D : LASX2R_XX<0x7707e000>; 970def XVREPLVE0_Q : LASX2R_XX<0x7707f000>; 971 972def XVINSVE0_W : LASX2RI3_XXXI<0x76ffc000>; 973def XVINSVE0_D : LASX2RI2_XXXI<0x76ffe000>; 974 975def XVPICKVE_W : LASX2RI3_XXI<0x7703c000>; 976def XVPICKVE_D : LASX2RI2_XXI<0x7703e000>; 977 978def XVBSLL_V : LASX2RI5_XXI<0x768e0000>; 979def XVBSRL_V : LASX2RI5_XXI<0x768e8000>; 980 981def XVPACKEV_B : LASX3R_XXX<0x75160000>; 982def XVPACKEV_H : LASX3R_XXX<0x75168000>; 983def XVPACKEV_W : LASX3R_XXX<0x75170000>; 984def XVPACKEV_D : LASX3R_XXX<0x75178000>; 985def XVPACKOD_B : LASX3R_XXX<0x75180000>; 986def XVPACKOD_H : LASX3R_XXX<0x75188000>; 987def XVPACKOD_W : LASX3R_XXX<0x75190000>; 988def XVPACKOD_D : LASX3R_XXX<0x75198000>; 989 990def XVPICKEV_B : LASX3R_XXX<0x751e0000>; 991def XVPICKEV_H : LASX3R_XXX<0x751e8000>; 992def XVPICKEV_W : LASX3R_XXX<0x751f0000>; 993def XVPICKEV_D : LASX3R_XXX<0x751f8000>; 994def XVPICKOD_B : LASX3R_XXX<0x75200000>; 995def XVPICKOD_H : LASX3R_XXX<0x75208000>; 996def XVPICKOD_W : LASX3R_XXX<0x75210000>; 997def XVPICKOD_D : LASX3R_XXX<0x75218000>; 998 999def XVILVL_B : LASX3R_XXX<0x751a0000>; 1000def XVILVL_H : LASX3R_XXX<0x751a8000>; 1001def XVILVL_W : LASX3R_XXX<0x751b0000>; 1002def XVILVL_D : LASX3R_XXX<0x751b8000>; 1003def XVILVH_B : LASX3R_XXX<0x751c0000>; 1004def XVILVH_H : LASX3R_XXX<0x751c8000>; 1005def XVILVH_W : LASX3R_XXX<0x751d0000>; 1006def XVILVH_D : LASX3R_XXX<0x751d8000>; 1007 1008def XVSHUF_B : LASX4R_XXXX<0x0d600000>; 1009 1010def XVSHUF_H : LASX3R_XXXX<0x757a8000>; 1011def XVSHUF_W : LASX3R_XXXX<0x757b0000>; 1012def XVSHUF_D : LASX3R_XXXX<0x757b8000>; 1013 1014def XVPERM_W : LASX3R_XXX<0x757d0000>; 1015 1016def XVSHUF4I_B : LASX2RI8_XXI<0x77900000>; 1017def XVSHUF4I_H : LASX2RI8_XXI<0x77940000>; 1018def XVSHUF4I_W : LASX2RI8_XXI<0x77980000>; 1019def XVSHUF4I_D : LASX2RI8_XXXI<0x779c0000>; 1020 1021def XVPERMI_W : LASX2RI8_XXXI<0x77e40000>; 1022def XVPERMI_D : LASX2RI8_XXI<0x77e80000>; 1023def XVPERMI_Q : LASX2RI8_XXXI<0x77ec0000>; 1024 1025def XVEXTRINS_D : LASX2RI8_XXXI<0x77800000>; 1026def XVEXTRINS_W : LASX2RI8_XXXI<0x77840000>; 1027def XVEXTRINS_H : LASX2RI8_XXXI<0x77880000>; 1028def XVEXTRINS_B : LASX2RI8_XXXI<0x778c0000>; 1029} // mayLoad = 0, mayStore = 0 1030 1031let mayLoad = 1, mayStore = 0 in { 1032def XVLD : LASX2RI12_Load<0x2c800000>; 1033def XVLDX : LASX3R_Load<0x38480000>; 1034 1035def XVLDREPL_B : LASX2RI12_Load<0x32800000>; 1036def XVLDREPL_H : LASX2RI11_Load<0x32400000>; 1037def XVLDREPL_W : LASX2RI10_Load<0x32200000>; 1038def XVLDREPL_D : LASX2RI9_Load<0x32100000>; 1039} // mayLoad = 1, mayStore = 0 1040 1041let mayLoad = 0, mayStore = 1 in { 1042def XVST : LASX2RI12_Store<0x2cc00000>; 1043def XVSTX : LASX3R_Store<0x384c0000>; 1044 1045def XVSTELM_B : LASX2RI8I5_XRII<0x33800000>; 1046def XVSTELM_H : LASX2RI8I4_XRII<0x33400000, simm8_lsl1>; 1047def XVSTELM_W : LASX2RI8I3_XRII<0x33200000, simm8_lsl2>; 1048def XVSTELM_D : LASX2RI8I2_XRII<0x33100000, simm8_lsl3>; 1049} // mayLoad = 0, mayStore = 1 1050 1051} // hasSideEffects = 0, Predicates = [HasExtLASX] 1052 1053/// Pseudo-instructions 1054 1055let Predicates = [HasExtLASX] in { 1056 1057let hasSideEffects = 0, mayLoad = 0, mayStore = 0, isCodeGenOnly = 0, 1058 isAsmParserOnly = 1 in { 1059def PseudoXVREPLI_B : Pseudo<(outs LASX256:$xd), (ins simm10:$imm), [], 1060 "xvrepli.b", "$xd, $imm">; 1061def PseudoXVREPLI_H : Pseudo<(outs LASX256:$xd), (ins simm10:$imm), [], 1062 "xvrepli.h", "$xd, $imm">; 1063def PseudoXVREPLI_W : Pseudo<(outs LASX256:$xd), (ins simm10:$imm), [], 1064 "xvrepli.w", "$xd, $imm">; 1065def PseudoXVREPLI_D : Pseudo<(outs LASX256:$xd), (ins simm10:$imm), [], 1066 "xvrepli.d", "$xd, $imm">; 1067} 1068 1069def PseudoXVBNZ_B : VecCond<loongarch_vall_nonzero, v32i8, LASX256>; 1070def PseudoXVBNZ_H : VecCond<loongarch_vall_nonzero, v16i16, LASX256>; 1071def PseudoXVBNZ_W : VecCond<loongarch_vall_nonzero, v8i32, LASX256>; 1072def PseudoXVBNZ_D : VecCond<loongarch_vall_nonzero, v4i64, LASX256>; 1073def PseudoXVBNZ : VecCond<loongarch_vany_nonzero, v32i8, LASX256>; 1074 1075def PseudoXVBZ_B : VecCond<loongarch_vall_zero, v32i8, LASX256>; 1076def PseudoXVBZ_H : VecCond<loongarch_vall_zero, v16i16, LASX256>; 1077def PseudoXVBZ_W : VecCond<loongarch_vall_zero, v8i32, LASX256>; 1078def PseudoXVBZ_D : VecCond<loongarch_vall_zero, v4i64, LASX256>; 1079def PseudoXVBZ : VecCond<loongarch_vany_zero, v32i8, LASX256>; 1080 1081let usesCustomInserter = 1, Constraints = "$xd = $dst" in { 1082def PseudoXVINSGR2VR_B 1083 : Pseudo<(outs LASX256:$dst), (ins LASX256:$xd, GPR:$rj, uimm5:$imm)>; 1084def PseudoXVINSGR2VR_H 1085 : Pseudo<(outs LASX256:$dst), (ins LASX256:$xd, GPR:$rj, uimm4:$imm)>; 1086} // usesCustomInserter = 1, Constraints = "$xd = $dst" 1087 1088} // Predicates = [HasExtLASX] 1089 1090multiclass PatXr<SDPatternOperator OpNode, string Inst> { 1091 def : Pat<(v32i8 (OpNode (v32i8 LASX256:$xj))), 1092 (!cast<LAInst>(Inst#"_B") LASX256:$xj)>; 1093 def : Pat<(v16i16 (OpNode (v16i16 LASX256:$xj))), 1094 (!cast<LAInst>(Inst#"_H") LASX256:$xj)>; 1095 def : Pat<(v8i32 (OpNode (v8i32 LASX256:$xj))), 1096 (!cast<LAInst>(Inst#"_W") LASX256:$xj)>; 1097 def : Pat<(v4i64 (OpNode (v4i64 LASX256:$xj))), 1098 (!cast<LAInst>(Inst#"_D") LASX256:$xj)>; 1099} 1100 1101multiclass PatXrF<SDPatternOperator OpNode, string Inst> { 1102 def : Pat<(v8f32 (OpNode (v8f32 LASX256:$xj))), 1103 (!cast<LAInst>(Inst#"_S") LASX256:$xj)>; 1104 def : Pat<(v4f64 (OpNode (v4f64 LASX256:$xj))), 1105 (!cast<LAInst>(Inst#"_D") LASX256:$xj)>; 1106} 1107 1108multiclass PatXrXr<SDPatternOperator OpNode, string Inst> { 1109 def : Pat<(OpNode (v32i8 LASX256:$xj), (v32i8 LASX256:$xk)), 1110 (!cast<LAInst>(Inst#"_B") LASX256:$xj, LASX256:$xk)>; 1111 def : Pat<(OpNode (v16i16 LASX256:$xj), (v16i16 LASX256:$xk)), 1112 (!cast<LAInst>(Inst#"_H") LASX256:$xj, LASX256:$xk)>; 1113 def : Pat<(OpNode (v8i32 LASX256:$xj), (v8i32 LASX256:$xk)), 1114 (!cast<LAInst>(Inst#"_W") LASX256:$xj, LASX256:$xk)>; 1115 def : Pat<(OpNode (v4i64 LASX256:$xj), (v4i64 LASX256:$xk)), 1116 (!cast<LAInst>(Inst#"_D") LASX256:$xj, LASX256:$xk)>; 1117} 1118 1119multiclass PatXrXrF<SDPatternOperator OpNode, string Inst> { 1120 def : Pat<(OpNode (v8f32 LASX256:$xj), (v8f32 LASX256:$xk)), 1121 (!cast<LAInst>(Inst#"_S") LASX256:$xj, LASX256:$xk)>; 1122 def : Pat<(OpNode (v4f64 LASX256:$xj), (v4f64 LASX256:$xk)), 1123 (!cast<LAInst>(Inst#"_D") LASX256:$xj, LASX256:$xk)>; 1124} 1125 1126multiclass PatXrXrU<SDPatternOperator OpNode, string Inst> { 1127 def : Pat<(OpNode (v32i8 LASX256:$xj), (v32i8 LASX256:$xk)), 1128 (!cast<LAInst>(Inst#"_BU") LASX256:$xj, LASX256:$xk)>; 1129 def : Pat<(OpNode (v16i16 LASX256:$xj), (v16i16 LASX256:$xk)), 1130 (!cast<LAInst>(Inst#"_HU") LASX256:$xj, LASX256:$xk)>; 1131 def : Pat<(OpNode (v8i32 LASX256:$xj), (v8i32 LASX256:$xk)), 1132 (!cast<LAInst>(Inst#"_WU") LASX256:$xj, LASX256:$xk)>; 1133 def : Pat<(OpNode (v4i64 LASX256:$xj), (v4i64 LASX256:$xk)), 1134 (!cast<LAInst>(Inst#"_DU") LASX256:$xj, LASX256:$xk)>; 1135} 1136 1137multiclass PatXrSimm5<SDPatternOperator OpNode, string Inst> { 1138 def : Pat<(OpNode (v32i8 LASX256:$xj), (v32i8 (SplatPat_simm5 simm5:$imm))), 1139 (!cast<LAInst>(Inst#"_B") LASX256:$xj, simm5:$imm)>; 1140 def : Pat<(OpNode (v16i16 LASX256:$xj), (v16i16 (SplatPat_simm5 simm5:$imm))), 1141 (!cast<LAInst>(Inst#"_H") LASX256:$xj, simm5:$imm)>; 1142 def : Pat<(OpNode (v8i32 LASX256:$xj), (v8i32 (SplatPat_simm5 simm5:$imm))), 1143 (!cast<LAInst>(Inst#"_W") LASX256:$xj, simm5:$imm)>; 1144 def : Pat<(OpNode (v4i64 LASX256:$xj), (v4i64 (SplatPat_simm5 simm5:$imm))), 1145 (!cast<LAInst>(Inst#"_D") LASX256:$xj, simm5:$imm)>; 1146} 1147 1148multiclass PatXrUimm5<SDPatternOperator OpNode, string Inst> { 1149 def : Pat<(OpNode (v32i8 LASX256:$xj), (v32i8 (SplatPat_uimm5 uimm5:$imm))), 1150 (!cast<LAInst>(Inst#"_BU") LASX256:$xj, uimm5:$imm)>; 1151 def : Pat<(OpNode (v16i16 LASX256:$xj), (v16i16 (SplatPat_uimm5 uimm5:$imm))), 1152 (!cast<LAInst>(Inst#"_HU") LASX256:$xj, uimm5:$imm)>; 1153 def : Pat<(OpNode (v8i32 LASX256:$xj), (v8i32 (SplatPat_uimm5 uimm5:$imm))), 1154 (!cast<LAInst>(Inst#"_WU") LASX256:$xj, uimm5:$imm)>; 1155 def : Pat<(OpNode (v4i64 LASX256:$xj), (v4i64 (SplatPat_uimm5 uimm5:$imm))), 1156 (!cast<LAInst>(Inst#"_DU") LASX256:$xj, uimm5:$imm)>; 1157} 1158 1159multiclass PatXrXrXr<SDPatternOperator OpNode, string Inst> { 1160 def : Pat<(OpNode (v32i8 LASX256:$xd), (v32i8 LASX256:$xj), 1161 (v32i8 LASX256:$xk)), 1162 (!cast<LAInst>(Inst#"_B") LASX256:$xd, LASX256:$xj, LASX256:$xk)>; 1163 def : Pat<(OpNode (v16i16 LASX256:$xd), (v16i16 LASX256:$xj), 1164 (v16i16 LASX256:$xk)), 1165 (!cast<LAInst>(Inst#"_H") LASX256:$xd, LASX256:$xj, LASX256:$xk)>; 1166 def : Pat<(OpNode (v8i32 LASX256:$xd), (v8i32 LASX256:$xj), 1167 (v8i32 LASX256:$xk)), 1168 (!cast<LAInst>(Inst#"_W") LASX256:$xd, LASX256:$xj, LASX256:$xk)>; 1169 def : Pat<(OpNode (v4i64 LASX256:$xd), (v4i64 LASX256:$xj), 1170 (v4i64 LASX256:$xk)), 1171 (!cast<LAInst>(Inst#"_D") LASX256:$xd, LASX256:$xj, LASX256:$xk)>; 1172} 1173 1174multiclass PatShiftXrXr<SDPatternOperator OpNode, string Inst> { 1175 def : Pat<(OpNode (v32i8 LASX256:$xj), (and vsplati8_imm_eq_7, 1176 (v32i8 LASX256:$xk))), 1177 (!cast<LAInst>(Inst#"_B") LASX256:$xj, LASX256:$xk)>; 1178 def : Pat<(OpNode (v16i16 LASX256:$xj), (and vsplati16_imm_eq_15, 1179 (v16i16 LASX256:$xk))), 1180 (!cast<LAInst>(Inst#"_H") LASX256:$xj, LASX256:$xk)>; 1181 def : Pat<(OpNode (v8i32 LASX256:$xj), (and vsplati32_imm_eq_31, 1182 (v8i32 LASX256:$xk))), 1183 (!cast<LAInst>(Inst#"_W") LASX256:$xj, LASX256:$xk)>; 1184 def : Pat<(OpNode (v4i64 LASX256:$xj), (and vsplati64_imm_eq_63, 1185 (v4i64 LASX256:$xk))), 1186 (!cast<LAInst>(Inst#"_D") LASX256:$xj, LASX256:$xk)>; 1187} 1188 1189multiclass PatShiftXrUimm<SDPatternOperator OpNode, string Inst> { 1190 def : Pat<(OpNode (v32i8 LASX256:$xj), (v32i8 (SplatPat_uimm3 uimm3:$imm))), 1191 (!cast<LAInst>(Inst#"_B") LASX256:$xj, uimm3:$imm)>; 1192 def : Pat<(OpNode (v16i16 LASX256:$xj), (v16i16 (SplatPat_uimm4 uimm4:$imm))), 1193 (!cast<LAInst>(Inst#"_H") LASX256:$xj, uimm4:$imm)>; 1194 def : Pat<(OpNode (v8i32 LASX256:$xj), (v8i32 (SplatPat_uimm5 uimm5:$imm))), 1195 (!cast<LAInst>(Inst#"_W") LASX256:$xj, uimm5:$imm)>; 1196 def : Pat<(OpNode (v4i64 LASX256:$xj), (v4i64 (SplatPat_uimm6 uimm6:$imm))), 1197 (!cast<LAInst>(Inst#"_D") LASX256:$xj, uimm6:$imm)>; 1198} 1199 1200multiclass PatCCXrSimm5<CondCode CC, string Inst> { 1201 def : Pat<(v32i8 (setcc (v32i8 LASX256:$xj), 1202 (v32i8 (SplatPat_simm5 simm5:$imm)), CC)), 1203 (!cast<LAInst>(Inst#"_B") LASX256:$xj, simm5:$imm)>; 1204 def : Pat<(v16i16 (setcc (v16i16 LASX256:$xj), 1205 (v16i16 (SplatPat_simm5 simm5:$imm)), CC)), 1206 (!cast<LAInst>(Inst#"_H") LASX256:$xj, simm5:$imm)>; 1207 def : Pat<(v8i32 (setcc (v8i32 LASX256:$xj), 1208 (v8i32 (SplatPat_simm5 simm5:$imm)), CC)), 1209 (!cast<LAInst>(Inst#"_W") LASX256:$xj, simm5:$imm)>; 1210 def : Pat<(v4i64 (setcc (v4i64 LASX256:$xj), 1211 (v4i64 (SplatPat_simm5 simm5:$imm)), CC)), 1212 (!cast<LAInst>(Inst#"_D") LASX256:$xj, simm5:$imm)>; 1213} 1214 1215multiclass PatCCXrUimm5<CondCode CC, string Inst> { 1216 def : Pat<(v32i8 (setcc (v32i8 LASX256:$xj), 1217 (v32i8 (SplatPat_uimm5 uimm5:$imm)), CC)), 1218 (!cast<LAInst>(Inst#"_BU") LASX256:$xj, uimm5:$imm)>; 1219 def : Pat<(v16i16 (setcc (v16i16 LASX256:$xj), 1220 (v16i16 (SplatPat_uimm5 uimm5:$imm)), CC)), 1221 (!cast<LAInst>(Inst#"_HU") LASX256:$xj, uimm5:$imm)>; 1222 def : Pat<(v8i32 (setcc (v8i32 LASX256:$xj), 1223 (v8i32 (SplatPat_uimm5 uimm5:$imm)), CC)), 1224 (!cast<LAInst>(Inst#"_WU") LASX256:$xj, uimm5:$imm)>; 1225 def : Pat<(v4i64 (setcc (v4i64 LASX256:$xj), 1226 (v4i64 (SplatPat_uimm5 uimm5:$imm)), CC)), 1227 (!cast<LAInst>(Inst#"_DU") LASX256:$xj, uimm5:$imm)>; 1228} 1229 1230multiclass PatCCXrXr<CondCode CC, string Inst> { 1231 def : Pat<(v32i8 (setcc (v32i8 LASX256:$xj), (v32i8 LASX256:$xk), CC)), 1232 (!cast<LAInst>(Inst#"_B") LASX256:$xj, LASX256:$xk)>; 1233 def : Pat<(v16i16 (setcc (v16i16 LASX256:$xj), (v16i16 LASX256:$xk), CC)), 1234 (!cast<LAInst>(Inst#"_H") LASX256:$xj, LASX256:$xk)>; 1235 def : Pat<(v8i32 (setcc (v8i32 LASX256:$xj), (v8i32 LASX256:$xk), CC)), 1236 (!cast<LAInst>(Inst#"_W") LASX256:$xj, LASX256:$xk)>; 1237 def : Pat<(v4i64 (setcc (v4i64 LASX256:$xj), (v4i64 LASX256:$xk), CC)), 1238 (!cast<LAInst>(Inst#"_D") LASX256:$xj, LASX256:$xk)>; 1239} 1240 1241multiclass PatCCXrXrU<CondCode CC, string Inst> { 1242 def : Pat<(v32i8 (setcc (v32i8 LASX256:$xj), (v32i8 LASX256:$xk), CC)), 1243 (!cast<LAInst>(Inst#"_BU") LASX256:$xj, LASX256:$xk)>; 1244 def : Pat<(v16i16 (setcc (v16i16 LASX256:$xj), (v16i16 LASX256:$xk), CC)), 1245 (!cast<LAInst>(Inst#"_HU") LASX256:$xj, LASX256:$xk)>; 1246 def : Pat<(v8i32 (setcc (v8i32 LASX256:$xj), (v8i32 LASX256:$xk), CC)), 1247 (!cast<LAInst>(Inst#"_WU") LASX256:$xj, LASX256:$xk)>; 1248 def : Pat<(v4i64 (setcc (v4i64 LASX256:$xj), (v4i64 LASX256:$xk), CC)), 1249 (!cast<LAInst>(Inst#"_DU") LASX256:$xj, LASX256:$xk)>; 1250} 1251 1252multiclass PatCCXrXrF<CondCode CC, string Inst> { 1253 def : Pat<(v8i32 (setcc (v8f32 LASX256:$xj), (v8f32 LASX256:$xk), CC)), 1254 (!cast<LAInst>(Inst#"_S") LASX256:$xj, LASX256:$xk)>; 1255 def : Pat<(v4i64 (setcc (v4f64 LASX256:$xj), (v4f64 LASX256:$xk), CC)), 1256 (!cast<LAInst>(Inst#"_D") LASX256:$xj, LASX256:$xk)>; 1257} 1258 1259let Predicates = [HasExtLASX] in { 1260 1261// XVADD_{B/H/W/D} 1262defm : PatXrXr<add, "XVADD">; 1263// XVSUB_{B/H/W/D} 1264defm : PatXrXr<sub, "XVSUB">; 1265 1266// XVADDI_{B/H/W/D}U 1267defm : PatXrUimm5<add, "XVADDI">; 1268// XVSUBI_{B/H/W/D}U 1269defm : PatXrUimm5<sub, "XVSUBI">; 1270 1271// XVNEG_{B/H/W/D} 1272def : Pat<(sub immAllZerosV, (v32i8 LASX256:$xj)), (XVNEG_B LASX256:$xj)>; 1273def : Pat<(sub immAllZerosV, (v16i16 LASX256:$xj)), (XVNEG_H LASX256:$xj)>; 1274def : Pat<(sub immAllZerosV, (v8i32 LASX256:$xj)), (XVNEG_W LASX256:$xj)>; 1275def : Pat<(sub immAllZerosV, (v4i64 LASX256:$xj)), (XVNEG_D LASX256:$xj)>; 1276 1277// XVMAX[I]_{B/H/W/D}[U] 1278defm : PatXrXr<smax, "XVMAX">; 1279defm : PatXrXrU<umax, "XVMAX">; 1280defm : PatXrSimm5<smax, "XVMAXI">; 1281defm : PatXrUimm5<umax, "XVMAXI">; 1282 1283// XVMIN[I]_{B/H/W/D}[U] 1284defm : PatXrXr<smin, "XVMIN">; 1285defm : PatXrXrU<umin, "XVMIN">; 1286defm : PatXrSimm5<smin, "XVMINI">; 1287defm : PatXrUimm5<umin, "XVMINI">; 1288 1289// XVMUL_{B/H/W/D} 1290defm : PatXrXr<mul, "XVMUL">; 1291 1292// XVMUH_{B/H/W/D}[U] 1293defm : PatXrXr<mulhs, "XVMUH">; 1294defm : PatXrXrU<mulhu, "XVMUH">; 1295 1296// XVMADD_{B/H/W/D} 1297defm : PatXrXrXr<muladd, "XVMADD">; 1298// XVMSUB_{B/H/W/D} 1299defm : PatXrXrXr<mulsub, "XVMSUB">; 1300 1301// XVDIV_{B/H/W/D}[U] 1302defm : PatXrXr<sdiv, "XVDIV">; 1303defm : PatXrXrU<udiv, "XVDIV">; 1304 1305// XVMOD_{B/H/W/D}[U] 1306defm : PatXrXr<srem, "XVMOD">; 1307defm : PatXrXrU<urem, "XVMOD">; 1308 1309// XVAND_V 1310foreach vt = [v32i8, v16i16, v8i32, v4i64] in 1311def : Pat<(and (vt LASX256:$xj), (vt LASX256:$xk)), 1312 (XVAND_V LASX256:$xj, LASX256:$xk)>; 1313// XVOR_V 1314foreach vt = [v32i8, v16i16, v8i32, v4i64] in 1315def : Pat<(or (vt LASX256:$xj), (vt LASX256:$xk)), 1316 (XVOR_V LASX256:$xj, LASX256:$xk)>; 1317// XVXOR_V 1318foreach vt = [v32i8, v16i16, v8i32, v4i64] in 1319def : Pat<(xor (vt LASX256:$xj), (vt LASX256:$xk)), 1320 (XVXOR_V LASX256:$xj, LASX256:$xk)>; 1321// XVNOR_V 1322foreach vt = [v32i8, v16i16, v8i32, v4i64] in 1323def : Pat<(vnot (or (vt LASX256:$xj), (vt LASX256:$xk))), 1324 (XVNOR_V LASX256:$xj, LASX256:$xk)>; 1325 1326// XVANDI_B 1327def : Pat<(and (v32i8 LASX256:$xj), (v32i8 (SplatPat_uimm8 uimm8:$imm))), 1328 (XVANDI_B LASX256:$xj, uimm8:$imm)>; 1329// XVORI_B 1330def : Pat<(or (v32i8 LASX256:$xj), (v32i8 (SplatPat_uimm8 uimm8:$imm))), 1331 (XVORI_B LASX256:$xj, uimm8:$imm)>; 1332 1333// XVXORI_B 1334def : Pat<(xor (v32i8 LASX256:$xj), (v32i8 (SplatPat_uimm8 uimm8:$imm))), 1335 (XVXORI_B LASX256:$xj, uimm8:$imm)>; 1336 1337// XVSLL[I]_{B/H/W/D} 1338defm : PatXrXr<shl, "XVSLL">; 1339defm : PatShiftXrXr<shl, "XVSLL">; 1340defm : PatShiftXrUimm<shl, "XVSLLI">; 1341 1342// XVSRL[I]_{B/H/W/D} 1343defm : PatXrXr<srl, "XVSRL">; 1344defm : PatShiftXrXr<srl, "XVSRL">; 1345defm : PatShiftXrUimm<srl, "XVSRLI">; 1346 1347// XVSRA[I]_{B/H/W/D} 1348defm : PatXrXr<sra, "XVSRA">; 1349defm : PatShiftXrXr<sra, "XVSRA">; 1350defm : PatShiftXrUimm<sra, "XVSRAI">; 1351 1352// XVCLZ_{B/H/W/D} 1353defm : PatXr<ctlz, "XVCLZ">; 1354 1355// XVPCNT_{B/H/W/D} 1356defm : PatXr<ctpop, "XVPCNT">; 1357 1358// XVBITCLR_{B/H/W/D} 1359def : Pat<(and v32i8:$xj, (vnot (shl vsplat_imm_eq_1, v32i8:$xk))), 1360 (v32i8 (XVBITCLR_B v32i8:$xj, v32i8:$xk))>; 1361def : Pat<(and v16i16:$xj, (vnot (shl vsplat_imm_eq_1, v16i16:$xk))), 1362 (v16i16 (XVBITCLR_H v16i16:$xj, v16i16:$xk))>; 1363def : Pat<(and v8i32:$xj, (vnot (shl vsplat_imm_eq_1, v8i32:$xk))), 1364 (v8i32 (XVBITCLR_W v8i32:$xj, v8i32:$xk))>; 1365def : Pat<(and v4i64:$xj, (vnot (shl vsplat_imm_eq_1, v4i64:$xk))), 1366 (v4i64 (XVBITCLR_D v4i64:$xj, v4i64:$xk))>; 1367def : Pat<(and v32i8:$xj, (vnot (shl vsplat_imm_eq_1, 1368 (vsplati8imm7 v32i8:$xk)))), 1369 (v32i8 (XVBITCLR_B v32i8:$xj, v32i8:$xk))>; 1370def : Pat<(and v16i16:$xj, (vnot (shl vsplat_imm_eq_1, 1371 (vsplati16imm15 v16i16:$xk)))), 1372 (v16i16 (XVBITCLR_H v16i16:$xj, v16i16:$xk))>; 1373def : Pat<(and v8i32:$xj, (vnot (shl vsplat_imm_eq_1, 1374 (vsplati32imm31 v8i32:$xk)))), 1375 (v8i32 (XVBITCLR_W v8i32:$xj, v8i32:$xk))>; 1376def : Pat<(and v4i64:$xj, (vnot (shl vsplat_imm_eq_1, 1377 (vsplati64imm63 v4i64:$xk)))), 1378 (v4i64 (XVBITCLR_D v4i64:$xj, v4i64:$xk))>; 1379 1380// XVBITCLRI_{B/H/W/D} 1381def : Pat<(and (v32i8 LASX256:$xj), (v32i8 (vsplat_uimm_inv_pow2 uimm3:$imm))), 1382 (XVBITCLRI_B LASX256:$xj, uimm3:$imm)>; 1383def : Pat<(and (v16i16 LASX256:$xj), (v16i16 (vsplat_uimm_inv_pow2 uimm4:$imm))), 1384 (XVBITCLRI_H LASX256:$xj, uimm4:$imm)>; 1385def : Pat<(and (v8i32 LASX256:$xj), (v8i32 (vsplat_uimm_inv_pow2 uimm5:$imm))), 1386 (XVBITCLRI_W LASX256:$xj, uimm5:$imm)>; 1387def : Pat<(and (v4i64 LASX256:$xj), (v4i64 (vsplat_uimm_inv_pow2 uimm6:$imm))), 1388 (XVBITCLRI_D LASX256:$xj, uimm6:$imm)>; 1389 1390// XVBITSET_{B/H/W/D} 1391def : Pat<(or v32i8:$xj, (shl vsplat_imm_eq_1, v32i8:$xk)), 1392 (v32i8 (XVBITSET_B v32i8:$xj, v32i8:$xk))>; 1393def : Pat<(or v16i16:$xj, (shl vsplat_imm_eq_1, v16i16:$xk)), 1394 (v16i16 (XVBITSET_H v16i16:$xj, v16i16:$xk))>; 1395def : Pat<(or v8i32:$xj, (shl vsplat_imm_eq_1, v8i32:$xk)), 1396 (v8i32 (XVBITSET_W v8i32:$xj, v8i32:$xk))>; 1397def : Pat<(or v4i64:$xj, (shl vsplat_imm_eq_1, v4i64:$xk)), 1398 (v4i64 (XVBITSET_D v4i64:$xj, v4i64:$xk))>; 1399def : Pat<(or v32i8:$xj, (shl vsplat_imm_eq_1, (vsplati8imm7 v32i8:$xk))), 1400 (v32i8 (XVBITSET_B v32i8:$xj, v32i8:$xk))>; 1401def : Pat<(or v16i16:$xj, (shl vsplat_imm_eq_1, (vsplati16imm15 v16i16:$xk))), 1402 (v16i16 (XVBITSET_H v16i16:$xj, v16i16:$xk))>; 1403def : Pat<(or v8i32:$xj, (shl vsplat_imm_eq_1, (vsplati32imm31 v8i32:$xk))), 1404 (v8i32 (XVBITSET_W v8i32:$xj, v8i32:$xk))>; 1405def : Pat<(or v4i64:$xj, (shl vsplat_imm_eq_1, (vsplati64imm63 v4i64:$xk))), 1406 (v4i64 (XVBITSET_D v4i64:$xj, v4i64:$xk))>; 1407 1408// XVBITSETI_{B/H/W/D} 1409def : Pat<(or (v32i8 LASX256:$xj), (v32i8 (vsplat_uimm_pow2 uimm3:$imm))), 1410 (XVBITSETI_B LASX256:$xj, uimm3:$imm)>; 1411def : Pat<(or (v16i16 LASX256:$xj), (v16i16 (vsplat_uimm_pow2 uimm4:$imm))), 1412 (XVBITSETI_H LASX256:$xj, uimm4:$imm)>; 1413def : Pat<(or (v8i32 LASX256:$xj), (v8i32 (vsplat_uimm_pow2 uimm5:$imm))), 1414 (XVBITSETI_W LASX256:$xj, uimm5:$imm)>; 1415def : Pat<(or (v4i64 LASX256:$xj), (v4i64 (vsplat_uimm_pow2 uimm6:$imm))), 1416 (XVBITSETI_D LASX256:$xj, uimm6:$imm)>; 1417 1418// XVBITREV_{B/H/W/D} 1419def : Pat<(xor v32i8:$xj, (shl vsplat_imm_eq_1, v32i8:$xk)), 1420 (v32i8 (XVBITREV_B v32i8:$xj, v32i8:$xk))>; 1421def : Pat<(xor v16i16:$xj, (shl vsplat_imm_eq_1, v16i16:$xk)), 1422 (v16i16 (XVBITREV_H v16i16:$xj, v16i16:$xk))>; 1423def : Pat<(xor v8i32:$xj, (shl vsplat_imm_eq_1, v8i32:$xk)), 1424 (v8i32 (XVBITREV_W v8i32:$xj, v8i32:$xk))>; 1425def : Pat<(xor v4i64:$xj, (shl vsplat_imm_eq_1, v4i64:$xk)), 1426 (v4i64 (XVBITREV_D v4i64:$xj, v4i64:$xk))>; 1427def : Pat<(xor v32i8:$xj, (shl vsplat_imm_eq_1, (vsplati8imm7 v32i8:$xk))), 1428 (v32i8 (XVBITREV_B v32i8:$xj, v32i8:$xk))>; 1429def : Pat<(xor v16i16:$xj, (shl vsplat_imm_eq_1, (vsplati16imm15 v16i16:$xk))), 1430 (v16i16 (XVBITREV_H v16i16:$xj, v16i16:$xk))>; 1431def : Pat<(xor v8i32:$xj, (shl vsplat_imm_eq_1, (vsplati32imm31 v8i32:$xk))), 1432 (v8i32 (XVBITREV_W v8i32:$xj, v8i32:$xk))>; 1433def : Pat<(xor v4i64:$xj, (shl vsplat_imm_eq_1, (vsplati64imm63 v4i64:$xk))), 1434 (v4i64 (XVBITREV_D v4i64:$xj, v4i64:$xk))>; 1435 1436// XVBITREVI_{B/H/W/D} 1437def : Pat<(xor (v32i8 LASX256:$xj), (v32i8 (vsplat_uimm_pow2 uimm3:$imm))), 1438 (XVBITREVI_B LASX256:$xj, uimm3:$imm)>; 1439def : Pat<(xor (v16i16 LASX256:$xj), (v16i16 (vsplat_uimm_pow2 uimm4:$imm))), 1440 (XVBITREVI_H LASX256:$xj, uimm4:$imm)>; 1441def : Pat<(xor (v8i32 LASX256:$xj), (v8i32 (vsplat_uimm_pow2 uimm5:$imm))), 1442 (XVBITREVI_W LASX256:$xj, uimm5:$imm)>; 1443def : Pat<(xor (v4i64 LASX256:$xj), (v4i64 (vsplat_uimm_pow2 uimm6:$imm))), 1444 (XVBITREVI_D LASX256:$xj, uimm6:$imm)>; 1445 1446// XVFADD_{S/D} 1447defm : PatXrXrF<fadd, "XVFADD">; 1448 1449// XVFSUB_{S/D} 1450defm : PatXrXrF<fsub, "XVFSUB">; 1451 1452// XVFMUL_{S/D} 1453defm : PatXrXrF<fmul, "XVFMUL">; 1454 1455// XVFDIV_{S/D} 1456defm : PatXrXrF<fdiv, "XVFDIV">; 1457 1458// XVFMADD_{S/D} 1459def : Pat<(fma v8f32:$xj, v8f32:$xk, v8f32:$xa), 1460 (XVFMADD_S v8f32:$xj, v8f32:$xk, v8f32:$xa)>; 1461def : Pat<(fma v4f64:$xj, v4f64:$xk, v4f64:$xa), 1462 (XVFMADD_D v4f64:$xj, v4f64:$xk, v4f64:$xa)>; 1463 1464// XVFMSUB_{S/D} 1465def : Pat<(fma v8f32:$xj, v8f32:$xk, (fneg v8f32:$xa)), 1466 (XVFMSUB_S v8f32:$xj, v8f32:$xk, v8f32:$xa)>; 1467def : Pat<(fma v4f64:$xj, v4f64:$xk, (fneg v4f64:$xa)), 1468 (XVFMSUB_D v4f64:$xj, v4f64:$xk, v4f64:$xa)>; 1469 1470// XVFNMADD_{S/D} 1471def : Pat<(fneg (fma v8f32:$xj, v8f32:$xk, v8f32:$xa)), 1472 (XVFNMADD_S v8f32:$xj, v8f32:$xk, v8f32:$xa)>; 1473def : Pat<(fneg (fma v4f64:$xj, v4f64:$xk, v4f64:$xa)), 1474 (XVFNMADD_D v4f64:$xj, v4f64:$xk, v4f64:$xa)>; 1475def : Pat<(fma_nsz (fneg v8f32:$xj), v8f32:$xk, (fneg v8f32:$xa)), 1476 (XVFNMADD_S v8f32:$xj, v8f32:$xk, v8f32:$xa)>; 1477def : Pat<(fma_nsz (fneg v4f64:$xj), v4f64:$xk, (fneg v4f64:$xa)), 1478 (XVFNMADD_D v4f64:$xj, v4f64:$xk, v4f64:$xa)>; 1479 1480// XVFNMSUB_{S/D} 1481def : Pat<(fneg (fma v8f32:$xj, v8f32:$xk, (fneg v8f32:$xa))), 1482 (XVFNMSUB_S v8f32:$xj, v8f32:$xk, v8f32:$xa)>; 1483def : Pat<(fneg (fma v4f64:$xj, v4f64:$xk, (fneg v4f64:$xa))), 1484 (XVFNMSUB_D v4f64:$xj, v4f64:$xk, v4f64:$xa)>; 1485def : Pat<(fma_nsz (fneg v8f32:$xj), v8f32:$xk, v8f32:$xa), 1486 (XVFNMSUB_S v8f32:$xj, v8f32:$xk, v8f32:$xa)>; 1487def : Pat<(fma_nsz (fneg v4f64:$xj), v4f64:$xk, v4f64:$xa), 1488 (XVFNMSUB_D v4f64:$xj, v4f64:$xk, v4f64:$xa)>; 1489 1490// XVFSQRT_{S/D} 1491defm : PatXrF<fsqrt, "XVFSQRT">; 1492 1493// XVRECIP_{S/D} 1494def : Pat<(fdiv vsplatf32_fpimm_eq_1, v8f32:$xj), 1495 (XVFRECIP_S v8f32:$xj)>; 1496def : Pat<(fdiv vsplatf64_fpimm_eq_1, v4f64:$xj), 1497 (XVFRECIP_D v4f64:$xj)>; 1498 1499// XVFRSQRT_{S/D} 1500def : Pat<(fdiv vsplatf32_fpimm_eq_1, (fsqrt v8f32:$xj)), 1501 (XVFRSQRT_S v8f32:$xj)>; 1502def : Pat<(fdiv vsplatf64_fpimm_eq_1, (fsqrt v4f64:$xj)), 1503 (XVFRSQRT_D v4f64:$xj)>; 1504 1505// XVSEQ[I]_{B/H/W/D} 1506defm : PatCCXrSimm5<SETEQ, "XVSEQI">; 1507defm : PatCCXrXr<SETEQ, "XVSEQ">; 1508 1509// XVSLE[I]_{B/H/W/D}[U] 1510defm : PatCCXrSimm5<SETLE, "XVSLEI">; 1511defm : PatCCXrUimm5<SETULE, "XVSLEI">; 1512defm : PatCCXrXr<SETLE, "XVSLE">; 1513defm : PatCCXrXrU<SETULE, "XVSLE">; 1514 1515// XVSLT[I]_{B/H/W/D}[U] 1516defm : PatCCXrSimm5<SETLT, "XVSLTI">; 1517defm : PatCCXrUimm5<SETULT, "XVSLTI">; 1518defm : PatCCXrXr<SETLT, "XVSLT">; 1519defm : PatCCXrXrU<SETULT, "XVSLT">; 1520 1521// XVFCMP.cond.{S/D} 1522defm : PatCCXrXrF<SETEQ, "XVFCMP_CEQ">; 1523defm : PatCCXrXrF<SETOEQ, "XVFCMP_CEQ">; 1524defm : PatCCXrXrF<SETUEQ, "XVFCMP_CUEQ">; 1525 1526defm : PatCCXrXrF<SETLE, "XVFCMP_CLE">; 1527defm : PatCCXrXrF<SETOLE, "XVFCMP_CLE">; 1528defm : PatCCXrXrF<SETULE, "XVFCMP_CULE">; 1529 1530defm : PatCCXrXrF<SETLT, "XVFCMP_CLT">; 1531defm : PatCCXrXrF<SETOLT, "XVFCMP_CLT">; 1532defm : PatCCXrXrF<SETULT, "XVFCMP_CULT">; 1533 1534defm : PatCCXrXrF<SETNE, "XVFCMP_CNE">; 1535defm : PatCCXrXrF<SETONE, "XVFCMP_CNE">; 1536defm : PatCCXrXrF<SETUNE, "XVFCMP_CUNE">; 1537 1538defm : PatCCXrXrF<SETO, "XVFCMP_COR">; 1539defm : PatCCXrXrF<SETUO, "XVFCMP_CUN">; 1540 1541// PseudoXVINSGR2VR_{B/H} 1542def : Pat<(vector_insert v32i8:$xd, GRLenVT:$rj, uimm5:$imm), 1543 (PseudoXVINSGR2VR_B v32i8:$xd, GRLenVT:$rj, uimm5:$imm)>; 1544def : Pat<(vector_insert v16i16:$xd, GRLenVT:$rj, uimm4:$imm), 1545 (PseudoXVINSGR2VR_H v16i16:$xd, GRLenVT:$rj, uimm4:$imm)>; 1546 1547// XVINSGR2VR_{W/D} 1548def : Pat<(vector_insert v8i32:$xd, GRLenVT:$rj, uimm3:$imm), 1549 (XVINSGR2VR_W v8i32:$xd, GRLenVT:$rj, uimm3:$imm)>; 1550def : Pat<(vector_insert v4i64:$xd, GRLenVT:$rj, uimm2:$imm), 1551 (XVINSGR2VR_D v4i64:$xd, GRLenVT:$rj, uimm2:$imm)>; 1552 1553def : Pat<(vector_insert v8f32:$vd, FPR32:$fj, uimm3:$imm), 1554 (XVINSGR2VR_W $vd, (COPY_TO_REGCLASS FPR32:$fj, GPR), uimm3:$imm)>; 1555def : Pat<(vector_insert v4f64:$vd, FPR64:$fj, uimm2:$imm), 1556 (XVINSGR2VR_D $vd, (COPY_TO_REGCLASS FPR64:$fj, GPR), uimm2:$imm)>; 1557 1558// XVPICKVE2GR_W[U] 1559def : Pat<(loongarch_vpick_sext_elt v8i32:$xd, uimm3:$imm, i32), 1560 (XVPICKVE2GR_W v8i32:$xd, uimm3:$imm)>; 1561def : Pat<(loongarch_vpick_zext_elt v8i32:$xd, uimm3:$imm, i32), 1562 (XVPICKVE2GR_WU v8i32:$xd, uimm3:$imm)>; 1563 1564// XVREPLGR2VR_{B/H/W/D} 1565def : Pat<(lasxsplati8 GPR:$rj), (XVREPLGR2VR_B GPR:$rj)>; 1566def : Pat<(lasxsplati16 GPR:$rj), (XVREPLGR2VR_H GPR:$rj)>; 1567def : Pat<(lasxsplati32 GPR:$rj), (XVREPLGR2VR_W GPR:$rj)>; 1568def : Pat<(lasxsplati64 GPR:$rj), (XVREPLGR2VR_D GPR:$rj)>; 1569 1570// XVREPLVE_{B/H/W/D} 1571def : Pat<(loongarch_vreplve v32i8:$xj, GRLenVT:$rk), 1572 (XVREPLVE_B v32i8:$xj, GRLenVT:$rk)>; 1573def : Pat<(loongarch_vreplve v16i16:$xj, GRLenVT:$rk), 1574 (XVREPLVE_H v16i16:$xj, GRLenVT:$rk)>; 1575def : Pat<(loongarch_vreplve v8i32:$xj, GRLenVT:$rk), 1576 (XVREPLVE_W v8i32:$xj, GRLenVT:$rk)>; 1577def : Pat<(loongarch_vreplve v4i64:$xj, GRLenVT:$rk), 1578 (XVREPLVE_D v4i64:$xj, GRLenVT:$rk)>; 1579 1580// XVSHUF_{B/H/W/D} 1581def : Pat<(loongarch_vshuf v32i8:$xa, v32i8:$xj, v32i8:$xk), 1582 (XVSHUF_B v32i8:$xj, v32i8:$xk, v32i8:$xa)>; 1583def : Pat<(loongarch_vshuf v16i16:$xd, v16i16:$xj, v16i16:$xk), 1584 (XVSHUF_H v16i16:$xd, v16i16:$xj, v16i16:$xk)>; 1585def : Pat<(loongarch_vshuf v8i32:$xd, v8i32:$xj, v8i32:$xk), 1586 (XVSHUF_W v8i32:$xd, v8i32:$xj, v8i32:$xk)>; 1587def : Pat<(loongarch_vshuf v4i64:$xd, v4i64:$xj, v4i64:$xk), 1588 (XVSHUF_D v4i64:$xd, v4i64:$xj, v4i64:$xk)>; 1589def : Pat<(loongarch_vshuf v8i32:$xd, v8f32:$xj, v8f32:$xk), 1590 (XVSHUF_W v8i32:$xd, v8f32:$xj, v8f32:$xk)>; 1591def : Pat<(loongarch_vshuf v4i64:$xd, v4f64:$xj, v4f64:$xk), 1592 (XVSHUF_D v4i64:$xd, v4f64:$xj, v4f64:$xk)>; 1593 1594// XVPICKEV_{B/H/W/D} 1595def : Pat<(loongarch_vpickev v32i8:$xj, v32i8:$xk), 1596 (XVPICKEV_B v32i8:$xj, v32i8:$xk)>; 1597def : Pat<(loongarch_vpickev v16i16:$xj, v16i16:$xk), 1598 (XVPICKEV_H v16i16:$xj, v16i16:$xk)>; 1599def : Pat<(loongarch_vpickev v8i32:$xj, v8i32:$xk), 1600 (XVPICKEV_W v8i32:$xj, v8i32:$xk)>; 1601def : Pat<(loongarch_vpickev v4i64:$xj, v4i64:$xk), 1602 (XVPICKEV_D v4i64:$xj, v4i64:$xk)>; 1603def : Pat<(loongarch_vpickev v8f32:$xj, v8f32:$xk), 1604 (XVPICKEV_W v8f32:$xj, v8f32:$xk)>; 1605def : Pat<(loongarch_vpickev v4f64:$xj, v4f64:$xk), 1606 (XVPICKEV_D v4f64:$xj, v4f64:$xk)>; 1607 1608// XVPICKOD_{B/H/W/D} 1609def : Pat<(loongarch_vpickod v32i8:$xj, v32i8:$xk), 1610 (XVPICKOD_B v32i8:$xj, v32i8:$xk)>; 1611def : Pat<(loongarch_vpickod v16i16:$xj, v16i16:$xk), 1612 (XVPICKOD_H v16i16:$xj, v16i16:$xk)>; 1613def : Pat<(loongarch_vpickod v8i32:$xj, v8i32:$xk), 1614 (XVPICKOD_W v8i32:$xj, v8i32:$xk)>; 1615def : Pat<(loongarch_vpickod v4i64:$xj, v4i64:$xk), 1616 (XVPICKOD_D v4i64:$xj, v4i64:$xk)>; 1617def : Pat<(loongarch_vpickod v8f32:$xj, v8f32:$xk), 1618 (XVPICKOD_W v8f32:$xj, v8f32:$xk)>; 1619def : Pat<(loongarch_vpickod v4f64:$xj, v4f64:$xk), 1620 (XVPICKOD_D v4f64:$xj, v4f64:$xk)>; 1621 1622// XVPACKEV_{B/H/W/D} 1623def : Pat<(loongarch_vpackev v32i8:$xj, v32i8:$xk), 1624 (XVPACKEV_B v32i8:$xj, v32i8:$xk)>; 1625def : Pat<(loongarch_vpackev v16i16:$xj, v16i16:$xk), 1626 (XVPACKEV_H v16i16:$xj, v16i16:$xk)>; 1627def : Pat<(loongarch_vpackev v8i32:$xj, v8i32:$xk), 1628 (XVPACKEV_W v8i32:$xj, v8i32:$xk)>; 1629def : Pat<(loongarch_vpackev v4i64:$xj, v4i64:$xk), 1630 (XVPACKEV_D v4i64:$xj, v4i64:$xk)>; 1631def : Pat<(loongarch_vpackev v8f32:$xj, v8f32:$xk), 1632 (XVPACKEV_W v8f32:$xj, v8f32:$xk)>; 1633def : Pat<(loongarch_vpackev v4f64:$xj, v4f64:$xk), 1634 (XVPACKEV_D v4f64:$xj, v4f64:$xk)>; 1635 1636// XVPACKOD_{B/H/W/D} 1637def : Pat<(loongarch_vpackod v32i8:$xj, v32i8:$xk), 1638 (XVPACKOD_B v32i8:$xj, v32i8:$xk)>; 1639def : Pat<(loongarch_vpackod v16i16:$xj, v16i16:$xk), 1640 (XVPACKOD_H v16i16:$xj, v16i16:$xk)>; 1641def : Pat<(loongarch_vpackod v8i32:$xj, v8i32:$xk), 1642 (XVPACKOD_W v8i32:$xj, v8i32:$xk)>; 1643def : Pat<(loongarch_vpackod v4i64:$xj, v4i64:$xk), 1644 (XVPACKOD_D v4i64:$xj, v4i64:$xk)>; 1645def : Pat<(loongarch_vpackod v8f32:$xj, v8f32:$xk), 1646 (XVPACKOD_W v8f32:$xj, v8f32:$xk)>; 1647def : Pat<(loongarch_vpackod v4f64:$xj, v4f64:$xk), 1648 (XVPACKOD_D v4f64:$xj, v4f64:$xk)>; 1649 1650// XVILVL_{B/H/W/D} 1651def : Pat<(loongarch_vilvl v32i8:$xj, v32i8:$xk), 1652 (XVILVL_B v32i8:$xj, v32i8:$xk)>; 1653def : Pat<(loongarch_vilvl v16i16:$xj, v16i16:$xk), 1654 (XVILVL_H v16i16:$xj, v16i16:$xk)>; 1655def : Pat<(loongarch_vilvl v8i32:$xj, v8i32:$xk), 1656 (XVILVL_W v8i32:$xj, v8i32:$xk)>; 1657def : Pat<(loongarch_vilvl v4i64:$xj, v4i64:$xk), 1658 (XVILVL_D v4i64:$xj, v4i64:$xk)>; 1659def : Pat<(loongarch_vilvl v8f32:$xj, v8f32:$xk), 1660 (XVILVL_W v8f32:$xj, v8f32:$xk)>; 1661def : Pat<(loongarch_vilvl v4f64:$xj, v4f64:$xk), 1662 (XVILVL_D v4f64:$xj, v4f64:$xk)>; 1663 1664// XVILVH_{B/H/W/D} 1665def : Pat<(loongarch_vilvh v32i8:$xj, v32i8:$xk), 1666 (XVILVH_B v32i8:$xj, v32i8:$xk)>; 1667def : Pat<(loongarch_vilvh v16i16:$xj, v16i16:$xk), 1668 (XVILVH_H v16i16:$xj, v16i16:$xk)>; 1669def : Pat<(loongarch_vilvh v8i32:$xj, v8i32:$xk), 1670 (XVILVH_W v8i32:$xj, v8i32:$xk)>; 1671def : Pat<(loongarch_vilvh v4i64:$xj, v4i64:$xk), 1672 (XVILVH_D v4i64:$xj, v4i64:$xk)>; 1673def : Pat<(loongarch_vilvh v8f32:$xj, v8f32:$xk), 1674 (XVILVH_W v8f32:$xj, v8f32:$xk)>; 1675def : Pat<(loongarch_vilvh v4f64:$xj, v4f64:$xk), 1676 (XVILVH_D v4f64:$xj, v4f64:$xk)>; 1677 1678// XVSHUF4I_{B/H/W} 1679def : Pat<(loongarch_vshuf4i v32i8:$xj, immZExt8:$ui8), 1680 (XVSHUF4I_B v32i8:$xj, immZExt8:$ui8)>; 1681def : Pat<(loongarch_vshuf4i v16i16:$xj, immZExt8:$ui8), 1682 (XVSHUF4I_H v16i16:$xj, immZExt8:$ui8)>; 1683def : Pat<(loongarch_vshuf4i v8i32:$xj, immZExt8:$ui8), 1684 (XVSHUF4I_W v8i32:$xj, immZExt8:$ui8)>; 1685def : Pat<(loongarch_vshuf4i v8f32:$xj, immZExt8:$ui8), 1686 (XVSHUF4I_W v8f32:$xj, immZExt8:$ui8)>; 1687 1688// XVREPL128VEI_{B/H/W/D} 1689def : Pat<(loongarch_vreplvei v32i8:$xj, immZExt4:$ui4), 1690 (XVREPL128VEI_B v32i8:$xj, immZExt4:$ui4)>; 1691def : Pat<(loongarch_vreplvei v16i16:$xj, immZExt3:$ui3), 1692 (XVREPL128VEI_H v16i16:$xj, immZExt3:$ui3)>; 1693def : Pat<(loongarch_vreplvei v8i32:$xj, immZExt2:$ui2), 1694 (XVREPL128VEI_W v8i32:$xj, immZExt2:$ui2)>; 1695def : Pat<(loongarch_vreplvei v4i64:$xj, immZExt1:$ui1), 1696 (XVREPL128VEI_D v4i64:$xj, immZExt1:$ui1)>; 1697def : Pat<(loongarch_vreplvei v8f32:$xj, immZExt2:$ui2), 1698 (XVREPL128VEI_W v8f32:$xj, immZExt2:$ui2)>; 1699def : Pat<(loongarch_vreplvei v4f64:$xj, immZExt1:$ui1), 1700 (XVREPL128VEI_D v4f64:$xj, immZExt1:$ui1)>; 1701 1702// XVPERMI_D 1703def : Pat<(loongarch_xvpermi v4i64:$xj, immZExt8: $ui8), 1704 (XVPERMI_D v4i64:$xj, immZExt8: $ui8)>; 1705def : Pat<(loongarch_xvpermi v4f64:$xj, immZExt8: $ui8), 1706 (XVPERMI_D v4f64:$xj, immZExt8: $ui8)>; 1707 1708// XVREPLVE0_{W/D} 1709def : Pat<(lasxsplatf32 FPR32:$fj), 1710 (XVREPLVE0_W (SUBREG_TO_REG (i64 0), FPR32:$fj, sub_32))>; 1711def : Pat<(lasxsplatf64 FPR64:$fj), 1712 (XVREPLVE0_D (SUBREG_TO_REG (i64 0), FPR64:$fj, sub_64))>; 1713 1714// Loads/Stores 1715foreach vt = [v32i8, v16i16, v8i32, v4i64, v8f32, v4f64] in { 1716 defm : LdPat<load, XVLD, vt>; 1717 def : RegRegLdPat<load, XVLDX, vt>; 1718 defm : StPat<store, XVST, LASX256, vt>; 1719 def : RegRegStPat<store, XVSTX, LASX256, vt>; 1720} 1721 1722// Vector extraction with constant index. 1723def : Pat<(i64 (vector_extract v32i8:$xj, uimm4:$imm)), 1724 (VPICKVE2GR_B (EXTRACT_SUBREG v32i8:$xj, sub_128), uimm4:$imm)>; 1725def : Pat<(i64 (vector_extract v16i16:$xj, uimm3:$imm)), 1726 (VPICKVE2GR_H (EXTRACT_SUBREG v16i16:$xj, sub_128), uimm3:$imm)>; 1727def : Pat<(i64 (vector_extract v8i32:$xj, uimm3:$imm)), 1728 (XVPICKVE2GR_W v8i32:$xj, uimm3:$imm)>; 1729def : Pat<(i64 (vector_extract v4i64:$xj, uimm2:$imm)), 1730 (XVPICKVE2GR_D v4i64:$xj, uimm2:$imm)>; 1731def : Pat<(f32 (vector_extract v8f32:$xj, uimm3:$imm)), 1732 (MOVGR2FR_W (XVPICKVE2GR_W v8f32:$xj, uimm3:$imm))>; 1733def : Pat<(f64 (vector_extract v4f64:$xj, uimm2:$imm)), 1734 (MOVGR2FR_D (XVPICKVE2GR_D v4f64:$xj, uimm2:$imm))>; 1735 1736// vselect 1737def : Pat<(v32i8 (vselect LASX256:$xd, (v32i8 (SplatPat_uimm8 uimm8:$imm)), 1738 LASX256:$xj)), 1739 (XVBITSELI_B LASX256:$xd, LASX256:$xj, uimm8:$imm)>; 1740foreach vt = [v32i8, v16i16, v8i32, v4i64, v8f32, v4f64] in 1741 def : Pat<(vt (vselect LASX256:$xa, LASX256:$xk, LASX256:$xj)), 1742 (XVBITSEL_V LASX256:$xj, LASX256:$xk, LASX256:$xa)>; 1743 1744// fneg 1745def : Pat<(fneg (v8f32 LASX256:$xj)), (XVBITREVI_W LASX256:$xj, 31)>; 1746def : Pat<(fneg (v4f64 LASX256:$xj)), (XVBITREVI_D LASX256:$xj, 63)>; 1747 1748// XVFFINT_{S_W/D_L} 1749def : Pat<(v8f32 (sint_to_fp v8i32:$vj)), (XVFFINT_S_W v8i32:$vj)>; 1750def : Pat<(v4f64 (sint_to_fp v4i64:$vj)), (XVFFINT_D_L v4i64:$vj)>; 1751def : Pat<(v4f64 (sint_to_fp v4i32:$vj)), 1752 (XVFFINT_D_L (VEXT2XV_D_W (SUBREG_TO_REG (i64 0), v4i32:$vj, 1753 sub_128)))>; 1754def : Pat<(v4f32 (sint_to_fp v4i64:$vj)), 1755 (EXTRACT_SUBREG (XVFCVT_S_D (XVPERMI_D (XVFFINT_D_L v4i64:$vj), 238), 1756 (XVFFINT_D_L v4i64:$vj)), 1757 sub_128)>; 1758 1759// XVFFINT_{S_WU/D_LU} 1760def : Pat<(v8f32 (uint_to_fp v8i32:$vj)), (XVFFINT_S_WU v8i32:$vj)>; 1761def : Pat<(v4f64 (uint_to_fp v4i64:$vj)), (XVFFINT_D_LU v4i64:$vj)>; 1762def : Pat<(v4f64 (uint_to_fp v4i32:$vj)), 1763 (XVFFINT_D_LU (VEXT2XV_DU_WU (SUBREG_TO_REG (i64 0), v4i32:$vj, 1764 sub_128)))>; 1765def : Pat<(v4f32 (uint_to_fp v4i64:$vj)), 1766 (EXTRACT_SUBREG (XVFCVT_S_D (XVPERMI_D (XVFFINT_D_LU v4i64:$vj), 238), 1767 (XVFFINT_D_LU v4i64:$vj)), 1768 sub_128)>; 1769 1770// XVFTINTRZ_{W_S/L_D} 1771def : Pat<(v8i32 (fp_to_sint v8f32:$vj)), (XVFTINTRZ_W_S v8f32:$vj)>; 1772def : Pat<(v4i64 (fp_to_sint v4f64:$vj)), (XVFTINTRZ_L_D v4f64:$vj)>; 1773def : Pat<(v4i64 (fp_to_sint v4f32:$vj)), 1774 (VEXT2XV_D_W (SUBREG_TO_REG (i64 0), (VFTINTRZ_W_S v4f32:$vj), 1775 sub_128))>; 1776def : Pat<(v4i32 (fp_to_sint (v4f64 LASX256:$vj))), 1777 (EXTRACT_SUBREG (XVFTINTRZ_W_S (XVFCVT_S_D (XVPERMI_D v4f64:$vj, 238), 1778 v4f64:$vj)), 1779 sub_128)>; 1780 1781// XVFTINTRZ_{W_SU/L_DU} 1782def : Pat<(v8i32 (fp_to_uint v8f32:$vj)), (XVFTINTRZ_WU_S v8f32:$vj)>; 1783def : Pat<(v4i64 (fp_to_uint v4f64:$vj)), (XVFTINTRZ_LU_D v4f64:$vj)>; 1784def : Pat<(v4i64 (fp_to_uint v4f32:$vj)), 1785 (VEXT2XV_DU_WU (SUBREG_TO_REG (i64 0), (VFTINTRZ_WU_S v4f32:$vj), 1786 sub_128))>; 1787def : Pat<(v4i32 (fp_to_uint (v4f64 LASX256:$vj))), 1788 (EXTRACT_SUBREG (XVFTINTRZ_W_S (XVFCVT_S_D (XVPERMI_D v4f64:$vj, 238), 1789 v4f64:$vj)), 1790 sub_128)>; 1791 1792// XVPERMI_Q 1793foreach vt = [v32i8, v16i16, v8i32, v4i64, v8f32, v4f64] in 1794def : Pat<(vt (concat_vectors LSX128:$vd, LSX128:$vj)), 1795 (XVPERMI_Q (SUBREG_TO_REG (i64 0), LSX128:$vd, sub_128), 1796 (SUBREG_TO_REG (i64 0), LSX128:$vj, sub_128), 2)>; 1797 1798} // Predicates = [HasExtLASX] 1799 1800/// Intrinsic pattern 1801 1802class deriveLASXIntrinsic<string Inst> { 1803 Intrinsic ret = !cast<Intrinsic>(!tolower("int_loongarch_lasx_"#Inst)); 1804} 1805 1806let Predicates = [HasExtLASX] in { 1807 1808// vty: v32i8/v16i16/v8i32/v4i64 1809// Pat<(Intrinsic vty:$xj, vty:$xk), 1810// (LAInst vty:$xj, vty:$xk)>; 1811foreach Inst = ["XVSADD_B", "XVSADD_BU", "XVSSUB_B", "XVSSUB_BU", 1812 "XVHADDW_H_B", "XVHADDW_HU_BU", "XVHSUBW_H_B", "XVHSUBW_HU_BU", 1813 "XVADDWEV_H_B", "XVADDWOD_H_B", "XVSUBWEV_H_B", "XVSUBWOD_H_B", 1814 "XVADDWEV_H_BU", "XVADDWOD_H_BU", "XVSUBWEV_H_BU", "XVSUBWOD_H_BU", 1815 "XVADDWEV_H_BU_B", "XVADDWOD_H_BU_B", 1816 "XVAVG_B", "XVAVG_BU", "XVAVGR_B", "XVAVGR_BU", 1817 "XVABSD_B", "XVABSD_BU", "XVADDA_B", "XVMUH_B", "XVMUH_BU", 1818 "XVMULWEV_H_B", "XVMULWOD_H_B", "XVMULWEV_H_BU", "XVMULWOD_H_BU", 1819 "XVMULWEV_H_BU_B", "XVMULWOD_H_BU_B", "XVSIGNCOV_B", 1820 "XVANDN_V", "XVORN_V", "XVROTR_B", "XVSRLR_B", "XVSRAR_B", 1821 "XVSEQ_B", "XVSLE_B", "XVSLE_BU", "XVSLT_B", "XVSLT_BU", 1822 "XVPACKEV_B", "XVPACKOD_B", "XVPICKEV_B", "XVPICKOD_B", 1823 "XVILVL_B", "XVILVH_B"] in 1824 def : Pat<(deriveLASXIntrinsic<Inst>.ret 1825 (v32i8 LASX256:$xj), (v32i8 LASX256:$xk)), 1826 (!cast<LAInst>(Inst) LASX256:$xj, LASX256:$xk)>; 1827foreach Inst = ["XVSADD_H", "XVSADD_HU", "XVSSUB_H", "XVSSUB_HU", 1828 "XVHADDW_W_H", "XVHADDW_WU_HU", "XVHSUBW_W_H", "XVHSUBW_WU_HU", 1829 "XVADDWEV_W_H", "XVADDWOD_W_H", "XVSUBWEV_W_H", "XVSUBWOD_W_H", 1830 "XVADDWEV_W_HU", "XVADDWOD_W_HU", "XVSUBWEV_W_HU", "XVSUBWOD_W_HU", 1831 "XVADDWEV_W_HU_H", "XVADDWOD_W_HU_H", 1832 "XVAVG_H", "XVAVG_HU", "XVAVGR_H", "XVAVGR_HU", 1833 "XVABSD_H", "XVABSD_HU", "XVADDA_H", "XVMUH_H", "XVMUH_HU", 1834 "XVMULWEV_W_H", "XVMULWOD_W_H", "XVMULWEV_W_HU", "XVMULWOD_W_HU", 1835 "XVMULWEV_W_HU_H", "XVMULWOD_W_HU_H", "XVSIGNCOV_H", "XVROTR_H", 1836 "XVSRLR_H", "XVSRAR_H", "XVSRLN_B_H", "XVSRAN_B_H", "XVSRLRN_B_H", 1837 "XVSRARN_B_H", "XVSSRLN_B_H", "XVSSRAN_B_H", "XVSSRLN_BU_H", 1838 "XVSSRAN_BU_H", "XVSSRLRN_B_H", "XVSSRARN_B_H", "XVSSRLRN_BU_H", 1839 "XVSSRARN_BU_H", 1840 "XVSEQ_H", "XVSLE_H", "XVSLE_HU", "XVSLT_H", "XVSLT_HU", 1841 "XVPACKEV_H", "XVPACKOD_H", "XVPICKEV_H", "XVPICKOD_H", 1842 "XVILVL_H", "XVILVH_H"] in 1843 def : Pat<(deriveLASXIntrinsic<Inst>.ret 1844 (v16i16 LASX256:$xj), (v16i16 LASX256:$xk)), 1845 (!cast<LAInst>(Inst) LASX256:$xj, LASX256:$xk)>; 1846foreach Inst = ["XVSADD_W", "XVSADD_WU", "XVSSUB_W", "XVSSUB_WU", 1847 "XVHADDW_D_W", "XVHADDW_DU_WU", "XVHSUBW_D_W", "XVHSUBW_DU_WU", 1848 "XVADDWEV_D_W", "XVADDWOD_D_W", "XVSUBWEV_D_W", "XVSUBWOD_D_W", 1849 "XVADDWEV_D_WU", "XVADDWOD_D_WU", "XVSUBWEV_D_WU", "XVSUBWOD_D_WU", 1850 "XVADDWEV_D_WU_W", "XVADDWOD_D_WU_W", 1851 "XVAVG_W", "XVAVG_WU", "XVAVGR_W", "XVAVGR_WU", 1852 "XVABSD_W", "XVABSD_WU", "XVADDA_W", "XVMUH_W", "XVMUH_WU", 1853 "XVMULWEV_D_W", "XVMULWOD_D_W", "XVMULWEV_D_WU", "XVMULWOD_D_WU", 1854 "XVMULWEV_D_WU_W", "XVMULWOD_D_WU_W", "XVSIGNCOV_W", "XVROTR_W", 1855 "XVSRLR_W", "XVSRAR_W", "XVSRLN_H_W", "XVSRAN_H_W", "XVSRLRN_H_W", 1856 "XVSRARN_H_W", "XVSSRLN_H_W", "XVSSRAN_H_W", "XVSSRLN_HU_W", 1857 "XVSSRAN_HU_W", "XVSSRLRN_H_W", "XVSSRARN_H_W", "XVSSRLRN_HU_W", 1858 "XVSSRARN_HU_W", 1859 "XVSEQ_W", "XVSLE_W", "XVSLE_WU", "XVSLT_W", "XVSLT_WU", 1860 "XVPACKEV_W", "XVPACKOD_W", "XVPICKEV_W", "XVPICKOD_W", 1861 "XVILVL_W", "XVILVH_W", "XVPERM_W"] in 1862 def : Pat<(deriveLASXIntrinsic<Inst>.ret 1863 (v8i32 LASX256:$xj), (v8i32 LASX256:$xk)), 1864 (!cast<LAInst>(Inst) LASX256:$xj, LASX256:$xk)>; 1865foreach Inst = ["XVADD_Q", "XVSUB_Q", 1866 "XVSADD_D", "XVSADD_DU", "XVSSUB_D", "XVSSUB_DU", 1867 "XVHADDW_Q_D", "XVHADDW_QU_DU", "XVHSUBW_Q_D", "XVHSUBW_QU_DU", 1868 "XVADDWEV_Q_D", "XVADDWOD_Q_D", "XVSUBWEV_Q_D", "XVSUBWOD_Q_D", 1869 "XVADDWEV_Q_DU", "XVADDWOD_Q_DU", "XVSUBWEV_Q_DU", "XVSUBWOD_Q_DU", 1870 "XVADDWEV_Q_DU_D", "XVADDWOD_Q_DU_D", 1871 "XVAVG_D", "XVAVG_DU", "XVAVGR_D", "XVAVGR_DU", 1872 "XVABSD_D", "XVABSD_DU", "XVADDA_D", "XVMUH_D", "XVMUH_DU", 1873 "XVMULWEV_Q_D", "XVMULWOD_Q_D", "XVMULWEV_Q_DU", "XVMULWOD_Q_DU", 1874 "XVMULWEV_Q_DU_D", "XVMULWOD_Q_DU_D", "XVSIGNCOV_D", "XVROTR_D", 1875 "XVSRLR_D", "XVSRAR_D", "XVSRLN_W_D", "XVSRAN_W_D", "XVSRLRN_W_D", 1876 "XVSRARN_W_D", "XVSSRLN_W_D", "XVSSRAN_W_D", "XVSSRLN_WU_D", 1877 "XVSSRAN_WU_D", "XVSSRLRN_W_D", "XVSSRARN_W_D", "XVSSRLRN_WU_D", 1878 "XVSSRARN_WU_D", "XVFFINT_S_L", 1879 "XVSEQ_D", "XVSLE_D", "XVSLE_DU", "XVSLT_D", "XVSLT_DU", 1880 "XVPACKEV_D", "XVPACKOD_D", "XVPICKEV_D", "XVPICKOD_D", 1881 "XVILVL_D", "XVILVH_D"] in 1882 def : Pat<(deriveLASXIntrinsic<Inst>.ret 1883 (v4i64 LASX256:$xj), (v4i64 LASX256:$xk)), 1884 (!cast<LAInst>(Inst) LASX256:$xj, LASX256:$xk)>; 1885 1886// vty: v32i8/v16i16/v8i32/v4i64 1887// Pat<(Intrinsic vty:$xd, vty:$xj, vty:$xk), 1888// (LAInst vty:$xd, vty:$xj, vty:$xk)>; 1889foreach Inst = ["XVMADDWEV_H_B", "XVMADDWOD_H_B", "XVMADDWEV_H_BU", 1890 "XVMADDWOD_H_BU", "XVMADDWEV_H_BU_B", "XVMADDWOD_H_BU_B"] in 1891 def : Pat<(deriveLASXIntrinsic<Inst>.ret 1892 (v16i16 LASX256:$xd), (v32i8 LASX256:$xj), (v32i8 LASX256:$xk)), 1893 (!cast<LAInst>(Inst) LASX256:$xd, LASX256:$xj, LASX256:$xk)>; 1894foreach Inst = ["XVMADDWEV_W_H", "XVMADDWOD_W_H", "XVMADDWEV_W_HU", 1895 "XVMADDWOD_W_HU", "XVMADDWEV_W_HU_H", "XVMADDWOD_W_HU_H"] in 1896 def : Pat<(deriveLASXIntrinsic<Inst>.ret 1897 (v8i32 LASX256:$xd), (v16i16 LASX256:$xj), (v16i16 LASX256:$xk)), 1898 (!cast<LAInst>(Inst) LASX256:$xd, LASX256:$xj, LASX256:$xk)>; 1899foreach Inst = ["XVMADDWEV_D_W", "XVMADDWOD_D_W", "XVMADDWEV_D_WU", 1900 "XVMADDWOD_D_WU", "XVMADDWEV_D_WU_W", "XVMADDWOD_D_WU_W"] in 1901 def : Pat<(deriveLASXIntrinsic<Inst>.ret 1902 (v4i64 LASX256:$xd), (v8i32 LASX256:$xj), (v8i32 LASX256:$xk)), 1903 (!cast<LAInst>(Inst) LASX256:$xd, LASX256:$xj, LASX256:$xk)>; 1904foreach Inst = ["XVMADDWEV_Q_D", "XVMADDWOD_Q_D", "XVMADDWEV_Q_DU", 1905 "XVMADDWOD_Q_DU", "XVMADDWEV_Q_DU_D", "XVMADDWOD_Q_DU_D"] in 1906 def : Pat<(deriveLASXIntrinsic<Inst>.ret 1907 (v4i64 LASX256:$xd), (v4i64 LASX256:$xj), (v4i64 LASX256:$xk)), 1908 (!cast<LAInst>(Inst) LASX256:$xd, LASX256:$xj, LASX256:$xk)>; 1909 1910// vty: v32i8/v16i16/v8i32/v4i64 1911// Pat<(Intrinsic vty:$xj), 1912// (LAInst vty:$xj)>; 1913foreach Inst = ["XVEXTH_H_B", "XVEXTH_HU_BU", 1914 "XVMSKLTZ_B", "XVMSKGEZ_B", "XVMSKNZ_B", 1915 "XVCLO_B", "VEXT2XV_H_B", "VEXT2XV_HU_BU", 1916 "VEXT2XV_W_B", "VEXT2XV_WU_BU", "VEXT2XV_D_B", 1917 "VEXT2XV_DU_BU", "XVREPLVE0_B", "XVREPLVE0_Q"] in 1918 def : Pat<(deriveLASXIntrinsic<Inst>.ret (v32i8 LASX256:$xj)), 1919 (!cast<LAInst>(Inst) LASX256:$xj)>; 1920foreach Inst = ["XVEXTH_W_H", "XVEXTH_WU_HU", "XVMSKLTZ_H", 1921 "XVCLO_H", "XVFCVTL_S_H", "XVFCVTH_S_H", 1922 "VEXT2XV_W_H", "VEXT2XV_WU_HU", "VEXT2XV_D_H", 1923 "VEXT2XV_DU_HU", "XVREPLVE0_H"] in 1924 def : Pat<(deriveLASXIntrinsic<Inst>.ret (v16i16 LASX256:$xj)), 1925 (!cast<LAInst>(Inst) LASX256:$xj)>; 1926foreach Inst = ["XVEXTH_D_W", "XVEXTH_DU_WU", "XVMSKLTZ_W", 1927 "XVCLO_W", "XVFFINT_S_W", "XVFFINT_S_WU", 1928 "XVFFINTL_D_W", "XVFFINTH_D_W", 1929 "VEXT2XV_D_W", "VEXT2XV_DU_WU", "XVREPLVE0_W"] in 1930 def : Pat<(deriveLASXIntrinsic<Inst>.ret (v8i32 LASX256:$xj)), 1931 (!cast<LAInst>(Inst) LASX256:$xj)>; 1932foreach Inst = ["XVEXTH_Q_D", "XVEXTH_QU_DU", "XVMSKLTZ_D", 1933 "XVEXTL_Q_D", "XVEXTL_QU_DU", 1934 "XVCLO_D", "XVFFINT_D_L", "XVFFINT_D_LU", 1935 "XVREPLVE0_D"] in 1936 def : Pat<(deriveLASXIntrinsic<Inst>.ret (v4i64 LASX256:$xj)), 1937 (!cast<LAInst>(Inst) LASX256:$xj)>; 1938 1939// Pat<(Intrinsic timm:$imm) 1940// (LAInst timm:$imm)>; 1941def : Pat<(int_loongarch_lasx_xvldi timm:$imm), 1942 (XVLDI (to_valid_timm timm:$imm))>; 1943foreach Inst = ["XVREPLI_B", "XVREPLI_H", "XVREPLI_W", "XVREPLI_D"] in 1944 def : Pat<(deriveLASXIntrinsic<Inst>.ret timm:$imm), 1945 (!cast<LAInst>("Pseudo"#Inst) (to_valid_timm timm:$imm))>; 1946 1947// vty: v32i8/v16i16/v8i32/v4i64 1948// Pat<(Intrinsic vty:$xj, timm:$imm) 1949// (LAInst vty:$xj, timm:$imm)>; 1950foreach Inst = ["XVSAT_B", "XVSAT_BU", "XVNORI_B", "XVROTRI_B", "XVSLLWIL_H_B", 1951 "XVSLLWIL_HU_BU", "XVSRLRI_B", "XVSRARI_B", 1952 "XVSEQI_B", "XVSLEI_B", "XVSLEI_BU", "XVSLTI_B", "XVSLTI_BU", 1953 "XVREPL128VEI_B", "XVBSLL_V", "XVBSRL_V", "XVSHUF4I_B"] in 1954 def : Pat<(deriveLASXIntrinsic<Inst>.ret (v32i8 LASX256:$xj), timm:$imm), 1955 (!cast<LAInst>(Inst) LASX256:$xj, (to_valid_timm timm:$imm))>; 1956foreach Inst = ["XVSAT_H", "XVSAT_HU", "XVROTRI_H", "XVSLLWIL_W_H", 1957 "XVSLLWIL_WU_HU", "XVSRLRI_H", "XVSRARI_H", 1958 "XVSEQI_H", "XVSLEI_H", "XVSLEI_HU", "XVSLTI_H", "XVSLTI_HU", 1959 "XVREPL128VEI_H", "XVSHUF4I_H"] in 1960 def : Pat<(deriveLASXIntrinsic<Inst>.ret (v16i16 LASX256:$xj), timm:$imm), 1961 (!cast<LAInst>(Inst) LASX256:$xj, (to_valid_timm timm:$imm))>; 1962foreach Inst = ["XVSAT_W", "XVSAT_WU", "XVROTRI_W", "XVSLLWIL_D_W", 1963 "XVSLLWIL_DU_WU", "XVSRLRI_W", "XVSRARI_W", 1964 "XVSEQI_W", "XVSLEI_W", "XVSLEI_WU", "XVSLTI_W", "XVSLTI_WU", 1965 "XVREPL128VEI_W", "XVSHUF4I_W", "XVPICKVE_W"] in 1966 def : Pat<(deriveLASXIntrinsic<Inst>.ret (v8i32 LASX256:$xj), timm:$imm), 1967 (!cast<LAInst>(Inst) LASX256:$xj, (to_valid_timm timm:$imm))>; 1968foreach Inst = ["XVSAT_D", "XVSAT_DU", "XVROTRI_D", "XVSRLRI_D", "XVSRARI_D", 1969 "XVSEQI_D", "XVSLEI_D", "XVSLEI_DU", "XVSLTI_D", "XVSLTI_DU", 1970 "XVPICKVE2GR_D", "XVPICKVE2GR_DU", 1971 "XVREPL128VEI_D", "XVPERMI_D", "XVPICKVE_D"] in 1972 def : Pat<(deriveLASXIntrinsic<Inst>.ret (v4i64 LASX256:$xj), timm:$imm), 1973 (!cast<LAInst>(Inst) LASX256:$xj, (to_valid_timm timm:$imm))>; 1974 1975// vty: v32i8/v16i16/v8i32/v4i64 1976// Pat<(Intrinsic vty:$xd, vty:$xj, timm:$imm) 1977// (LAInst vty:$xd, vty:$xj, timm:$imm)>; 1978foreach Inst = ["XVSRLNI_B_H", "XVSRANI_B_H", "XVSRLRNI_B_H", "XVSRARNI_B_H", 1979 "XVSSRLNI_B_H", "XVSSRANI_B_H", "XVSSRLNI_BU_H", "XVSSRANI_BU_H", 1980 "XVSSRLRNI_B_H", "XVSSRARNI_B_H", "XVSSRLRNI_BU_H", "XVSSRARNI_BU_H", 1981 "XVFRSTPI_B", "XVBITSELI_B", "XVEXTRINS_B", "XVPERMI_Q"] in 1982 def : Pat<(deriveLASXIntrinsic<Inst>.ret 1983 (v32i8 LASX256:$xd), (v32i8 LASX256:$xj), timm:$imm), 1984 (!cast<LAInst>(Inst) LASX256:$xd, LASX256:$xj, 1985 (to_valid_timm timm:$imm))>; 1986foreach Inst = ["XVSRLNI_H_W", "XVSRANI_H_W", "XVSRLRNI_H_W", "XVSRARNI_H_W", 1987 "XVSSRLNI_H_W", "XVSSRANI_H_W", "XVSSRLNI_HU_W", "XVSSRANI_HU_W", 1988 "XVSSRLRNI_H_W", "XVSSRARNI_H_W", "XVSSRLRNI_HU_W", "XVSSRARNI_HU_W", 1989 "XVFRSTPI_H", "XVEXTRINS_H"] in 1990 def : Pat<(deriveLASXIntrinsic<Inst>.ret 1991 (v16i16 LASX256:$xd), (v16i16 LASX256:$xj), timm:$imm), 1992 (!cast<LAInst>(Inst) LASX256:$xd, LASX256:$xj, 1993 (to_valid_timm timm:$imm))>; 1994foreach Inst = ["XVSRLNI_W_D", "XVSRANI_W_D", "XVSRLRNI_W_D", "XVSRARNI_W_D", 1995 "XVSSRLNI_W_D", "XVSSRANI_W_D", "XVSSRLNI_WU_D", "XVSSRANI_WU_D", 1996 "XVSSRLRNI_W_D", "XVSSRARNI_W_D", "XVSSRLRNI_WU_D", "XVSSRARNI_WU_D", 1997 "XVPERMI_W", "XVEXTRINS_W", "XVINSVE0_W"] in 1998 def : Pat<(deriveLASXIntrinsic<Inst>.ret 1999 (v8i32 LASX256:$xd), (v8i32 LASX256:$xj), timm:$imm), 2000 (!cast<LAInst>(Inst) LASX256:$xd, LASX256:$xj, 2001 (to_valid_timm timm:$imm))>; 2002foreach Inst = ["XVSRLNI_D_Q", "XVSRANI_D_Q", "XVSRLRNI_D_Q", "XVSRARNI_D_Q", 2003 "XVSSRLNI_D_Q", "XVSSRANI_D_Q", "XVSSRLNI_DU_Q", "XVSSRANI_DU_Q", 2004 "XVSSRLRNI_D_Q", "XVSSRARNI_D_Q", "XVSSRLRNI_DU_Q", "XVSSRARNI_DU_Q", 2005 "XVSHUF4I_D", "XVEXTRINS_D", "XVINSVE0_D"] in 2006 def : Pat<(deriveLASXIntrinsic<Inst>.ret 2007 (v4i64 LASX256:$xd), (v4i64 LASX256:$xj), timm:$imm), 2008 (!cast<LAInst>(Inst) LASX256:$xd, LASX256:$xj, 2009 (to_valid_timm timm:$imm))>; 2010 2011// vty: v32i8/v16i16/v8i32/v4i64 2012// Pat<(Intrinsic vty:$xd, vty:$xj, vty:$xk), 2013// (LAInst vty:$xd, vty:$xj, vty:$xk)>; 2014foreach Inst = ["XVFRSTP_B", "XVBITSEL_V", "XVSHUF_B"] in 2015 def : Pat<(deriveLASXIntrinsic<Inst>.ret 2016 (v32i8 LASX256:$xd), (v32i8 LASX256:$xj), (v32i8 LASX256:$xk)), 2017 (!cast<LAInst>(Inst) LASX256:$xd, LASX256:$xj, LASX256:$xk)>; 2018foreach Inst = ["XVFRSTP_H", "XVSHUF_H"] in 2019 def : Pat<(deriveLASXIntrinsic<Inst>.ret 2020 (v16i16 LASX256:$xd), (v16i16 LASX256:$xj), (v16i16 LASX256:$xk)), 2021 (!cast<LAInst>(Inst) LASX256:$xd, LASX256:$xj, LASX256:$xk)>; 2022def : Pat<(int_loongarch_lasx_xvshuf_w (v8i32 LASX256:$xd), (v8i32 LASX256:$xj), 2023 (v8i32 LASX256:$xk)), 2024 (XVSHUF_W LASX256:$xd, LASX256:$xj, LASX256:$xk)>; 2025def : Pat<(int_loongarch_lasx_xvshuf_d (v4i64 LASX256:$xd), (v4i64 LASX256:$xj), 2026 (v4i64 LASX256:$xk)), 2027 (XVSHUF_D LASX256:$xd, LASX256:$xj, LASX256:$xk)>; 2028 2029// vty: v8f32/v4f64 2030// Pat<(Intrinsic vty:$xj, vty:$xk, vty:$xa), 2031// (LAInst vty:$xj, vty:$xk, vty:$xa)>; 2032foreach Inst = ["XVFMSUB_S", "XVFNMADD_S", "XVFNMSUB_S"] in 2033 def : Pat<(deriveLASXIntrinsic<Inst>.ret 2034 (v8f32 LASX256:$xj), (v8f32 LASX256:$xk), (v8f32 LASX256:$xa)), 2035 (!cast<LAInst>(Inst) LASX256:$xj, LASX256:$xk, LASX256:$xa)>; 2036foreach Inst = ["XVFMSUB_D", "XVFNMADD_D", "XVFNMSUB_D"] in 2037 def : Pat<(deriveLASXIntrinsic<Inst>.ret 2038 (v4f64 LASX256:$xj), (v4f64 LASX256:$xk), (v4f64 LASX256:$xa)), 2039 (!cast<LAInst>(Inst) LASX256:$xj, LASX256:$xk, LASX256:$xa)>; 2040 2041// vty: v8f32/v4f64 2042// Pat<(Intrinsic vty:$xj, vty:$xk), 2043// (LAInst vty:$xj, vty:$xk)>; 2044foreach Inst = ["XVFMAX_S", "XVFMIN_S", "XVFMAXA_S", "XVFMINA_S", "XVFCVT_H_S", 2045 "XVFCMP_CAF_S", "XVFCMP_CUN_S", "XVFCMP_CEQ_S", "XVFCMP_CUEQ_S", 2046 "XVFCMP_CLT_S", "XVFCMP_CULT_S", "XVFCMP_CLE_S", "XVFCMP_CULE_S", 2047 "XVFCMP_CNE_S", "XVFCMP_COR_S", "XVFCMP_CUNE_S", 2048 "XVFCMP_SAF_S", "XVFCMP_SUN_S", "XVFCMP_SEQ_S", "XVFCMP_SUEQ_S", 2049 "XVFCMP_SLT_S", "XVFCMP_SULT_S", "XVFCMP_SLE_S", "XVFCMP_SULE_S", 2050 "XVFCMP_SNE_S", "XVFCMP_SOR_S", "XVFCMP_SUNE_S"] in 2051 def : Pat<(deriveLASXIntrinsic<Inst>.ret 2052 (v8f32 LASX256:$xj), (v8f32 LASX256:$xk)), 2053 (!cast<LAInst>(Inst) LASX256:$xj, LASX256:$xk)>; 2054foreach Inst = ["XVFMAX_D", "XVFMIN_D", "XVFMAXA_D", "XVFMINA_D", "XVFCVT_S_D", 2055 "XVFTINTRNE_W_D", "XVFTINTRZ_W_D", "XVFTINTRP_W_D", "XVFTINTRM_W_D", 2056 "XVFTINT_W_D", 2057 "XVFCMP_CAF_D", "XVFCMP_CUN_D", "XVFCMP_CEQ_D", "XVFCMP_CUEQ_D", 2058 "XVFCMP_CLT_D", "XVFCMP_CULT_D", "XVFCMP_CLE_D", "XVFCMP_CULE_D", 2059 "XVFCMP_CNE_D", "XVFCMP_COR_D", "XVFCMP_CUNE_D", 2060 "XVFCMP_SAF_D", "XVFCMP_SUN_D", "XVFCMP_SEQ_D", "XVFCMP_SUEQ_D", 2061 "XVFCMP_SLT_D", "XVFCMP_SULT_D", "XVFCMP_SLE_D", "XVFCMP_SULE_D", 2062 "XVFCMP_SNE_D", "XVFCMP_SOR_D", "XVFCMP_SUNE_D"] in 2063 def : Pat<(deriveLASXIntrinsic<Inst>.ret 2064 (v4f64 LASX256:$xj), (v4f64 LASX256:$xk)), 2065 (!cast<LAInst>(Inst) LASX256:$xj, LASX256:$xk)>; 2066 2067// vty: v8f32/v4f64 2068// Pat<(Intrinsic vty:$xj), 2069// (LAInst vty:$xj)>; 2070foreach Inst = ["XVFLOGB_S", "XVFCLASS_S", "XVFSQRT_S", "XVFRECIP_S", "XVFRSQRT_S", 2071 "XVFRINT_S", "XVFCVTL_D_S", "XVFCVTH_D_S", 2072 "XVFRINTRNE_S", "XVFRINTRZ_S", "XVFRINTRP_S", "XVFRINTRM_S", 2073 "XVFTINTRNE_W_S", "XVFTINTRZ_W_S", "XVFTINTRP_W_S", "XVFTINTRM_W_S", 2074 "XVFTINT_W_S", "XVFTINTRZ_WU_S", "XVFTINT_WU_S", 2075 "XVFTINTRNEL_L_S", "XVFTINTRNEH_L_S", "XVFTINTRZL_L_S", 2076 "XVFTINTRZH_L_S", "XVFTINTRPL_L_S", "XVFTINTRPH_L_S", 2077 "XVFTINTRML_L_S", "XVFTINTRMH_L_S", "XVFTINTL_L_S", 2078 "XVFTINTH_L_S"] in 2079 def : Pat<(deriveLASXIntrinsic<Inst>.ret (v8f32 LASX256:$xj)), 2080 (!cast<LAInst>(Inst) LASX256:$xj)>; 2081foreach Inst = ["XVFLOGB_D", "XVFCLASS_D", "XVFSQRT_D", "XVFRECIP_D", "XVFRSQRT_D", 2082 "XVFRINT_D", 2083 "XVFRINTRNE_D", "XVFRINTRZ_D", "XVFRINTRP_D", "XVFRINTRM_D", 2084 "XVFTINTRNE_L_D", "XVFTINTRZ_L_D", "XVFTINTRP_L_D", "XVFTINTRM_L_D", 2085 "XVFTINT_L_D", "XVFTINTRZ_LU_D", "XVFTINT_LU_D"] in 2086 def : Pat<(deriveLASXIntrinsic<Inst>.ret (v4f64 LASX256:$xj)), 2087 (!cast<LAInst>(Inst) LASX256:$xj)>; 2088 2089// 256-Bit vector FP approximate reciprocal operation 2090let Predicates = [HasFrecipe] in { 2091foreach Inst = ["XVFRECIPE_S", "XVFRSQRTE_S"] in 2092 def : Pat<(deriveLASXIntrinsic<Inst>.ret (v8f32 LASX256:$xj)), 2093 (!cast<LAInst>(Inst) LASX256:$xj)>; 2094foreach Inst = ["XVFRECIPE_D", "XVFRSQRTE_D"] in 2095 def : Pat<(deriveLASXIntrinsic<Inst>.ret (v4f64 LASX256:$xj)), 2096 (!cast<LAInst>(Inst) LASX256:$xj)>; 2097} 2098 2099def : Pat<(int_loongarch_lasx_xvpickve_w_f v8f32:$xj, timm:$imm), 2100 (XVPICKVE_W v8f32:$xj, (to_valid_timm timm:$imm))>; 2101def : Pat<(int_loongarch_lasx_xvpickve_d_f v4f64:$xj, timm:$imm), 2102 (XVPICKVE_D v4f64:$xj, (to_valid_timm timm:$imm))>; 2103 2104// load 2105def : Pat<(int_loongarch_lasx_xvld GPR:$rj, timm:$imm), 2106 (XVLD GPR:$rj, (to_valid_timm timm:$imm))>; 2107def : Pat<(int_loongarch_lasx_xvldx GPR:$rj, GPR:$rk), 2108 (XVLDX GPR:$rj, GPR:$rk)>; 2109 2110def : Pat<(int_loongarch_lasx_xvldrepl_b GPR:$rj, timm:$imm), 2111 (XVLDREPL_B GPR:$rj, (to_valid_timm timm:$imm))>; 2112def : Pat<(int_loongarch_lasx_xvldrepl_h GPR:$rj, timm:$imm), 2113 (XVLDREPL_H GPR:$rj, (to_valid_timm timm:$imm))>; 2114def : Pat<(int_loongarch_lasx_xvldrepl_w GPR:$rj, timm:$imm), 2115 (XVLDREPL_W GPR:$rj, (to_valid_timm timm:$imm))>; 2116def : Pat<(int_loongarch_lasx_xvldrepl_d GPR:$rj, timm:$imm), 2117 (XVLDREPL_D GPR:$rj, (to_valid_timm timm:$imm))>; 2118 2119// store 2120def : Pat<(int_loongarch_lasx_xvst LASX256:$xd, GPR:$rj, timm:$imm), 2121 (XVST LASX256:$xd, GPR:$rj, (to_valid_timm timm:$imm))>; 2122def : Pat<(int_loongarch_lasx_xvstx LASX256:$xd, GPR:$rj, GPR:$rk), 2123 (XVSTX LASX256:$xd, GPR:$rj, GPR:$rk)>; 2124 2125def : Pat<(int_loongarch_lasx_xvstelm_b v32i8:$xd, GPR:$rj, timm:$imm, timm:$idx), 2126 (XVSTELM_B v32i8:$xd, GPR:$rj, (to_valid_timm timm:$imm), 2127 (to_valid_timm timm:$idx))>; 2128def : Pat<(int_loongarch_lasx_xvstelm_h v16i16:$xd, GPR:$rj, timm:$imm, timm:$idx), 2129 (XVSTELM_H v16i16:$xd, GPR:$rj, (to_valid_timm timm:$imm), 2130 (to_valid_timm timm:$idx))>; 2131def : Pat<(int_loongarch_lasx_xvstelm_w v8i32:$xd, GPR:$rj, timm:$imm, timm:$idx), 2132 (XVSTELM_W v8i32:$xd, GPR:$rj, (to_valid_timm timm:$imm), 2133 (to_valid_timm timm:$idx))>; 2134def : Pat<(int_loongarch_lasx_xvstelm_d v4i64:$xd, GPR:$rj, timm:$imm, timm:$idx), 2135 (XVSTELM_D v4i64:$xd, GPR:$rj, (to_valid_timm timm:$imm), 2136 (to_valid_timm timm:$idx))>; 2137 2138} // Predicates = [HasExtLASX] 2139