xref: /freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/LoongArchISelDAGToDAG.h (revision b64c5a0ace59af62eff52bfe110a521dc73c937b)
1 //=- LoongArchISelDAGToDAG.h - A dag to dag inst selector for LoongArch ---===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file defines an instruction selector for the LoongArch target.
10 //
11 //===----------------------------------------------------------------------===//
12 
13 #ifndef LLVM_LIB_TARGET_LOONGARCH_LOONGARCHISELDAGTODAG_H
14 #define LLVM_LIB_TARGET_LOONGARCH_LOONGARCHISELDAGTODAG_H
15 
16 #include "LoongArch.h"
17 #include "LoongArchTargetMachine.h"
18 #include "llvm/CodeGen/SelectionDAGISel.h"
19 
20 // LoongArch-specific code to select LoongArch machine instructions for
21 // SelectionDAG operations.
22 namespace llvm {
23 class LoongArchDAGToDAGISel : public SelectionDAGISel {
24   const LoongArchSubtarget *Subtarget = nullptr;
25 
26 public:
27   LoongArchDAGToDAGISel() = delete;
28 
29   explicit LoongArchDAGToDAGISel(LoongArchTargetMachine &TM)
30       : SelectionDAGISel(TM) {}
31 
32   bool runOnMachineFunction(MachineFunction &MF) override {
33     Subtarget = &MF.getSubtarget<LoongArchSubtarget>();
34     return SelectionDAGISel::runOnMachineFunction(MF);
35   }
36 
37   void Select(SDNode *Node) override;
38 
39   bool SelectInlineAsmMemoryOperand(const SDValue &Op,
40                                     InlineAsm::ConstraintCode ConstraintID,
41                                     std::vector<SDValue> &OutOps) override;
42 
43   bool SelectBaseAddr(SDValue Addr, SDValue &Base);
44   bool SelectAddrConstant(SDValue Addr, SDValue &Base, SDValue &Offset);
45   bool selectNonFIBaseAddr(SDValue Addr, SDValue &Base);
46 
47   bool selectShiftMask(SDValue N, unsigned ShiftWidth, SDValue &ShAmt);
48   bool selectShiftMaskGRLen(SDValue N, SDValue &ShAmt) {
49     return selectShiftMask(N, Subtarget->getGRLen(), ShAmt);
50   }
51   bool selectShiftMask32(SDValue N, SDValue &ShAmt) {
52     return selectShiftMask(N, 32, ShAmt);
53   }
54 
55   bool selectSExti32(SDValue N, SDValue &Val);
56   bool selectZExti32(SDValue N, SDValue &Val);
57 
58   bool selectVSplat(SDNode *N, APInt &Imm, unsigned MinSizeInBits) const;
59 
60   template <unsigned ImmSize, bool IsSigned = false>
61   bool selectVSplatImm(SDValue N, SDValue &SplatVal);
62 
63   bool selectVSplatUimmInvPow2(SDValue N, SDValue &SplatImm) const;
64   bool selectVSplatUimmPow2(SDValue N, SDValue &SplatImm) const;
65 
66 // Include the pieces autogenerated from the target description.
67 #include "LoongArchGenDAGISel.inc"
68 };
69 
70 class LoongArchDAGToDAGISelLegacy : public SelectionDAGISelLegacy {
71 public:
72   static char ID;
73   explicit LoongArchDAGToDAGISelLegacy(LoongArchTargetMachine &TM);
74 };
75 
76 } // end namespace llvm
77 
78 #endif // LLVM_LIB_TARGET_LOONGARCH_LOONGARCHISELDAGTODAG_H
79