1 //=== LoongArchDeadRegisterDefinitions.cpp - Replace dead defs w/ zero reg ===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===---------------------------------------------------------------------===// 8 // 9 // This pass rewrites Rd to r0 for instrs whose return values are unused. 10 // 11 //===---------------------------------------------------------------------===// 12 13 #include "LoongArch.h" 14 #include "LoongArchInstrInfo.h" 15 #include "LoongArchSubtarget.h" 16 #include "llvm/ADT/Statistic.h" 17 #include "llvm/CodeGen/LiveDebugVariables.h" 18 #include "llvm/CodeGen/LiveIntervals.h" 19 #include "llvm/CodeGen/LiveStacks.h" 20 #include "llvm/CodeGen/MachineFunctionPass.h" 21 #include "llvm/CodeGen/MachineRegisterInfo.h" 22 23 using namespace llvm; 24 #define DEBUG_TYPE "loongarch-dead-defs" 25 #define LoongArch_DEAD_REG_DEF_NAME "LoongArch Dead register definitions" 26 27 STATISTIC(NumDeadDefsReplaced, "Number of dead definitions replaced"); 28 29 namespace { 30 class LoongArchDeadRegisterDefinitions : public MachineFunctionPass { 31 public: 32 static char ID; 33 34 LoongArchDeadRegisterDefinitions() : MachineFunctionPass(ID) {} 35 bool runOnMachineFunction(MachineFunction &MF) override; 36 void getAnalysisUsage(AnalysisUsage &AU) const override { 37 AU.setPreservesCFG(); 38 AU.addRequired<LiveIntervalsWrapperPass>(); 39 AU.addPreserved<LiveIntervalsWrapperPass>(); 40 AU.addRequired<LiveIntervalsWrapperPass>(); 41 AU.addPreserved<SlotIndexesWrapperPass>(); 42 AU.addPreserved<LiveDebugVariables>(); 43 AU.addPreserved<LiveStacks>(); 44 MachineFunctionPass::getAnalysisUsage(AU); 45 } 46 47 StringRef getPassName() const override { return LoongArch_DEAD_REG_DEF_NAME; } 48 }; 49 } // end anonymous namespace 50 51 char LoongArchDeadRegisterDefinitions::ID = 0; 52 INITIALIZE_PASS(LoongArchDeadRegisterDefinitions, DEBUG_TYPE, 53 LoongArch_DEAD_REG_DEF_NAME, false, false) 54 55 FunctionPass *llvm::createLoongArchDeadRegisterDefinitionsPass() { 56 return new LoongArchDeadRegisterDefinitions(); 57 } 58 59 bool LoongArchDeadRegisterDefinitions::runOnMachineFunction( 60 MachineFunction &MF) { 61 if (skipFunction(MF.getFunction())) 62 return false; 63 64 const TargetInstrInfo *TII = MF.getSubtarget().getInstrInfo(); 65 const TargetRegisterInfo *TRI = MF.getSubtarget().getRegisterInfo(); 66 LiveIntervals &LIS = getAnalysis<LiveIntervalsWrapperPass>().getLIS(); 67 LLVM_DEBUG(dbgs() << "***** LoongArchDeadRegisterDefinitions *****\n"); 68 69 bool MadeChange = false; 70 for (MachineBasicBlock &MBB : MF) { 71 for (MachineInstr &MI : MBB) { 72 // We only handle non-computational instructions. 73 const MCInstrDesc &Desc = MI.getDesc(); 74 if (!Desc.mayLoad() && !Desc.mayStore() && 75 !Desc.hasUnmodeledSideEffects()) 76 continue; 77 for (int I = 0, E = Desc.getNumDefs(); I != E; ++I) { 78 MachineOperand &MO = MI.getOperand(I); 79 if (!MO.isReg() || !MO.isDef() || MO.isEarlyClobber()) 80 continue; 81 // Be careful not to change the register if it's a tied operand. 82 if (MI.isRegTiedToUseOperand(I)) { 83 LLVM_DEBUG(dbgs() << " Ignoring, def is tied operand.\n"); 84 continue; 85 } 86 Register Reg = MO.getReg(); 87 if (!Reg.isVirtual() || !MO.isDead()) 88 continue; 89 LLVM_DEBUG(dbgs() << " Dead def operand #" << I << " in:\n "; 90 MI.print(dbgs())); 91 const TargetRegisterClass *RC = TII->getRegClass(Desc, I, TRI, MF); 92 if (!(RC && RC->contains(LoongArch::R0))) { 93 LLVM_DEBUG(dbgs() << " Ignoring, register is not a GPR.\n"); 94 continue; 95 } 96 assert(LIS.hasInterval(Reg)); 97 LIS.removeInterval(Reg); 98 MO.setReg(LoongArch::R0); 99 LLVM_DEBUG(dbgs() << " Replacing with zero register. New:\n "; 100 MI.print(dbgs())); 101 ++NumDeadDefsReplaced; 102 MadeChange = true; 103 } 104 } 105 } 106 107 return MadeChange; 108 } 109