1*0b57cec5SDimitry Andric//===- Lanai.td - Describe the Lanai Target Machine --------*- tablegen -*-===// 2*0b57cec5SDimitry Andric// 3*0b57cec5SDimitry Andric// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4*0b57cec5SDimitry Andric// See https://llvm.org/LICENSE.txt for license information. 5*0b57cec5SDimitry Andric// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6*0b57cec5SDimitry Andric// 7*0b57cec5SDimitry Andric//===----------------------------------------------------------------------===// 8*0b57cec5SDimitry Andric 9*0b57cec5SDimitry Andric//===----------------------------------------------------------------------===// 10*0b57cec5SDimitry Andric// Target-independent interfaces which we are implementing 11*0b57cec5SDimitry Andric//===----------------------------------------------------------------------===// 12*0b57cec5SDimitry Andric 13*0b57cec5SDimitry Andricinclude "llvm/Target/Target.td" 14*0b57cec5SDimitry Andric 15*0b57cec5SDimitry Andric//===----------------------------------------------------------------------===// 16*0b57cec5SDimitry Andric// Register File, Calling Conv, Instruction Descriptions 17*0b57cec5SDimitry Andric//===----------------------------------------------------------------------===// 18*0b57cec5SDimitry Andric 19*0b57cec5SDimitry Andricinclude "LanaiSchedule.td" 20*0b57cec5SDimitry Andricinclude "LanaiRegisterInfo.td" 21*0b57cec5SDimitry Andricinclude "LanaiCallingConv.td" 22*0b57cec5SDimitry Andricinclude "LanaiInstrInfo.td" 23*0b57cec5SDimitry Andric 24*0b57cec5SDimitry Andricdef LanaiInstrInfo : InstrInfo; 25*0b57cec5SDimitry Andric 26*0b57cec5SDimitry Andric//===----------------------------------------------------------------------===// 27*0b57cec5SDimitry Andric// Lanai processors supported. 28*0b57cec5SDimitry Andric//===----------------------------------------------------------------------===// 29*0b57cec5SDimitry Andric 30*0b57cec5SDimitry Andricdef : ProcessorModel<"generic", LanaiSchedModel, []>; 31*0b57cec5SDimitry Andricdef : ProcessorModel<"v11", LanaiSchedModel, []>; 32*0b57cec5SDimitry Andric 33*0b57cec5SDimitry Andricdef LanaiInstPrinter : AsmWriter { 34*0b57cec5SDimitry Andric string AsmWriterClassName = "InstPrinter"; 35*0b57cec5SDimitry Andric bit isMCAsmWriter = 1; 36*0b57cec5SDimitry Andric} 37*0b57cec5SDimitry Andric 38*0b57cec5SDimitry Andric//===----------------------------------------------------------------------===// 39*0b57cec5SDimitry Andric// Declare the target which we are implementing 40*0b57cec5SDimitry Andric//===----------------------------------------------------------------------===// 41*0b57cec5SDimitry Andric 42*0b57cec5SDimitry Andricdef Lanai : Target { 43*0b57cec5SDimitry Andric // Pull in Instruction Info: 44*0b57cec5SDimitry Andric let InstructionSet = LanaiInstrInfo; 45*0b57cec5SDimitry Andric let AssemblyWriters = [LanaiInstPrinter]; 46*0b57cec5SDimitry Andric} 47