1 //===- HexagonMCCodeEmitter.h - Hexagon Target Descriptions -----*- C++ -*-===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 /// 9 /// \file 10 /// Definition for classes that emit Hexagon machine code from MCInsts 11 /// 12 //===----------------------------------------------------------------------===// 13 14 #ifndef LLVM_LIB_TARGET_HEXAGON_MCTARGETDESC_HEXAGONMCCODEEMITTER_H 15 #define LLVM_LIB_TARGET_HEXAGON_MCTARGETDESC_HEXAGONMCCODEEMITTER_H 16 17 #include "MCTargetDesc/HexagonFixupKinds.h" 18 #include "llvm/MC/MCCodeEmitter.h" 19 #include "llvm/MC/MCExpr.h" 20 #include "llvm/MC/SubtargetFeature.h" 21 #include <cstddef> 22 #include <cstdint> 23 #include <memory> 24 25 namespace llvm { 26 27 class MCContext; 28 class MCInst; 29 class MCInstrInfo; 30 class MCOperand; 31 class MCSubtargetInfo; 32 class raw_ostream; 33 34 class HexagonMCCodeEmitter : public MCCodeEmitter { 35 MCContext &MCT; 36 MCInstrInfo const &MCII; 37 38 // A mutable state of the emitter when encoding bundles and duplexes. 39 struct EmitterState { 40 unsigned Addend = 0; 41 bool Extended = false; 42 bool SubInst1 = false; 43 const MCInst *Bundle = nullptr; 44 size_t Index = 0; 45 }; 46 mutable EmitterState State; 47 48 public: 49 HexagonMCCodeEmitter(MCInstrInfo const &MII, MCContext &MCT) 50 : MCT(MCT), MCII(MII) {} 51 52 void encodeInstruction(MCInst const &MI, raw_ostream &OS, 53 SmallVectorImpl<MCFixup> &Fixups, 54 MCSubtargetInfo const &STI) const override; 55 56 void EncodeSingleInstruction(const MCInst &MI, raw_ostream &OS, 57 SmallVectorImpl<MCFixup> &Fixups, 58 const MCSubtargetInfo &STI, 59 uint32_t Parse) const; 60 61 // TableGen'erated function for getting the 62 // binary encoding for an instruction. 63 uint64_t getBinaryCodeForInstr(MCInst const &MI, 64 SmallVectorImpl<MCFixup> &Fixups, 65 MCSubtargetInfo const &STI) const; 66 67 /// Return binary encoding of operand. 68 unsigned getMachineOpValue(MCInst const &MI, MCOperand const &MO, 69 SmallVectorImpl<MCFixup> &Fixups, 70 MCSubtargetInfo const &STI) const; 71 72 private: 73 // helper routine for getMachineOpValue() 74 unsigned getExprOpValue(const MCInst &MI, const MCOperand &MO, 75 const MCExpr *ME, SmallVectorImpl<MCFixup> &Fixups, 76 const MCSubtargetInfo &STI) const; 77 78 Hexagon::Fixups getFixupNoBits(MCInstrInfo const &MCII, const MCInst &MI, 79 const MCOperand &MO, 80 const MCSymbolRefExpr::VariantKind Kind) const; 81 82 // Return parse bits for instruction `MCI' inside bundle `MCB' 83 uint32_t parseBits(size_t Last, MCInst const &MCB, MCInst const &MCI) const; 84 85 FeatureBitset computeAvailableFeatures(const FeatureBitset &FB) const; 86 void 87 verifyInstructionPredicates(const MCInst &MI, 88 const FeatureBitset &AvailableFeatures) const; 89 }; 90 91 } // end namespace llvm 92 93 #endif // LLVM_LIB_TARGET_HEXAGON_MCTARGETDESC_HEXAGONMCCODEEMITTER_H 94