xref: /freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCChecker.h (revision 59c8e88e72633afbc47a4ace0d2170d00d51f7dc)
1 //===- HexagonMCChecker.h - Instruction bundle checking ---------*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This implements the checking of insns inside a bundle according to the
10 // packet constraint rules of the Hexagon ISA.
11 //
12 //===----------------------------------------------------------------------===//
13 
14 #ifndef LLVM_LIB_TARGET_HEXAGON_MCTARGETDESC_HEXAGONMCCHECKER_H
15 #define LLVM_LIB_TARGET_HEXAGON_MCTARGETDESC_HEXAGONMCCHECKER_H
16 
17 #include "MCTargetDesc/HexagonMCInstrInfo.h"
18 #include "MCTargetDesc/HexagonMCTargetDesc.h"
19 #include "llvm/ADT/DenseMap.h"
20 #include "llvm/ADT/SmallVector.h"
21 #include "llvm/Support/SMLoc.h"
22 #include <set>
23 #include <utility>
24 
25 namespace llvm {
26 
27 class MCContext;
28 class MCInst;
29 class MCInstrInfo;
30 class MCRegisterInfo;
31 class MCSubtargetInfo;
32 
33 /// Check for a valid bundle.
34 class HexagonMCChecker {
35   MCContext &Context;
36   MCInst &MCB;
37   const MCRegisterInfo &RI;
38   MCInstrInfo const &MCII;
39   MCSubtargetInfo const &STI;
40   bool ReportErrors;
41 
42   /// Set of definitions: register #, if predicated, if predicated true.
43   using PredSense = std::pair<unsigned, bool>;
44   static const PredSense Unconditional;
45   using PredSet = std::multiset<PredSense>;
46   using PredSetIterator = std::multiset<PredSense>::iterator;
47 
48   using DefsIterator = DenseMap<unsigned, PredSet>::iterator;
49   DenseMap<unsigned, PredSet> Defs;
50 
51   /// Set of weak definitions whose clashes should be enforced selectively.
52   using SoftDefsIterator = std::set<unsigned>::iterator;
53   std::set<unsigned> SoftDefs;
54 
55   /// Set of temporary definitions not committed to the register file.
56   using TmpDefsIterator = std::set<unsigned>::iterator;
57   std::set<unsigned> TmpDefs;
58 
59   /// Set of new predicates used.
60   using NewPredsIterator = std::set<unsigned>::iterator;
61   std::set<unsigned> NewPreds;
62 
63   /// Set of predicates defined late.
64   using LatePredsIterator = std::multiset<unsigned>::iterator;
65   std::multiset<unsigned> LatePreds;
66 
67   /// Set of uses.
68   using UsesIterator = std::set<unsigned>::iterator;
69   std::set<unsigned> Uses;
70 
71   /// Pre-defined set of read-only registers.
72   using ReadOnlyIterator = std::set<unsigned>::iterator;
73   std::set<unsigned> ReadOnly;
74 
75   // Contains the vector-pair-registers with the even number
76   // first ("v0:1", e.g.) used/def'd in this packet.
77   std::set<unsigned> ReversePairs;
78 
79   void init();
80   void init(MCInst const &);
81   void initReg(MCInst const &, unsigned, unsigned &PredReg, bool &isTrue);
82 
83   bool registerUsed(unsigned Register);
84 
85   /// \return a tuple of: pointer to the producer instruction or nullptr if
86   /// none was found, the operand index, and the PredicateInfo for the
87   /// producer.
88   std::tuple<MCInst const *, unsigned, HexagonMCInstrInfo::PredicateInfo>
89   registerProducer(unsigned Register,
90                    HexagonMCInstrInfo::PredicateInfo Predicated);
91 
92   // Checks performed.
93   bool checkBranches();
94   bool checkPredicates();
95   bool checkNewValues();
96   bool checkRegisters();
97   bool checkRegistersReadOnly();
98   void checkRegisterCurDefs();
99   bool checkSolo();
100   bool checkShuffle();
101   bool checkSlots();
102   bool checkAXOK();
103   bool checkHWLoop();
104   bool checkCOFMax1();
105   bool checkLegalVecRegPair();
106   bool checkValidTmpDst();
107   bool checkHVXAccum();
108 
109   static void compoundRegisterMap(unsigned &);
110 
111   bool isLoopRegister(unsigned R) const {
112     return (Hexagon::SA0 == R || Hexagon::LC0 == R || Hexagon::SA1 == R ||
113             Hexagon::LC1 == R);
114   }
115 
116 public:
117   explicit HexagonMCChecker(MCContext &Context, MCInstrInfo const &MCII,
118                             MCSubtargetInfo const &STI, MCInst &mcb,
119                             const MCRegisterInfo &ri, bool ReportErrors = true);
120   explicit HexagonMCChecker(HexagonMCChecker const &Check,
121                             MCSubtargetInfo const &STI, bool CopyReportErrors);
122 
123   bool check(bool FullCheck = true);
124   void reportErrorRegisters(unsigned Register);
125   void reportErrorNewValue(unsigned Register);
126   void reportError(SMLoc Loc, Twine const &Msg);
127   void reportNote(SMLoc Loc, Twine const &Msg);
128   void reportError(Twine const &Msg);
129   void reportWarning(Twine const &Msg);
130   void reportBranchErrors();
131 };
132 
133 } // end namespace llvm
134 
135 #endif // LLVM_LIB_TARGET_HEXAGON_MCTARGETDESC_HEXAGONMCCHECKER_H
136