xref: /freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/HexagonIICHVX.td (revision 7fdf597e96a02165cfe22ff357b857d5fa15ed8a)
1//===--- HexagonIICHVX.td -------------------------------------------------===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8
9def CVI_GATHER_PSEUDO : InstrItinClass;
10def CVI_VA            : InstrItinClass;
11
12class HVXItin {
13  list<InstrItinData> HVXItin_list = [
14    InstrItinData<CVI_VA,
15      [InstrStage<1, [SLOT0,SLOT1,SLOT2,SLOT3], 0>,
16       InstrStage<1, [CVI_XLANE,CVI_SHIFT, CVI_MPY0, CVI_MPY1]>],
17      [9, 7, 7, 7], [HVX_FWD, HVX_FWD, HVX_FWD]>,
18
19    // Used by gather pseudo-instructions which are expanded into V6_vgather*
20    // and V6_vS32b_new_ai. Even though these instructions use CVI_LD resource,
21    // it's not included below to avoid having more than 4 InstrStages and
22    // thus changing 'MaxResTerms' to 5. Instead, both SLOT0 and SLOT1 are
23    // used, which should be sufficient.
24    InstrItinData <CVI_GATHER_PSEUDO,
25      [InstrStage<1, [SLOT0], 0>,
26       InstrStage<1, [SLOT1], 0>,
27       InstrStage<1, [CVI_ST], 0>,
28       InstrStage<1, [CVI_MPY01, CVI_XLSHF]>]>];
29}
30