xref: /freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/HexagonDepTimingClasses.h (revision 1719886f6d08408b834d270c59ffcfd821c8f63a) 
1 //===----------------------------------------------------------------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 // Automatically generated file, do not edit!
9 //===----------------------------------------------------------------------===//
10 
11 #ifndef LLVM_LIB_TARGET_HEXAGON_HEXAGONDEPTIMINGCLASSES_H
12 #define LLVM_LIB_TARGET_HEXAGON_HEXAGONDEPTIMINGCLASSES_H
13 
14 #include "HexagonInstrInfo.h"
15 
16 namespace llvm {
17 
18 inline bool is_TC1(unsigned SchedClass) {
19   switch (SchedClass) {
20   case Hexagon::Sched::tc_112d30d6:
21   case Hexagon::Sched::tc_151bf368:
22   case Hexagon::Sched::tc_1c2c7a4a:
23   case Hexagon::Sched::tc_1d41f8b7:
24   case Hexagon::Sched::tc_23708a21:
25   case Hexagon::Sched::tc_24f426ab:
26   case Hexagon::Sched::tc_2f573607:
27   case Hexagon::Sched::tc_388f9897:
28   case Hexagon::Sched::tc_3d14a17b:
29   case Hexagon::Sched::tc_3fbf1042:
30   case Hexagon::Sched::tc_407e96f9:
31   case Hexagon::Sched::tc_42ff66ba:
32   case Hexagon::Sched::tc_4a55d03c:
33   case Hexagon::Sched::tc_5502c366:
34   case Hexagon::Sched::tc_55b33fda:
35   case Hexagon::Sched::tc_56a124a7:
36   case Hexagon::Sched::tc_57a55b54:
37   case Hexagon::Sched::tc_59a7822c:
38   case Hexagon::Sched::tc_5b347363:
39   case Hexagon::Sched::tc_5da50c4b:
40   case Hexagon::Sched::tc_60e324ff:
41   case Hexagon::Sched::tc_651cbe02:
42   case Hexagon::Sched::tc_6fc5dbea:
43   case Hexagon::Sched::tc_711c805f:
44   case Hexagon::Sched::tc_713b66bf:
45   case Hexagon::Sched::tc_9124c04f:
46   case Hexagon::Sched::tc_9c52f549:
47   case Hexagon::Sched::tc_9e27f2f9:
48   case Hexagon::Sched::tc_9f6cd987:
49   case Hexagon::Sched::tc_a1297125:
50   case Hexagon::Sched::tc_a7a13fac:
51   case Hexagon::Sched::tc_b837298f:
52   case Hexagon::Sched::tc_c57d9f39:
53   case Hexagon::Sched::tc_d33e5eee:
54   case Hexagon::Sched::tc_decdde8a:
55   case Hexagon::Sched::tc_e60def48:
56   case Hexagon::Sched::tc_ed03645c:
57   case Hexagon::Sched::tc_eeda4109:
58   case Hexagon::Sched::tc_ef921005:
59   case Hexagon::Sched::tc_f97707c1:
60   case Hexagon::Sched::tc_f999c66e:
61     return true;
62   default:
63     return false;
64   }
65 }
66 
67 inline bool is_TC2(unsigned SchedClass) {
68   switch (SchedClass) {
69   case Hexagon::Sched::tc_01d44cb2:
70   case Hexagon::Sched::tc_0dfac0a7:
71   case Hexagon::Sched::tc_1fcb8495:
72   case Hexagon::Sched::tc_20131976:
73   case Hexagon::Sched::tc_2c13e7f5:
74   case Hexagon::Sched::tc_3edca78f:
75   case Hexagon::Sched::tc_5e4cf0e8:
76   case Hexagon::Sched::tc_65279839:
77   case Hexagon::Sched::tc_7401744f:
78   case Hexagon::Sched::tc_84a7500d:
79   case Hexagon::Sched::tc_8a825db2:
80   case Hexagon::Sched::tc_8b5bd4f5:
81   case Hexagon::Sched::tc_95a33176:
82   case Hexagon::Sched::tc_9b3c0462:
83   case Hexagon::Sched::tc_a08b630b:
84   case Hexagon::Sched::tc_a4e22bbd:
85   case Hexagon::Sched::tc_a7bdb22c:
86   case Hexagon::Sched::tc_bb831a7c:
87   case Hexagon::Sched::tc_c20701f0:
88   case Hexagon::Sched::tc_d3632d88:
89   case Hexagon::Sched::tc_d61dfdc3:
90   case Hexagon::Sched::tc_e3d699e3:
91   case Hexagon::Sched::tc_f098b237:
92   case Hexagon::Sched::tc_f34c1c21:
93     return true;
94   default:
95     return false;
96   }
97 }
98 
99 inline bool is_TC2early(unsigned SchedClass) {
100   switch (SchedClass) {
101   case Hexagon::Sched::tc_33e7e673:
102   case Hexagon::Sched::tc_45f9d1be:
103   case Hexagon::Sched::tc_a4ee89db:
104     return true;
105   default:
106     return false;
107   }
108 }
109 
110 inline bool is_TC3x(unsigned SchedClass) {
111   switch (SchedClass) {
112   case Hexagon::Sched::tc_01e1be3b:
113   case Hexagon::Sched::tc_1248597c:
114   case Hexagon::Sched::tc_197dce51:
115   case Hexagon::Sched::tc_27106296:
116   case Hexagon::Sched::tc_28e55c6f:
117   case Hexagon::Sched::tc_2c3e17fc:
118   case Hexagon::Sched::tc_38382228:
119   case Hexagon::Sched::tc_38e0bae9:
120   case Hexagon::Sched::tc_4abdbdc6:
121   case Hexagon::Sched::tc_503ce0f3:
122   case Hexagon::Sched::tc_556f6577:
123   case Hexagon::Sched::tc_5a4b5e58:
124   case Hexagon::Sched::tc_6ae3426b:
125   case Hexagon::Sched::tc_6d861a95:
126   case Hexagon::Sched::tc_788b1d09:
127   case Hexagon::Sched::tc_7dc63b5c:
128   case Hexagon::Sched::tc_7f8ae742:
129   case Hexagon::Sched::tc_9406230a:
130   case Hexagon::Sched::tc_a154b476:
131   case Hexagon::Sched::tc_a38c45dc:
132   case Hexagon::Sched::tc_c21d7447:
133   case Hexagon::Sched::tc_d7718fbe:
134   case Hexagon::Sched::tc_db596beb:
135   case Hexagon::Sched::tc_f0cdeccf:
136   case Hexagon::Sched::tc_fae9dfa5:
137     return true;
138   default:
139     return false;
140   }
141 }
142 
143 inline bool is_TC4x(unsigned SchedClass) {
144   switch (SchedClass) {
145   case Hexagon::Sched::tc_02fe1c65:
146   case Hexagon::Sched::tc_0a195f2c:
147   case Hexagon::Sched::tc_7f7f45f5:
148   case Hexagon::Sched::tc_9783714b:
149   case Hexagon::Sched::tc_9e72dc89:
150   case Hexagon::Sched::tc_9edb7c77:
151   case Hexagon::Sched::tc_f0e8e832:
152   case Hexagon::Sched::tc_f7569068:
153     return true;
154   default:
155     return false;
156   }
157 }
158 } // namespace llvm
159 
160 #endif  // LLVM_LIB_TARGET_HEXAGON_HEXAGONDEPTIMINGCLASSES_H
161