xref: /freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/HexagonDepInstrFormats.td (revision b64c5a0ace59af62eff52bfe110a521dc73c937b) 
1//===----------------------------------------------------------------------===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8// Automatically generated file, do not edit!
9//===----------------------------------------------------------------------===//
10
11class Enc_01d3d0 : OpcodeHexagon {
12  bits <5> Vu32;
13  let Inst{12-8} = Vu32{4-0};
14  bits <5> Rt32;
15  let Inst{20-16} = Rt32{4-0};
16  bits <5> Vdd32;
17  let Inst{4-0} = Vdd32{4-0};
18}
19class Enc_02553a : OpcodeHexagon {
20  bits <7> Ii;
21  let Inst{11-5} = Ii{6-0};
22  bits <5> Rs32;
23  let Inst{20-16} = Rs32{4-0};
24  bits <2> Pd4;
25  let Inst{1-0} = Pd4{1-0};
26}
27class Enc_03833b : OpcodeHexagon {
28  bits <5> Rss32;
29  let Inst{20-16} = Rss32{4-0};
30  bits <5> Rt32;
31  let Inst{12-8} = Rt32{4-0};
32  bits <2> Pd4;
33  let Inst{1-0} = Pd4{1-0};
34}
35class Enc_041d7b : OpcodeHexagon {
36  bits <11> Ii;
37  let Inst{21-20} = Ii{10-9};
38  let Inst{7-1} = Ii{8-2};
39  bits <4> Rs16;
40  let Inst{19-16} = Rs16{3-0};
41  bits <5> n1;
42  let Inst{28-28} = n1{4-4};
43  let Inst{24-23} = n1{3-2};
44  let Inst{13-13} = n1{1-1};
45  let Inst{8-8} = n1{0-0};
46}
47class Enc_046afa : OpcodeHexagon {
48  bits <1> Mu2;
49  let Inst{13-13} = Mu2{0-0};
50  bits <5> Vss32;
51  let Inst{4-0} = Vss32{4-0};
52  bits <5> Rx32;
53  let Inst{20-16} = Rx32{4-0};
54}
55class Enc_04c959 : OpcodeHexagon {
56  bits <2> Ii;
57  let Inst{13-13} = Ii{1-1};
58  let Inst{7-7} = Ii{0-0};
59  bits <6> II;
60  let Inst{11-8} = II{5-2};
61  let Inst{6-5} = II{1-0};
62  bits <5> Rt32;
63  let Inst{20-16} = Rt32{4-0};
64  bits <5> Ryy32;
65  let Inst{4-0} = Ryy32{4-0};
66}
67class Enc_0527db : OpcodeHexagon {
68  bits <4> Rs16;
69  let Inst{7-4} = Rs16{3-0};
70  bits <4> Rx16;
71  let Inst{3-0} = Rx16{3-0};
72}
73class Enc_052c7d : OpcodeHexagon {
74  bits <5> Ii;
75  let Inst{6-3} = Ii{4-1};
76  bits <5> Rt32;
77  let Inst{12-8} = Rt32{4-0};
78  bits <5> Rx32;
79  let Inst{20-16} = Rx32{4-0};
80}
81class Enc_08d755 : OpcodeHexagon {
82  bits <8> Ii;
83  let Inst{12-5} = Ii{7-0};
84  bits <5> Rs32;
85  let Inst{20-16} = Rs32{4-0};
86  bits <2> Pd4;
87  let Inst{1-0} = Pd4{1-0};
88}
89class Enc_0aa344 : OpcodeHexagon {
90  bits <5> Gss32;
91  let Inst{20-16} = Gss32{4-0};
92  bits <5> Rdd32;
93  let Inst{4-0} = Rdd32{4-0};
94}
95class Enc_0b2e5b : OpcodeHexagon {
96  bits <3> Ii;
97  let Inst{7-5} = Ii{2-0};
98  bits <5> Vu32;
99  let Inst{12-8} = Vu32{4-0};
100  bits <5> Vv32;
101  let Inst{20-16} = Vv32{4-0};
102  bits <5> Vd32;
103  let Inst{4-0} = Vd32{4-0};
104}
105class Enc_0b51ce : OpcodeHexagon {
106  bits <3> Ii;
107  let Inst{10-8} = Ii{2-0};
108  bits <2> Qv4;
109  let Inst{12-11} = Qv4{1-0};
110  bits <5> Vs32;
111  let Inst{4-0} = Vs32{4-0};
112  bits <5> Rx32;
113  let Inst{20-16} = Rx32{4-0};
114}
115class Enc_0cb018 : OpcodeHexagon {
116  bits <5> Cs32;
117  let Inst{20-16} = Cs32{4-0};
118  bits <5> Rd32;
119  let Inst{4-0} = Rd32{4-0};
120}
121class Enc_0d8870 : OpcodeHexagon {
122  bits <12> Ii;
123  let Inst{26-25} = Ii{11-10};
124  let Inst{13-13} = Ii{9-9};
125  let Inst{7-0} = Ii{8-1};
126  bits <5> Rs32;
127  let Inst{20-16} = Rs32{4-0};
128  bits <3> Nt8;
129  let Inst{10-8} = Nt8{2-0};
130}
131class Enc_0d8adb : OpcodeHexagon {
132  bits <8> Ii;
133  let Inst{12-5} = Ii{7-0};
134  bits <5> Rss32;
135  let Inst{20-16} = Rss32{4-0};
136  bits <2> Pd4;
137  let Inst{1-0} = Pd4{1-0};
138}
139class Enc_0e41fa : OpcodeHexagon {
140  bits <5> Vuu32;
141  let Inst{12-8} = Vuu32{4-0};
142  bits <5> Rt32;
143  let Inst{20-16} = Rt32{4-0};
144  bits <5> Vd32;
145  let Inst{4-0} = Vd32{4-0};
146}
147class Enc_0ed752 : OpcodeHexagon {
148  bits <5> Rss32;
149  let Inst{20-16} = Rss32{4-0};
150  bits <5> Cdd32;
151  let Inst{4-0} = Cdd32{4-0};
152}
153class Enc_0f8bab : OpcodeHexagon {
154  bits <5> Vu32;
155  let Inst{12-8} = Vu32{4-0};
156  bits <5> Rt32;
157  let Inst{20-16} = Rt32{4-0};
158  bits <2> Qd4;
159  let Inst{1-0} = Qd4{1-0};
160}
161class Enc_0fa531 : OpcodeHexagon {
162  bits <15> Ii;
163  let Inst{21-21} = Ii{14-14};
164  let Inst{13-13} = Ii{13-13};
165  let Inst{11-1} = Ii{12-2};
166  bits <5> Rs32;
167  let Inst{20-16} = Rs32{4-0};
168}
169class Enc_10bc21 : OpcodeHexagon {
170  bits <4> Ii;
171  let Inst{6-3} = Ii{3-0};
172  bits <5> Rt32;
173  let Inst{12-8} = Rt32{4-0};
174  bits <5> Rx32;
175  let Inst{20-16} = Rx32{4-0};
176}
177class Enc_1178da : OpcodeHexagon {
178  bits <3> Ii;
179  let Inst{7-5} = Ii{2-0};
180  bits <5> Vu32;
181  let Inst{12-8} = Vu32{4-0};
182  bits <5> Vv32;
183  let Inst{20-16} = Vv32{4-0};
184  bits <5> Vxx32;
185  let Inst{4-0} = Vxx32{4-0};
186}
187class Enc_11a146 : OpcodeHexagon {
188  bits <4> Ii;
189  let Inst{11-8} = Ii{3-0};
190  bits <5> Rss32;
191  let Inst{20-16} = Rss32{4-0};
192  bits <5> Rd32;
193  let Inst{4-0} = Rd32{4-0};
194}
195class Enc_12b6e9 : OpcodeHexagon {
196  bits <4> Ii;
197  let Inst{11-8} = Ii{3-0};
198  bits <5> Rss32;
199  let Inst{20-16} = Rss32{4-0};
200  bits <5> Rdd32;
201  let Inst{4-0} = Rdd32{4-0};
202}
203class Enc_134437 : OpcodeHexagon {
204  bits <2> Qs4;
205  let Inst{9-8} = Qs4{1-0};
206  bits <2> Qt4;
207  let Inst{23-22} = Qt4{1-0};
208  bits <2> Qd4;
209  let Inst{1-0} = Qd4{1-0};
210}
211class Enc_140c83 : OpcodeHexagon {
212  bits <10> Ii;
213  let Inst{21-21} = Ii{9-9};
214  let Inst{13-5} = Ii{8-0};
215  bits <5> Rs32;
216  let Inst{20-16} = Rs32{4-0};
217  bits <5> Rd32;
218  let Inst{4-0} = Rd32{4-0};
219}
220class Enc_143445 : OpcodeHexagon {
221  bits <13> Ii;
222  let Inst{26-25} = Ii{12-11};
223  let Inst{13-13} = Ii{10-10};
224  let Inst{7-0} = Ii{9-2};
225  bits <5> Rs32;
226  let Inst{20-16} = Rs32{4-0};
227  bits <5> Rt32;
228  let Inst{12-8} = Rt32{4-0};
229}
230class Enc_143a3c : OpcodeHexagon {
231  bits <6> Ii;
232  let Inst{13-8} = Ii{5-0};
233  bits <6> II;
234  let Inst{23-21} = II{5-3};
235  let Inst{7-5} = II{2-0};
236  bits <5> Rss32;
237  let Inst{20-16} = Rss32{4-0};
238  bits <5> Rxx32;
239  let Inst{4-0} = Rxx32{4-0};
240}
241class Enc_14640c : OpcodeHexagon {
242  bits <11> Ii;
243  let Inst{21-20} = Ii{10-9};
244  let Inst{7-1} = Ii{8-2};
245  bits <4> Rs16;
246  let Inst{19-16} = Rs16{3-0};
247  bits <5> n1;
248  let Inst{28-28} = n1{4-4};
249  let Inst{24-22} = n1{3-1};
250  let Inst{13-13} = n1{0-0};
251}
252class Enc_14d27a : OpcodeHexagon {
253  bits <5> II;
254  let Inst{12-8} = II{4-0};
255  bits <11> Ii;
256  let Inst{21-20} = Ii{10-9};
257  let Inst{7-1} = Ii{8-2};
258  bits <4> Rs16;
259  let Inst{19-16} = Rs16{3-0};
260}
261class Enc_152467 : OpcodeHexagon {
262  bits <5> Ii;
263  let Inst{8-5} = Ii{4-1};
264  bits <5> Rd32;
265  let Inst{4-0} = Rd32{4-0};
266  bits <5> Rx32;
267  let Inst{20-16} = Rx32{4-0};
268}
269class Enc_158beb : OpcodeHexagon {
270  bits <2> Qs4;
271  let Inst{6-5} = Qs4{1-0};
272  bits <5> Rt32;
273  let Inst{20-16} = Rt32{4-0};
274  bits <1> Mu2;
275  let Inst{13-13} = Mu2{0-0};
276  bits <5> Vv32;
277  let Inst{4-0} = Vv32{4-0};
278}
279class Enc_163a3c : OpcodeHexagon {
280  bits <7> Ii;
281  let Inst{12-7} = Ii{6-1};
282  bits <5> Rs32;
283  let Inst{20-16} = Rs32{4-0};
284  bits <5> Rt32;
285  let Inst{4-0} = Rt32{4-0};
286}
287class Enc_16c48b : OpcodeHexagon {
288  bits <5> Rt32;
289  let Inst{20-16} = Rt32{4-0};
290  bits <1> Mu2;
291  let Inst{13-13} = Mu2{0-0};
292  bits <5> Vv32;
293  let Inst{12-8} = Vv32{4-0};
294  bits <5> Vw32;
295  let Inst{4-0} = Vw32{4-0};
296}
297class Enc_178717 : OpcodeHexagon {
298  bits <11> Ii;
299  let Inst{21-20} = Ii{10-9};
300  let Inst{7-1} = Ii{8-2};
301  bits <4> Rs16;
302  let Inst{19-16} = Rs16{3-0};
303  bits <6> n1;
304  let Inst{28-28} = n1{5-5};
305  let Inst{25-23} = n1{4-2};
306  let Inst{13-13} = n1{1-1};
307  let Inst{8-8} = n1{0-0};
308}
309class Enc_179b35 : OpcodeHexagon {
310  bits <5> Rs32;
311  let Inst{20-16} = Rs32{4-0};
312  bits <5> Rtt32;
313  let Inst{12-8} = Rtt32{4-0};
314  bits <5> Rx32;
315  let Inst{4-0} = Rx32{4-0};
316}
317class Enc_18c338 : OpcodeHexagon {
318  bits <8> Ii;
319  let Inst{12-5} = Ii{7-0};
320  bits <8> II;
321  let Inst{22-16} = II{7-1};
322  let Inst{13-13} = II{0-0};
323  bits <5> Rdd32;
324  let Inst{4-0} = Rdd32{4-0};
325}
326class Enc_1a9974 : OpcodeHexagon {
327  bits <2> Ii;
328  let Inst{13-13} = Ii{1-1};
329  let Inst{7-7} = Ii{0-0};
330  bits <2> Pv4;
331  let Inst{6-5} = Pv4{1-0};
332  bits <5> Rs32;
333  let Inst{20-16} = Rs32{4-0};
334  bits <5> Ru32;
335  let Inst{12-8} = Ru32{4-0};
336  bits <5> Rtt32;
337  let Inst{4-0} = Rtt32{4-0};
338}
339class Enc_1aa186 : OpcodeHexagon {
340  bits <5> Rss32;
341  let Inst{20-16} = Rss32{4-0};
342  bits <5> Rt32;
343  let Inst{12-8} = Rt32{4-0};
344  bits <5> Rxx32;
345  let Inst{4-0} = Rxx32{4-0};
346}
347class Enc_1aaec1 : OpcodeHexagon {
348  bits <3> Ii;
349  let Inst{10-8} = Ii{2-0};
350  bits <3> Os8;
351  let Inst{2-0} = Os8{2-0};
352  bits <5> Rx32;
353  let Inst{20-16} = Rx32{4-0};
354}
355class Enc_1b64fb : OpcodeHexagon {
356  bits <16> Ii;
357  let Inst{26-25} = Ii{15-14};
358  let Inst{20-16} = Ii{13-9};
359  let Inst{13-13} = Ii{8-8};
360  let Inst{7-0} = Ii{7-0};
361  bits <5> Rt32;
362  let Inst{12-8} = Rt32{4-0};
363}
364class Enc_1bd127 : OpcodeHexagon {
365  bits <5> Vu32;
366  let Inst{12-8} = Vu32{4-0};
367  bits <3> Rt8;
368  let Inst{18-16} = Rt8{2-0};
369  bits <5> Vdddd32;
370  let Inst{4-0} = Vdddd32{4-0};
371}
372class Enc_1cf4ca : OpcodeHexagon {
373  bits <6> Ii;
374  let Inst{17-16} = Ii{5-4};
375  let Inst{6-3} = Ii{3-0};
376  bits <2> Pv4;
377  let Inst{1-0} = Pv4{1-0};
378  bits <5> Rt32;
379  let Inst{12-8} = Rt32{4-0};
380}
381class Enc_1de724 : OpcodeHexagon {
382  bits <11> Ii;
383  let Inst{21-20} = Ii{10-9};
384  let Inst{7-1} = Ii{8-2};
385  bits <4> Rs16;
386  let Inst{19-16} = Rs16{3-0};
387  bits <4> n1;
388  let Inst{28-28} = n1{3-3};
389  let Inst{24-22} = n1{2-0};
390}
391class Enc_1ef990 : OpcodeHexagon {
392  bits <2> Pv4;
393  let Inst{12-11} = Pv4{1-0};
394  bits <1> Mu2;
395  let Inst{13-13} = Mu2{0-0};
396  bits <5> Vs32;
397  let Inst{4-0} = Vs32{4-0};
398  bits <5> Rx32;
399  let Inst{20-16} = Rx32{4-0};
400}
401class Enc_1f19b5 : OpcodeHexagon {
402  bits <5> Ii;
403  let Inst{9-5} = Ii{4-0};
404  bits <5> Rss32;
405  let Inst{20-16} = Rss32{4-0};
406  bits <2> Pd4;
407  let Inst{1-0} = Pd4{1-0};
408}
409class Enc_1f5ba6 : OpcodeHexagon {
410  bits <4> Rd16;
411  let Inst{3-0} = Rd16{3-0};
412}
413class Enc_1f5d8f : OpcodeHexagon {
414  bits <1> Mu2;
415  let Inst{13-13} = Mu2{0-0};
416  bits <5> Ryy32;
417  let Inst{4-0} = Ryy32{4-0};
418  bits <5> Rx32;
419  let Inst{20-16} = Rx32{4-0};
420}
421class Enc_211aaa : OpcodeHexagon {
422  bits <11> Ii;
423  let Inst{26-25} = Ii{10-9};
424  let Inst{13-5} = Ii{8-0};
425  bits <5> Rs32;
426  let Inst{20-16} = Rs32{4-0};
427  bits <5> Rd32;
428  let Inst{4-0} = Rd32{4-0};
429}
430class Enc_217147 : OpcodeHexagon {
431  bits <2> Qv4;
432  let Inst{23-22} = Qv4{1-0};
433}
434class Enc_222336 : OpcodeHexagon {
435  bits <4> Ii;
436  let Inst{8-5} = Ii{3-0};
437  bits <5> Rd32;
438  let Inst{4-0} = Rd32{4-0};
439  bits <5> Rx32;
440  let Inst{20-16} = Rx32{4-0};
441}
442class Enc_223005 : OpcodeHexagon {
443  bits <6> Ii;
444  let Inst{6-3} = Ii{5-2};
445  bits <3> Nt8;
446  let Inst{10-8} = Nt8{2-0};
447  bits <5> Rx32;
448  let Inst{20-16} = Rx32{4-0};
449}
450class Enc_226535 : OpcodeHexagon {
451  bits <8> Ii;
452  let Inst{12-7} = Ii{7-2};
453  bits <5> Rs32;
454  let Inst{20-16} = Rs32{4-0};
455  bits <5> Rt32;
456  let Inst{4-0} = Rt32{4-0};
457}
458class Enc_22c845 : OpcodeHexagon {
459  bits <14> Ii;
460  let Inst{10-0} = Ii{13-3};
461  bits <5> Rx32;
462  let Inst{20-16} = Rx32{4-0};
463}
464class Enc_2301d6 : OpcodeHexagon {
465  bits <6> Ii;
466  let Inst{20-16} = Ii{5-1};
467  let Inst{8-8} = Ii{0-0};
468  bits <2> Pt4;
469  let Inst{10-9} = Pt4{1-0};
470  bits <5> Rd32;
471  let Inst{4-0} = Rd32{4-0};
472}
473class Enc_245865 : OpcodeHexagon {
474  bits <5> Vu32;
475  let Inst{12-8} = Vu32{4-0};
476  bits <5> Vv32;
477  let Inst{23-19} = Vv32{4-0};
478  bits <3> Rt8;
479  let Inst{18-16} = Rt8{2-0};
480  bits <5> Vx32;
481  let Inst{4-0} = Vx32{4-0};
482}
483class Enc_24a7dc : OpcodeHexagon {
484  bits <5> Vu32;
485  let Inst{12-8} = Vu32{4-0};
486  bits <5> Vv32;
487  let Inst{23-19} = Vv32{4-0};
488  bits <3> Rt8;
489  let Inst{18-16} = Rt8{2-0};
490  bits <5> Vdd32;
491  let Inst{4-0} = Vdd32{4-0};
492}
493class Enc_25bef0 : OpcodeHexagon {
494  bits <16> Ii;
495  let Inst{26-25} = Ii{15-14};
496  let Inst{20-16} = Ii{13-9};
497  let Inst{13-5} = Ii{8-0};
498  bits <5> Rd32;
499  let Inst{4-0} = Rd32{4-0};
500}
501class Enc_263841 : OpcodeHexagon {
502  bits <5> Vu32;
503  let Inst{12-8} = Vu32{4-0};
504  bits <5> Rtt32;
505  let Inst{20-16} = Rtt32{4-0};
506  bits <5> Vd32;
507  let Inst{4-0} = Vd32{4-0};
508}
509class Enc_277737 : OpcodeHexagon {
510  bits <8> Ii;
511  let Inst{22-21} = Ii{7-6};
512  let Inst{13-13} = Ii{5-5};
513  let Inst{7-5} = Ii{4-2};
514  bits <5> Ru32;
515  let Inst{4-0} = Ru32{4-0};
516  bits <5> Rs32;
517  let Inst{20-16} = Rs32{4-0};
518  bits <5> Rd32;
519  let Inst{12-8} = Rd32{4-0};
520}
521class Enc_27b757 : OpcodeHexagon {
522  bits <4> Ii;
523  let Inst{13-13} = Ii{3-3};
524  let Inst{10-8} = Ii{2-0};
525  bits <2> Pv4;
526  let Inst{12-11} = Pv4{1-0};
527  bits <5> Rt32;
528  let Inst{20-16} = Rt32{4-0};
529  bits <5> Vs32;
530  let Inst{4-0} = Vs32{4-0};
531}
532class Enc_27fd0e : OpcodeHexagon {
533  bits <6> Ii;
534  let Inst{8-5} = Ii{5-2};
535  bits <1> Mu2;
536  let Inst{13-13} = Mu2{0-0};
537  bits <5> Rd32;
538  let Inst{4-0} = Rd32{4-0};
539  bits <5> Rx32;
540  let Inst{20-16} = Rx32{4-0};
541}
542class Enc_284ebb : OpcodeHexagon {
543  bits <2> Ps4;
544  let Inst{17-16} = Ps4{1-0};
545  bits <2> Pt4;
546  let Inst{9-8} = Pt4{1-0};
547  bits <2> Pd4;
548  let Inst{1-0} = Pd4{1-0};
549}
550class Enc_28a2dc : OpcodeHexagon {
551  bits <5> Ii;
552  let Inst{12-8} = Ii{4-0};
553  bits <5> Rs32;
554  let Inst{20-16} = Rs32{4-0};
555  bits <5> Rx32;
556  let Inst{4-0} = Rx32{4-0};
557}
558class Enc_28dcbb : OpcodeHexagon {
559  bits <5> Rt32;
560  let Inst{20-16} = Rt32{4-0};
561  bits <1> Mu2;
562  let Inst{13-13} = Mu2{0-0};
563  bits <5> Vvv32;
564  let Inst{4-0} = Vvv32{4-0};
565}
566class Enc_2a3787 : OpcodeHexagon {
567  bits <13> Ii;
568  let Inst{26-25} = Ii{12-11};
569  let Inst{13-5} = Ii{10-2};
570  bits <5> Rs32;
571  let Inst{20-16} = Rs32{4-0};
572  bits <5> Rd32;
573  let Inst{4-0} = Rd32{4-0};
574}
575class Enc_2a7b91 : OpcodeHexagon {
576  bits <6> Ii;
577  let Inst{20-16} = Ii{5-1};
578  let Inst{8-8} = Ii{0-0};
579  bits <2> Pt4;
580  let Inst{10-9} = Pt4{1-0};
581  bits <5> Rdd32;
582  let Inst{4-0} = Rdd32{4-0};
583}
584class Enc_2ae154 : OpcodeHexagon {
585  bits <5> Rs32;
586  let Inst{20-16} = Rs32{4-0};
587  bits <5> Rt32;
588  let Inst{12-8} = Rt32{4-0};
589  bits <5> Rx32;
590  let Inst{4-0} = Rx32{4-0};
591}
592class Enc_2b3f60 : OpcodeHexagon {
593  bits <5> Rss32;
594  let Inst{20-16} = Rss32{4-0};
595  bits <5> Rtt32;
596  let Inst{12-8} = Rtt32{4-0};
597  bits <5> Rdd32;
598  let Inst{4-0} = Rdd32{4-0};
599  bits <2> Px4;
600  let Inst{6-5} = Px4{1-0};
601}
602class Enc_2b518f : OpcodeHexagon {
603  bits <32> Ii;
604  let Inst{27-16} = Ii{31-20};
605  let Inst{13-0} = Ii{19-6};
606}
607class Enc_2bae10 : OpcodeHexagon {
608  bits <4> Ii;
609  let Inst{10-8} = Ii{3-1};
610  bits <4> Rs16;
611  let Inst{7-4} = Rs16{3-0};
612  bits <4> Rd16;
613  let Inst{3-0} = Rd16{3-0};
614}
615class Enc_2d7491 : OpcodeHexagon {
616  bits <13> Ii;
617  let Inst{26-25} = Ii{12-11};
618  let Inst{13-5} = Ii{10-2};
619  bits <5> Rs32;
620  let Inst{20-16} = Rs32{4-0};
621  bits <5> Rdd32;
622  let Inst{4-0} = Rdd32{4-0};
623}
624class Enc_2d829e : OpcodeHexagon {
625  bits <14> Ii;
626  let Inst{10-0} = Ii{13-3};
627  bits <5> Rs32;
628  let Inst{20-16} = Rs32{4-0};
629}
630class Enc_2df31d : OpcodeHexagon {
631  bits <8> Ii;
632  let Inst{9-4} = Ii{7-2};
633  bits <4> Rd16;
634  let Inst{3-0} = Rd16{3-0};
635}
636class Enc_2e1979 : OpcodeHexagon {
637  bits <2> Ii;
638  let Inst{13-13} = Ii{1-1};
639  let Inst{7-7} = Ii{0-0};
640  bits <2> Pv4;
641  let Inst{6-5} = Pv4{1-0};
642  bits <5> Rs32;
643  let Inst{20-16} = Rs32{4-0};
644  bits <5> Rt32;
645  let Inst{12-8} = Rt32{4-0};
646  bits <5> Rd32;
647  let Inst{4-0} = Rd32{4-0};
648}
649class Enc_2ea740 : OpcodeHexagon {
650  bits <4> Ii;
651  let Inst{13-13} = Ii{3-3};
652  let Inst{10-8} = Ii{2-0};
653  bits <2> Qv4;
654  let Inst{12-11} = Qv4{1-0};
655  bits <5> Rt32;
656  let Inst{20-16} = Rt32{4-0};
657  bits <5> Vs32;
658  let Inst{4-0} = Vs32{4-0};
659}
660class Enc_2ebe3b : OpcodeHexagon {
661  bits <1> Mu2;
662  let Inst{13-13} = Mu2{0-0};
663  bits <5> Vd32;
664  let Inst{4-0} = Vd32{4-0};
665  bits <5> Rx32;
666  let Inst{20-16} = Rx32{4-0};
667}
668class Enc_2f2f04 : OpcodeHexagon {
669  bits <1> Ii;
670  let Inst{5-5} = Ii{0-0};
671  bits <5> Vuu32;
672  let Inst{12-8} = Vuu32{4-0};
673  bits <5> Rt32;
674  let Inst{20-16} = Rt32{4-0};
675  bits <5> Vdd32;
676  let Inst{4-0} = Vdd32{4-0};
677}
678class Enc_2fbf3c : OpcodeHexagon {
679  bits <3> Ii;
680  let Inst{10-8} = Ii{2-0};
681  bits <4> Rs16;
682  let Inst{7-4} = Rs16{3-0};
683  bits <4> Rd16;
684  let Inst{3-0} = Rd16{3-0};
685}
686class Enc_310ba1 : OpcodeHexagon {
687  bits <5> Vu32;
688  let Inst{12-8} = Vu32{4-0};
689  bits <5> Rtt32;
690  let Inst{20-16} = Rtt32{4-0};
691  bits <5> Vx32;
692  let Inst{4-0} = Vx32{4-0};
693}
694class Enc_311abd : OpcodeHexagon {
695  bits <5> Ii;
696  let Inst{12-8} = Ii{4-0};
697  bits <5> Rs32;
698  let Inst{20-16} = Rs32{4-0};
699  bits <5> Rdd32;
700  let Inst{4-0} = Rdd32{4-0};
701}
702class Enc_31aa6a : OpcodeHexagon {
703  bits <5> Ii;
704  let Inst{6-3} = Ii{4-1};
705  bits <2> Pv4;
706  let Inst{1-0} = Pv4{1-0};
707  bits <3> Nt8;
708  let Inst{10-8} = Nt8{2-0};
709  bits <5> Rx32;
710  let Inst{20-16} = Rx32{4-0};
711}
712class Enc_31db33 : OpcodeHexagon {
713  bits <2> Qt4;
714  let Inst{6-5} = Qt4{1-0};
715  bits <5> Vu32;
716  let Inst{12-8} = Vu32{4-0};
717  bits <5> Vv32;
718  let Inst{20-16} = Vv32{4-0};
719  bits <5> Vd32;
720  let Inst{4-0} = Vd32{4-0};
721}
722class Enc_322e1b : OpcodeHexagon {
723  bits <6> Ii;
724  let Inst{22-21} = Ii{5-4};
725  let Inst{13-13} = Ii{3-3};
726  let Inst{7-5} = Ii{2-0};
727  bits <6> II;
728  let Inst{23-23} = II{5-5};
729  let Inst{4-0} = II{4-0};
730  bits <5> Rs32;
731  let Inst{20-16} = Rs32{4-0};
732  bits <5> Rd32;
733  let Inst{12-8} = Rd32{4-0};
734}
735class Enc_323f2d : OpcodeHexagon {
736  bits <6> II;
737  let Inst{11-8} = II{5-2};
738  let Inst{6-5} = II{1-0};
739  bits <5> Rd32;
740  let Inst{4-0} = Rd32{4-0};
741  bits <5> Re32;
742  let Inst{20-16} = Re32{4-0};
743}
744class Enc_329361 : OpcodeHexagon {
745  bits <2> Pu4;
746  let Inst{6-5} = Pu4{1-0};
747  bits <5> Rss32;
748  let Inst{20-16} = Rss32{4-0};
749  bits <5> Rtt32;
750  let Inst{12-8} = Rtt32{4-0};
751  bits <5> Rdd32;
752  let Inst{4-0} = Rdd32{4-0};
753}
754class Enc_33f8ba : OpcodeHexagon {
755  bits <8> Ii;
756  let Inst{12-8} = Ii{7-3};
757  let Inst{4-2} = Ii{2-0};
758  bits <5> Rx32;
759  let Inst{20-16} = Rx32{4-0};
760}
761class Enc_3680c2 : OpcodeHexagon {
762  bits <7> Ii;
763  let Inst{11-5} = Ii{6-0};
764  bits <5> Rss32;
765  let Inst{20-16} = Rss32{4-0};
766  bits <2> Pd4;
767  let Inst{1-0} = Pd4{1-0};
768}
769class Enc_3694bd : OpcodeHexagon {
770  bits <11> Ii;
771  let Inst{21-20} = Ii{10-9};
772  let Inst{7-1} = Ii{8-2};
773  bits <3> Ns8;
774  let Inst{18-16} = Ns8{2-0};
775  bits <5> n1;
776  let Inst{29-29} = n1{4-4};
777  let Inst{26-25} = n1{3-2};
778  let Inst{23-22} = n1{1-0};
779}
780class Enc_372c9d : OpcodeHexagon {
781  bits <2> Pv4;
782  let Inst{12-11} = Pv4{1-0};
783  bits <1> Mu2;
784  let Inst{13-13} = Mu2{0-0};
785  bits <3> Os8;
786  let Inst{2-0} = Os8{2-0};
787  bits <5> Rx32;
788  let Inst{20-16} = Rx32{4-0};
789}
790class Enc_395cc4 : OpcodeHexagon {
791  bits <7> Ii;
792  let Inst{6-3} = Ii{6-3};
793  bits <1> Mu2;
794  let Inst{13-13} = Mu2{0-0};
795  bits <5> Rtt32;
796  let Inst{12-8} = Rtt32{4-0};
797  bits <5> Rx32;
798  let Inst{20-16} = Rx32{4-0};
799}
800class Enc_397f23 : OpcodeHexagon {
801  bits <8> Ii;
802  let Inst{13-13} = Ii{7-7};
803  let Inst{7-3} = Ii{6-2};
804  bits <2> Pv4;
805  let Inst{1-0} = Pv4{1-0};
806  bits <5> Rs32;
807  let Inst{20-16} = Rs32{4-0};
808  bits <5> Rt32;
809  let Inst{12-8} = Rt32{4-0};
810}
811class Enc_399e12 : OpcodeHexagon {
812  bits <4> Rs16;
813  let Inst{7-4} = Rs16{3-0};
814  bits <3> Rdd8;
815  let Inst{2-0} = Rdd8{2-0};
816}
817class Enc_3a2484 : OpcodeHexagon {
818  bits <11> Ii;
819  let Inst{21-20} = Ii{10-9};
820  let Inst{7-1} = Ii{8-2};
821  bits <4> Rs16;
822  let Inst{19-16} = Rs16{3-0};
823  bits <4> n1;
824  let Inst{28-28} = n1{3-3};
825  let Inst{24-23} = n1{2-1};
826  let Inst{13-13} = n1{0-0};
827}
828class Enc_3a3d62 : OpcodeHexagon {
829  bits <5> Rs32;
830  let Inst{20-16} = Rs32{4-0};
831  bits <5> Rdd32;
832  let Inst{4-0} = Rdd32{4-0};
833}
834class Enc_3b7631 : OpcodeHexagon {
835  bits <5> Vu32;
836  let Inst{12-8} = Vu32{4-0};
837  bits <5> Vdddd32;
838  let Inst{4-0} = Vdddd32{4-0};
839  bits <3> Rx8;
840  let Inst{18-16} = Rx8{2-0};
841}
842class Enc_3d5b28 : OpcodeHexagon {
843  bits <5> Rss32;
844  let Inst{20-16} = Rss32{4-0};
845  bits <5> Rt32;
846  let Inst{12-8} = Rt32{4-0};
847  bits <5> Rd32;
848  let Inst{4-0} = Rd32{4-0};
849}
850class Enc_3d6d37 : OpcodeHexagon {
851  bits <2> Qs4;
852  let Inst{6-5} = Qs4{1-0};
853  bits <5> Rt32;
854  let Inst{20-16} = Rt32{4-0};
855  bits <1> Mu2;
856  let Inst{13-13} = Mu2{0-0};
857  bits <5> Vvv32;
858  let Inst{12-8} = Vvv32{4-0};
859  bits <5> Vw32;
860  let Inst{4-0} = Vw32{4-0};
861}
862class Enc_3d920a : OpcodeHexagon {
863  bits <6> Ii;
864  let Inst{8-5} = Ii{5-2};
865  bits <5> Rd32;
866  let Inst{4-0} = Rd32{4-0};
867  bits <5> Rx32;
868  let Inst{20-16} = Rx32{4-0};
869}
870class Enc_3dac0b : OpcodeHexagon {
871  bits <2> Qt4;
872  let Inst{6-5} = Qt4{1-0};
873  bits <5> Vu32;
874  let Inst{12-8} = Vu32{4-0};
875  bits <5> Vv32;
876  let Inst{20-16} = Vv32{4-0};
877  bits <5> Vdd32;
878  let Inst{4-0} = Vdd32{4-0};
879}
880class Enc_3e3989 : OpcodeHexagon {
881  bits <11> Ii;
882  let Inst{21-20} = Ii{10-9};
883  let Inst{7-1} = Ii{8-2};
884  bits <4> Rs16;
885  let Inst{19-16} = Rs16{3-0};
886  bits <6> n1;
887  let Inst{28-28} = n1{5-5};
888  let Inst{25-22} = n1{4-1};
889  let Inst{8-8} = n1{0-0};
890}
891class Enc_3f97c8 : OpcodeHexagon {
892  bits <6> Ii;
893  let Inst{6-3} = Ii{5-2};
894  bits <1> Mu2;
895  let Inst{13-13} = Mu2{0-0};
896  bits <3> Nt8;
897  let Inst{10-8} = Nt8{2-0};
898  bits <5> Rx32;
899  let Inst{20-16} = Rx32{4-0};
900}
901class Enc_3fc427 : OpcodeHexagon {
902  bits <5> Vu32;
903  let Inst{12-8} = Vu32{4-0};
904  bits <5> Vv32;
905  let Inst{20-16} = Vv32{4-0};
906  bits <5> Vxx32;
907  let Inst{4-0} = Vxx32{4-0};
908}
909class Enc_403871 : OpcodeHexagon {
910  bits <5> Rx32;
911  let Inst{20-16} = Rx32{4-0};
912}
913class Enc_405228 : OpcodeHexagon {
914  bits <11> Ii;
915  let Inst{21-20} = Ii{10-9};
916  let Inst{7-1} = Ii{8-2};
917  bits <4> Rs16;
918  let Inst{19-16} = Rs16{3-0};
919  bits <3> n1;
920  let Inst{28-28} = n1{2-2};
921  let Inst{24-23} = n1{1-0};
922}
923class Enc_412ff0 : OpcodeHexagon {
924  bits <5> Rss32;
925  let Inst{20-16} = Rss32{4-0};
926  bits <5> Ru32;
927  let Inst{4-0} = Ru32{4-0};
928  bits <5> Rxx32;
929  let Inst{12-8} = Rxx32{4-0};
930}
931class Enc_420cf3 : OpcodeHexagon {
932  bits <6> Ii;
933  let Inst{22-21} = Ii{5-4};
934  let Inst{13-13} = Ii{3-3};
935  let Inst{7-5} = Ii{2-0};
936  bits <5> Ru32;
937  let Inst{4-0} = Ru32{4-0};
938  bits <5> Rs32;
939  let Inst{20-16} = Rs32{4-0};
940  bits <5> Rd32;
941  let Inst{12-8} = Rd32{4-0};
942}
943class Enc_437f33 : OpcodeHexagon {
944  bits <5> Rs32;
945  let Inst{20-16} = Rs32{4-0};
946  bits <5> Rt32;
947  let Inst{12-8} = Rt32{4-0};
948  bits <2> Pu4;
949  let Inst{6-5} = Pu4{1-0};
950  bits <5> Rx32;
951  let Inst{4-0} = Rx32{4-0};
952}
953class Enc_44215c : OpcodeHexagon {
954  bits <6> Ii;
955  let Inst{17-16} = Ii{5-4};
956  let Inst{6-3} = Ii{3-0};
957  bits <2> Pv4;
958  let Inst{1-0} = Pv4{1-0};
959  bits <3> Nt8;
960  let Inst{10-8} = Nt8{2-0};
961}
962class Enc_44271f : OpcodeHexagon {
963  bits <5> Gs32;
964  let Inst{20-16} = Gs32{4-0};
965  bits <5> Rd32;
966  let Inst{4-0} = Rd32{4-0};
967}
968class Enc_44661f : OpcodeHexagon {
969  bits <1> Mu2;
970  let Inst{13-13} = Mu2{0-0};
971  bits <5> Rx32;
972  let Inst{20-16} = Rx32{4-0};
973}
974class Enc_448f7f : OpcodeHexagon {
975  bits <11> Ii;
976  let Inst{26-25} = Ii{10-9};
977  let Inst{13-13} = Ii{8-8};
978  let Inst{7-0} = Ii{7-0};
979  bits <5> Rs32;
980  let Inst{20-16} = Rs32{4-0};
981  bits <5> Rt32;
982  let Inst{12-8} = Rt32{4-0};
983}
984class Enc_45364e : OpcodeHexagon {
985  bits <5> Vu32;
986  let Inst{12-8} = Vu32{4-0};
987  bits <5> Vv32;
988  let Inst{20-16} = Vv32{4-0};
989  bits <5> Vd32;
990  let Inst{4-0} = Vd32{4-0};
991}
992class Enc_454a26 : OpcodeHexagon {
993  bits <2> Pt4;
994  let Inst{9-8} = Pt4{1-0};
995  bits <2> Ps4;
996  let Inst{17-16} = Ps4{1-0};
997  bits <2> Pd4;
998  let Inst{1-0} = Pd4{1-0};
999}
1000class Enc_46c951 : OpcodeHexagon {
1001  bits <6> Ii;
1002  let Inst{12-7} = Ii{5-0};
1003  bits <5> II;
1004  let Inst{4-0} = II{4-0};
1005  bits <5> Rs32;
1006  let Inst{20-16} = Rs32{4-0};
1007}
1008class Enc_46f33d : OpcodeHexagon {
1009  bits <5> Rss32;
1010  let Inst{20-16} = Rss32{4-0};
1011  bits <5> Rt32;
1012  let Inst{12-8} = Rt32{4-0};
1013}
1014class Enc_47ee5e : OpcodeHexagon {
1015  bits <2> Ii;
1016  let Inst{13-13} = Ii{1-1};
1017  let Inst{7-7} = Ii{0-0};
1018  bits <2> Pv4;
1019  let Inst{6-5} = Pv4{1-0};
1020  bits <5> Rs32;
1021  let Inst{20-16} = Rs32{4-0};
1022  bits <5> Ru32;
1023  let Inst{12-8} = Ru32{4-0};
1024  bits <3> Nt8;
1025  let Inst{2-0} = Nt8{2-0};
1026}
1027class Enc_47ef61 : OpcodeHexagon {
1028  bits <3> Ii;
1029  let Inst{7-5} = Ii{2-0};
1030  bits <5> Rt32;
1031  let Inst{12-8} = Rt32{4-0};
1032  bits <5> Rs32;
1033  let Inst{20-16} = Rs32{4-0};
1034  bits <5> Rd32;
1035  let Inst{4-0} = Rd32{4-0};
1036}
1037class Enc_48b75f : OpcodeHexagon {
1038  bits <5> Rs32;
1039  let Inst{20-16} = Rs32{4-0};
1040  bits <2> Pd4;
1041  let Inst{1-0} = Pd4{1-0};
1042}
1043class Enc_4aca3a : OpcodeHexagon {
1044  bits <11> Ii;
1045  let Inst{21-20} = Ii{10-9};
1046  let Inst{7-1} = Ii{8-2};
1047  bits <3> Ns8;
1048  let Inst{18-16} = Ns8{2-0};
1049  bits <3> n1;
1050  let Inst{29-29} = n1{2-2};
1051  let Inst{26-25} = n1{1-0};
1052}
1053class Enc_4b39e4 : OpcodeHexagon {
1054  bits <3> Ii;
1055  let Inst{7-5} = Ii{2-0};
1056  bits <5> Vu32;
1057  let Inst{12-8} = Vu32{4-0};
1058  bits <5> Vv32;
1059  let Inst{20-16} = Vv32{4-0};
1060  bits <5> Vdd32;
1061  let Inst{4-0} = Vdd32{4-0};
1062}
1063class Enc_4dc228 : OpcodeHexagon {
1064  bits <9> Ii;
1065  let Inst{12-8} = Ii{8-4};
1066  let Inst{4-3} = Ii{3-2};
1067  bits <10> II;
1068  let Inst{20-16} = II{9-5};
1069  let Inst{7-5} = II{4-2};
1070  let Inst{1-0} = II{1-0};
1071}
1072class Enc_4df4e9 : OpcodeHexagon {
1073  bits <11> Ii;
1074  let Inst{26-25} = Ii{10-9};
1075  let Inst{13-13} = Ii{8-8};
1076  let Inst{7-0} = Ii{7-0};
1077  bits <5> Rs32;
1078  let Inst{20-16} = Rs32{4-0};
1079  bits <3> Nt8;
1080  let Inst{10-8} = Nt8{2-0};
1081}
1082class Enc_4dff07 : OpcodeHexagon {
1083  bits <2> Qv4;
1084  let Inst{12-11} = Qv4{1-0};
1085  bits <1> Mu2;
1086  let Inst{13-13} = Mu2{0-0};
1087  bits <5> Vs32;
1088  let Inst{4-0} = Vs32{4-0};
1089  bits <5> Rx32;
1090  let Inst{20-16} = Rx32{4-0};
1091}
1092class Enc_4e4a80 : OpcodeHexagon {
1093  bits <2> Qs4;
1094  let Inst{6-5} = Qs4{1-0};
1095  bits <5> Rt32;
1096  let Inst{20-16} = Rt32{4-0};
1097  bits <1> Mu2;
1098  let Inst{13-13} = Mu2{0-0};
1099  bits <5> Vvv32;
1100  let Inst{4-0} = Vvv32{4-0};
1101}
1102class Enc_4f4ed7 : OpcodeHexagon {
1103  bits <18> Ii;
1104  let Inst{26-25} = Ii{17-16};
1105  let Inst{20-16} = Ii{15-11};
1106  let Inst{13-5} = Ii{10-2};
1107  bits <5> Rd32;
1108  let Inst{4-0} = Rd32{4-0};
1109}
1110class Enc_4f677b : OpcodeHexagon {
1111  bits <2> Ii;
1112  let Inst{13-13} = Ii{1-1};
1113  let Inst{7-7} = Ii{0-0};
1114  bits <6> II;
1115  let Inst{11-8} = II{5-2};
1116  let Inst{6-5} = II{1-0};
1117  bits <5> Rt32;
1118  let Inst{20-16} = Rt32{4-0};
1119  bits <5> Rd32;
1120  let Inst{4-0} = Rd32{4-0};
1121}
1122class Enc_500cb0 : OpcodeHexagon {
1123  bits <5> Vu32;
1124  let Inst{12-8} = Vu32{4-0};
1125  bits <5> Vxx32;
1126  let Inst{4-0} = Vxx32{4-0};
1127}
1128class Enc_509701 : OpcodeHexagon {
1129  bits <19> Ii;
1130  let Inst{26-25} = Ii{18-17};
1131  let Inst{20-16} = Ii{16-12};
1132  let Inst{13-5} = Ii{11-3};
1133  bits <5> Rdd32;
1134  let Inst{4-0} = Rdd32{4-0};
1135}
1136class Enc_50b5ac : OpcodeHexagon {
1137  bits <6> Ii;
1138  let Inst{17-16} = Ii{5-4};
1139  let Inst{6-3} = Ii{3-0};
1140  bits <2> Pv4;
1141  let Inst{1-0} = Pv4{1-0};
1142  bits <5> Rtt32;
1143  let Inst{12-8} = Rtt32{4-0};
1144}
1145class Enc_50e578 : OpcodeHexagon {
1146  bits <5> Vu32;
1147  let Inst{12-8} = Vu32{4-0};
1148  bits <5> Rs32;
1149  let Inst{20-16} = Rs32{4-0};
1150  bits <5> Rd32;
1151  let Inst{4-0} = Rd32{4-0};
1152}
1153class Enc_5138b3 : OpcodeHexagon {
1154  bits <5> Vu32;
1155  let Inst{12-8} = Vu32{4-0};
1156  bits <5> Rt32;
1157  let Inst{20-16} = Rt32{4-0};
1158  bits <5> Vx32;
1159  let Inst{4-0} = Vx32{4-0};
1160}
1161class Enc_51436c : OpcodeHexagon {
1162  bits <16> Ii;
1163  let Inst{23-22} = Ii{15-14};
1164  let Inst{13-0} = Ii{13-0};
1165  bits <5> Rx32;
1166  let Inst{20-16} = Rx32{4-0};
1167}
1168class Enc_51635c : OpcodeHexagon {
1169  bits <7> Ii;
1170  let Inst{8-4} = Ii{6-2};
1171  bits <4> Rd16;
1172  let Inst{3-0} = Rd16{3-0};
1173}
1174class Enc_527412 : OpcodeHexagon {
1175  bits <2> Ps4;
1176  let Inst{17-16} = Ps4{1-0};
1177  bits <2> Pt4;
1178  let Inst{9-8} = Pt4{1-0};
1179  bits <5> Rd32;
1180  let Inst{4-0} = Rd32{4-0};
1181}
1182class Enc_52a5dd : OpcodeHexagon {
1183  bits <4> Ii;
1184  let Inst{6-3} = Ii{3-0};
1185  bits <2> Pv4;
1186  let Inst{1-0} = Pv4{1-0};
1187  bits <3> Nt8;
1188  let Inst{10-8} = Nt8{2-0};
1189  bits <5> Rx32;
1190  let Inst{20-16} = Rx32{4-0};
1191}
1192class Enc_53dca9 : OpcodeHexagon {
1193  bits <6> Ii;
1194  let Inst{11-8} = Ii{5-2};
1195  bits <4> Rs16;
1196  let Inst{7-4} = Rs16{3-0};
1197  bits <4> Rd16;
1198  let Inst{3-0} = Rd16{3-0};
1199}
1200class Enc_541f26 : OpcodeHexagon {
1201  bits <18> Ii;
1202  let Inst{26-25} = Ii{17-16};
1203  let Inst{20-16} = Ii{15-11};
1204  let Inst{13-13} = Ii{10-10};
1205  let Inst{7-0} = Ii{9-2};
1206  bits <5> Rt32;
1207  let Inst{12-8} = Rt32{4-0};
1208}
1209class Enc_55355c : OpcodeHexagon {
1210  bits <2> Ii;
1211  let Inst{13-13} = Ii{1-1};
1212  let Inst{7-7} = Ii{0-0};
1213  bits <5> Rs32;
1214  let Inst{20-16} = Rs32{4-0};
1215  bits <5> Ru32;
1216  let Inst{12-8} = Ru32{4-0};
1217  bits <5> Rtt32;
1218  let Inst{4-0} = Rtt32{4-0};
1219}
1220class Enc_569cfe : OpcodeHexagon {
1221  bits <5> Rt32;
1222  let Inst{20-16} = Rt32{4-0};
1223  bits <5> Vx32;
1224  let Inst{4-0} = Vx32{4-0};
1225}
1226class Enc_57a33e : OpcodeHexagon {
1227  bits <9> Ii;
1228  let Inst{13-13} = Ii{8-8};
1229  let Inst{7-3} = Ii{7-3};
1230  bits <2> Pv4;
1231  let Inst{1-0} = Pv4{1-0};
1232  bits <5> Rs32;
1233  let Inst{20-16} = Rs32{4-0};
1234  bits <5> Rtt32;
1235  let Inst{12-8} = Rtt32{4-0};
1236}
1237class Enc_585242 : OpcodeHexagon {
1238  bits <6> Ii;
1239  let Inst{13-13} = Ii{5-5};
1240  let Inst{7-3} = Ii{4-0};
1241  bits <2> Pv4;
1242  let Inst{1-0} = Pv4{1-0};
1243  bits <5> Rs32;
1244  let Inst{20-16} = Rs32{4-0};
1245  bits <3> Nt8;
1246  let Inst{10-8} = Nt8{2-0};
1247}
1248class Enc_58a8bf : OpcodeHexagon {
1249  bits <3> Ii;
1250  let Inst{10-8} = Ii{2-0};
1251  bits <2> Pv4;
1252  let Inst{12-11} = Pv4{1-0};
1253  bits <5> Vd32;
1254  let Inst{4-0} = Vd32{4-0};
1255  bits <5> Rx32;
1256  let Inst{20-16} = Rx32{4-0};
1257}
1258class Enc_598f6c : OpcodeHexagon {
1259  bits <5> Rtt32;
1260  let Inst{12-8} = Rtt32{4-0};
1261}
1262class Enc_5a18b3 : OpcodeHexagon {
1263  bits <11> Ii;
1264  let Inst{21-20} = Ii{10-9};
1265  let Inst{7-1} = Ii{8-2};
1266  bits <3> Ns8;
1267  let Inst{18-16} = Ns8{2-0};
1268  bits <5> n1;
1269  let Inst{29-29} = n1{4-4};
1270  let Inst{26-25} = n1{3-2};
1271  let Inst{22-22} = n1{1-1};
1272  let Inst{13-13} = n1{0-0};
1273}
1274class Enc_5ab2be : OpcodeHexagon {
1275  bits <5> Rs32;
1276  let Inst{20-16} = Rs32{4-0};
1277  bits <5> Rt32;
1278  let Inst{12-8} = Rt32{4-0};
1279  bits <5> Rd32;
1280  let Inst{4-0} = Rd32{4-0};
1281}
1282class Enc_5bdd42 : OpcodeHexagon {
1283  bits <7> Ii;
1284  let Inst{8-5} = Ii{6-3};
1285  bits <5> Rdd32;
1286  let Inst{4-0} = Rdd32{4-0};
1287  bits <5> Rx32;
1288  let Inst{20-16} = Rx32{4-0};
1289}
1290class Enc_5c124a : OpcodeHexagon {
1291  bits <19> Ii;
1292  let Inst{26-25} = Ii{18-17};
1293  let Inst{20-16} = Ii{16-12};
1294  let Inst{13-13} = Ii{11-11};
1295  let Inst{7-0} = Ii{10-3};
1296  bits <5> Rtt32;
1297  let Inst{12-8} = Rtt32{4-0};
1298}
1299class Enc_5ccba9 : OpcodeHexagon {
1300  bits <8> Ii;
1301  let Inst{12-7} = Ii{7-2};
1302  bits <6> II;
1303  let Inst{13-13} = II{5-5};
1304  let Inst{4-0} = II{4-0};
1305  bits <2> Pv4;
1306  let Inst{6-5} = Pv4{1-0};
1307  bits <5> Rs32;
1308  let Inst{20-16} = Rs32{4-0};
1309}
1310class Enc_5cd7e9 : OpcodeHexagon {
1311  bits <12> Ii;
1312  let Inst{26-25} = Ii{11-10};
1313  let Inst{13-5} = Ii{9-1};
1314  bits <5> Rs32;
1315  let Inst{20-16} = Rs32{4-0};
1316  bits <5> Ryy32;
1317  let Inst{4-0} = Ryy32{4-0};
1318}
1319class Enc_5d6c34 : OpcodeHexagon {
1320  bits <6> Ii;
1321  let Inst{13-8} = Ii{5-0};
1322  bits <5> Rs32;
1323  let Inst{20-16} = Rs32{4-0};
1324  bits <2> Pd4;
1325  let Inst{1-0} = Pd4{1-0};
1326}
1327class Enc_5de85f : OpcodeHexagon {
1328  bits <11> Ii;
1329  let Inst{21-20} = Ii{10-9};
1330  let Inst{7-1} = Ii{8-2};
1331  bits <5> Rt32;
1332  let Inst{12-8} = Rt32{4-0};
1333  bits <3> Ns8;
1334  let Inst{18-16} = Ns8{2-0};
1335}
1336class Enc_5e2823 : OpcodeHexagon {
1337  bits <5> Rs32;
1338  let Inst{20-16} = Rs32{4-0};
1339  bits <5> Rd32;
1340  let Inst{4-0} = Rd32{4-0};
1341}
1342class Enc_5e8512 : OpcodeHexagon {
1343  bits <5> Vu32;
1344  let Inst{12-8} = Vu32{4-0};
1345  bits <5> Rt32;
1346  let Inst{20-16} = Rt32{4-0};
1347  bits <5> Vxx32;
1348  let Inst{4-0} = Vxx32{4-0};
1349}
1350class Enc_5e87ce : OpcodeHexagon {
1351  bits <16> Ii;
1352  let Inst{23-22} = Ii{15-14};
1353  let Inst{20-16} = Ii{13-9};
1354  let Inst{13-5} = Ii{8-0};
1355  bits <5> Rd32;
1356  let Inst{4-0} = Rd32{4-0};
1357}
1358class Enc_5eac98 : OpcodeHexagon {
1359  bits <6> Ii;
1360  let Inst{13-8} = Ii{5-0};
1361  bits <5> Rss32;
1362  let Inst{20-16} = Rss32{4-0};
1363  bits <5> Rdd32;
1364  let Inst{4-0} = Rdd32{4-0};
1365}
1366class Enc_5eb169 : OpcodeHexagon {
1367  bits <3> Ii;
1368  let Inst{10-8} = Ii{2-0};
1369  bits <5> Vdd32;
1370  let Inst{4-0} = Vdd32{4-0};
1371  bits <5> Rx32;
1372  let Inst{20-16} = Rx32{4-0};
1373}
1374class Enc_607661 : OpcodeHexagon {
1375  bits <6> Ii;
1376  let Inst{12-7} = Ii{5-0};
1377  bits <5> Rd32;
1378  let Inst{4-0} = Rd32{4-0};
1379}
1380class Enc_6185fe : OpcodeHexagon {
1381  bits <2> Ii;
1382  let Inst{13-13} = Ii{1-1};
1383  let Inst{7-7} = Ii{0-0};
1384  bits <6> II;
1385  let Inst{11-8} = II{5-2};
1386  let Inst{6-5} = II{1-0};
1387  bits <5> Rt32;
1388  let Inst{20-16} = Rt32{4-0};
1389  bits <5> Rdd32;
1390  let Inst{4-0} = Rdd32{4-0};
1391}
1392class Enc_61f0b0 : OpcodeHexagon {
1393  bits <5> Rs32;
1394  let Inst{20-16} = Rs32{4-0};
1395  bits <5> Rt32;
1396  let Inst{12-8} = Rt32{4-0};
1397  bits <5> Rxx32;
1398  let Inst{4-0} = Rxx32{4-0};
1399}
1400class Enc_621fba : OpcodeHexagon {
1401  bits <5> Rs32;
1402  let Inst{20-16} = Rs32{4-0};
1403  bits <5> Gd32;
1404  let Inst{4-0} = Gd32{4-0};
1405}
1406class Enc_625deb : OpcodeHexagon {
1407  bits <4> Ii;
1408  let Inst{10-8} = Ii{3-1};
1409  bits <4> Rs16;
1410  let Inst{7-4} = Rs16{3-0};
1411  bits <4> Rt16;
1412  let Inst{3-0} = Rt16{3-0};
1413}
1414class Enc_6339d5 : OpcodeHexagon {
1415  bits <2> Ii;
1416  let Inst{13-13} = Ii{1-1};
1417  let Inst{7-7} = Ii{0-0};
1418  bits <2> Pv4;
1419  let Inst{6-5} = Pv4{1-0};
1420  bits <5> Rs32;
1421  let Inst{20-16} = Rs32{4-0};
1422  bits <5> Ru32;
1423  let Inst{12-8} = Ru32{4-0};
1424  bits <5> Rt32;
1425  let Inst{4-0} = Rt32{4-0};
1426}
1427class Enc_634460 : OpcodeHexagon {
1428  bits <4> Ii;
1429  let Inst{13-13} = Ii{3-3};
1430  let Inst{10-8} = Ii{2-0};
1431  bits <5> Rt32;
1432  let Inst{20-16} = Rt32{4-0};
1433  bits <5> Vdd32;
1434  let Inst{4-0} = Vdd32{4-0};
1435}
1436class Enc_63eaeb : OpcodeHexagon {
1437  bits <2> Ii;
1438  let Inst{1-0} = Ii{1-0};
1439  bits <4> Rs16;
1440  let Inst{7-4} = Rs16{3-0};
1441}
1442class Enc_6413b6 : OpcodeHexagon {
1443  bits <11> Ii;
1444  let Inst{21-20} = Ii{10-9};
1445  let Inst{7-1} = Ii{8-2};
1446  bits <3> Ns8;
1447  let Inst{18-16} = Ns8{2-0};
1448  bits <5> n1;
1449  let Inst{29-29} = n1{4-4};
1450  let Inst{26-25} = n1{3-2};
1451  let Inst{23-23} = n1{1-1};
1452  let Inst{13-13} = n1{0-0};
1453}
1454class Enc_645d54 : OpcodeHexagon {
1455  bits <2> Ii;
1456  let Inst{13-13} = Ii{1-1};
1457  let Inst{5-5} = Ii{0-0};
1458  bits <5> Rss32;
1459  let Inst{20-16} = Rss32{4-0};
1460  bits <5> Rt32;
1461  let Inst{12-8} = Rt32{4-0};
1462  bits <5> Rdd32;
1463  let Inst{4-0} = Rdd32{4-0};
1464}
1465class Enc_65d691 : OpcodeHexagon {
1466  bits <2> Ps4;
1467  let Inst{17-16} = Ps4{1-0};
1468  bits <2> Pd4;
1469  let Inst{1-0} = Pd4{1-0};
1470}
1471class Enc_65f095 : OpcodeHexagon {
1472  bits <6> Ii;
1473  let Inst{6-3} = Ii{5-2};
1474  bits <2> Pv4;
1475  let Inst{1-0} = Pv4{1-0};
1476  bits <3> Nt8;
1477  let Inst{10-8} = Nt8{2-0};
1478  bits <5> Rx32;
1479  let Inst{20-16} = Rx32{4-0};
1480}
1481class Enc_667b39 : OpcodeHexagon {
1482  bits <5> Css32;
1483  let Inst{20-16} = Css32{4-0};
1484  bits <5> Rdd32;
1485  let Inst{4-0} = Rdd32{4-0};
1486}
1487class Enc_668704 : OpcodeHexagon {
1488  bits <11> Ii;
1489  let Inst{21-20} = Ii{10-9};
1490  let Inst{7-1} = Ii{8-2};
1491  bits <4> Rs16;
1492  let Inst{19-16} = Rs16{3-0};
1493  bits <5> n1;
1494  let Inst{28-28} = n1{4-4};
1495  let Inst{25-22} = n1{3-0};
1496}
1497class Enc_66bce1 : OpcodeHexagon {
1498  bits <11> Ii;
1499  let Inst{21-20} = Ii{10-9};
1500  let Inst{7-1} = Ii{8-2};
1501  bits <4> Rs16;
1502  let Inst{19-16} = Rs16{3-0};
1503  bits <4> Rd16;
1504  let Inst{11-8} = Rd16{3-0};
1505}
1506class Enc_690862 : OpcodeHexagon {
1507  bits <13> Ii;
1508  let Inst{26-25} = Ii{12-11};
1509  let Inst{13-13} = Ii{10-10};
1510  let Inst{7-0} = Ii{9-2};
1511  bits <5> Rs32;
1512  let Inst{20-16} = Rs32{4-0};
1513  bits <3> Nt8;
1514  let Inst{10-8} = Nt8{2-0};
1515}
1516class Enc_691712 : OpcodeHexagon {
1517  bits <2> Pv4;
1518  let Inst{12-11} = Pv4{1-0};
1519  bits <1> Mu2;
1520  let Inst{13-13} = Mu2{0-0};
1521  bits <5> Rx32;
1522  let Inst{20-16} = Rx32{4-0};
1523}
1524class Enc_69d63b : OpcodeHexagon {
1525  bits <11> Ii;
1526  let Inst{21-20} = Ii{10-9};
1527  let Inst{7-1} = Ii{8-2};
1528  bits <3> Ns8;
1529  let Inst{18-16} = Ns8{2-0};
1530}
1531class Enc_6a5972 : OpcodeHexagon {
1532  bits <11> Ii;
1533  let Inst{21-20} = Ii{10-9};
1534  let Inst{7-1} = Ii{8-2};
1535  bits <4> Rs16;
1536  let Inst{19-16} = Rs16{3-0};
1537  bits <4> Rt16;
1538  let Inst{11-8} = Rt16{3-0};
1539}
1540class Enc_6b197f : OpcodeHexagon {
1541  bits <4> Ii;
1542  let Inst{8-5} = Ii{3-0};
1543  bits <5> Ryy32;
1544  let Inst{4-0} = Ryy32{4-0};
1545  bits <5> Rx32;
1546  let Inst{20-16} = Rx32{4-0};
1547}
1548class Enc_6baed4 : OpcodeHexagon {
1549  bits <3> Ii;
1550  let Inst{10-8} = Ii{2-0};
1551  bits <2> Pv4;
1552  let Inst{12-11} = Pv4{1-0};
1553  bits <5> Rx32;
1554  let Inst{20-16} = Rx32{4-0};
1555}
1556class Enc_6c9440 : OpcodeHexagon {
1557  bits <10> Ii;
1558  let Inst{21-21} = Ii{9-9};
1559  let Inst{13-5} = Ii{8-0};
1560  bits <5> Rd32;
1561  let Inst{4-0} = Rd32{4-0};
1562}
1563class Enc_6c9ee0 : OpcodeHexagon {
1564  bits <3> Ii;
1565  let Inst{10-8} = Ii{2-0};
1566  bits <5> Rx32;
1567  let Inst{20-16} = Rx32{4-0};
1568}
1569class Enc_6f70ca : OpcodeHexagon {
1570  bits <8> Ii;
1571  let Inst{8-4} = Ii{7-3};
1572}
1573class Enc_6f83e7 : OpcodeHexagon {
1574  bits <2> Qv4;
1575  let Inst{23-22} = Qv4{1-0};
1576  bits <5> Vd32;
1577  let Inst{4-0} = Vd32{4-0};
1578}
1579class Enc_70b24b : OpcodeHexagon {
1580  bits <6> Ii;
1581  let Inst{8-5} = Ii{5-2};
1582  bits <1> Mu2;
1583  let Inst{13-13} = Mu2{0-0};
1584  bits <5> Rdd32;
1585  let Inst{4-0} = Rdd32{4-0};
1586  bits <5> Rx32;
1587  let Inst{20-16} = Rx32{4-0};
1588}
1589class Enc_70fb07 : OpcodeHexagon {
1590  bits <6> Ii;
1591  let Inst{13-8} = Ii{5-0};
1592  bits <5> Rss32;
1593  let Inst{20-16} = Rss32{4-0};
1594  bits <5> Rxx32;
1595  let Inst{4-0} = Rxx32{4-0};
1596}
1597class Enc_71bb9b : OpcodeHexagon {
1598  bits <5> Vu32;
1599  let Inst{12-8} = Vu32{4-0};
1600  bits <5> Vv32;
1601  let Inst{20-16} = Vv32{4-0};
1602  bits <5> Vdd32;
1603  let Inst{4-0} = Vdd32{4-0};
1604}
1605class Enc_71f1b4 : OpcodeHexagon {
1606  bits <6> Ii;
1607  let Inst{8-5} = Ii{5-2};
1608  bits <5> Rdd32;
1609  let Inst{4-0} = Rdd32{4-0};
1610  bits <5> Rx32;
1611  let Inst{20-16} = Rx32{4-0};
1612}
1613class Enc_7222b7 : OpcodeHexagon {
1614  bits <5> Rt32;
1615  let Inst{20-16} = Rt32{4-0};
1616  bits <2> Qd4;
1617  let Inst{1-0} = Qd4{1-0};
1618}
1619class Enc_724154 : OpcodeHexagon {
1620  bits <6> II;
1621  let Inst{5-0} = II{5-0};
1622  bits <3> Nt8;
1623  let Inst{10-8} = Nt8{2-0};
1624  bits <5> Re32;
1625  let Inst{20-16} = Re32{4-0};
1626}
1627class Enc_729ff7 : OpcodeHexagon {
1628  bits <3> Ii;
1629  let Inst{7-5} = Ii{2-0};
1630  bits <5> Rtt32;
1631  let Inst{12-8} = Rtt32{4-0};
1632  bits <5> Rss32;
1633  let Inst{20-16} = Rss32{4-0};
1634  bits <5> Rdd32;
1635  let Inst{4-0} = Rdd32{4-0};
1636}
1637class Enc_733b27 : OpcodeHexagon {
1638  bits <5> Ii;
1639  let Inst{8-5} = Ii{4-1};
1640  bits <2> Pt4;
1641  let Inst{10-9} = Pt4{1-0};
1642  bits <5> Rd32;
1643  let Inst{4-0} = Rd32{4-0};
1644  bits <5> Rx32;
1645  let Inst{20-16} = Rx32{4-0};
1646}
1647class Enc_736575 : OpcodeHexagon {
1648  bits <11> Ii;
1649  let Inst{21-20} = Ii{10-9};
1650  let Inst{7-1} = Ii{8-2};
1651  bits <4> Rs16;
1652  let Inst{19-16} = Rs16{3-0};
1653  bits <4> n1;
1654  let Inst{28-28} = n1{3-3};
1655  let Inst{25-23} = n1{2-0};
1656}
1657class Enc_74aef2 : OpcodeHexagon {
1658  bits <4> Ii;
1659  let Inst{8-5} = Ii{3-0};
1660  bits <1> Mu2;
1661  let Inst{13-13} = Mu2{0-0};
1662  bits <5> Ryy32;
1663  let Inst{4-0} = Ryy32{4-0};
1664  bits <5> Rx32;
1665  let Inst{20-16} = Rx32{4-0};
1666}
1667class Enc_74d4e5 : OpcodeHexagon {
1668  bits <1> Mu2;
1669  let Inst{13-13} = Mu2{0-0};
1670  bits <5> Rd32;
1671  let Inst{4-0} = Rd32{4-0};
1672  bits <5> Rx32;
1673  let Inst{20-16} = Rx32{4-0};
1674}
1675class Enc_770858 : OpcodeHexagon {
1676  bits <2> Ps4;
1677  let Inst{6-5} = Ps4{1-0};
1678  bits <5> Vu32;
1679  let Inst{12-8} = Vu32{4-0};
1680  bits <5> Vd32;
1681  let Inst{4-0} = Vd32{4-0};
1682}
1683class Enc_784502 : OpcodeHexagon {
1684  bits <3> Ii;
1685  let Inst{10-8} = Ii{2-0};
1686  bits <2> Pv4;
1687  let Inst{12-11} = Pv4{1-0};
1688  bits <3> Os8;
1689  let Inst{2-0} = Os8{2-0};
1690  bits <5> Rx32;
1691  let Inst{20-16} = Rx32{4-0};
1692}
1693class Enc_78cbf0 : OpcodeHexagon {
1694  bits <18> Ii;
1695  let Inst{26-25} = Ii{17-16};
1696  let Inst{20-16} = Ii{15-11};
1697  let Inst{13-13} = Ii{10-10};
1698  let Inst{7-0} = Ii{9-2};
1699  bits <3> Nt8;
1700  let Inst{10-8} = Nt8{2-0};
1701}
1702class Enc_78e566 : OpcodeHexagon {
1703  bits <2> Pt4;
1704  let Inst{9-8} = Pt4{1-0};
1705  bits <5> Rdd32;
1706  let Inst{4-0} = Rdd32{4-0};
1707}
1708class Enc_79b8c8 : OpcodeHexagon {
1709  bits <6> Ii;
1710  let Inst{6-3} = Ii{5-2};
1711  bits <1> Mu2;
1712  let Inst{13-13} = Mu2{0-0};
1713  bits <5> Rt32;
1714  let Inst{12-8} = Rt32{4-0};
1715  bits <5> Rx32;
1716  let Inst{20-16} = Rx32{4-0};
1717}
1718class Enc_7a0ea6 : OpcodeHexagon {
1719  bits <4> Rd16;
1720  let Inst{3-0} = Rd16{3-0};
1721  bits <1> n1;
1722  let Inst{9-9} = n1{0-0};
1723}
1724class Enc_7b523d : OpcodeHexagon {
1725  bits <5> Vu32;
1726  let Inst{12-8} = Vu32{4-0};
1727  bits <5> Vv32;
1728  let Inst{23-19} = Vv32{4-0};
1729  bits <3> Rt8;
1730  let Inst{18-16} = Rt8{2-0};
1731  bits <5> Vxx32;
1732  let Inst{4-0} = Vxx32{4-0};
1733}
1734class Enc_7b7ba8 : OpcodeHexagon {
1735  bits <2> Qu4;
1736  let Inst{9-8} = Qu4{1-0};
1737  bits <5> Rt32;
1738  let Inst{20-16} = Rt32{4-0};
1739  bits <5> Vd32;
1740  let Inst{4-0} = Vd32{4-0};
1741}
1742class Enc_7d1542 : OpcodeHexagon {
1743  bits <7> Ss128;
1744  let Inst{22-16} = Ss128{6-0};
1745  bits <5> Rd32;
1746  let Inst{4-0} = Rd32{4-0};
1747}
1748class Enc_7e5a82 : OpcodeHexagon {
1749  bits <5> Ii;
1750  let Inst{12-8} = Ii{4-0};
1751  bits <5> Rss32;
1752  let Inst{20-16} = Rss32{4-0};
1753  bits <5> Rdd32;
1754  let Inst{4-0} = Rdd32{4-0};
1755}
1756class Enc_7eaeb6 : OpcodeHexagon {
1757  bits <6> Ii;
1758  let Inst{6-3} = Ii{5-2};
1759  bits <2> Pv4;
1760  let Inst{1-0} = Pv4{1-0};
1761  bits <5> Rt32;
1762  let Inst{12-8} = Rt32{4-0};
1763  bits <5> Rx32;
1764  let Inst{20-16} = Rx32{4-0};
1765}
1766class Enc_7eb485 : OpcodeHexagon {
1767  bits <2> Ii;
1768  let Inst{13-13} = Ii{1-1};
1769  let Inst{6-6} = Ii{0-0};
1770  bits <6> II;
1771  let Inst{5-0} = II{5-0};
1772  bits <5> Ru32;
1773  let Inst{20-16} = Ru32{4-0};
1774  bits <3> Nt8;
1775  let Inst{10-8} = Nt8{2-0};
1776}
1777class Enc_7eee72 : OpcodeHexagon {
1778  bits <1> Mu2;
1779  let Inst{13-13} = Mu2{0-0};
1780  bits <5> Rdd32;
1781  let Inst{4-0} = Rdd32{4-0};
1782  bits <5> Rx32;
1783  let Inst{20-16} = Rx32{4-0};
1784}
1785class Enc_7f1a05 : OpcodeHexagon {
1786  bits <5> Ru32;
1787  let Inst{4-0} = Ru32{4-0};
1788  bits <5> Rs32;
1789  let Inst{20-16} = Rs32{4-0};
1790  bits <5> Ry32;
1791  let Inst{12-8} = Ry32{4-0};
1792}
1793class Enc_7fa7f6 : OpcodeHexagon {
1794  bits <6> II;
1795  let Inst{11-8} = II{5-2};
1796  let Inst{6-5} = II{1-0};
1797  bits <5> Rdd32;
1798  let Inst{4-0} = Rdd32{4-0};
1799  bits <5> Re32;
1800  let Inst{20-16} = Re32{4-0};
1801}
1802class Enc_800e04 : OpcodeHexagon {
1803  bits <11> Ii;
1804  let Inst{21-20} = Ii{10-9};
1805  let Inst{7-1} = Ii{8-2};
1806  bits <4> Rs16;
1807  let Inst{19-16} = Rs16{3-0};
1808  bits <6> n1;
1809  let Inst{28-28} = n1{5-5};
1810  let Inst{25-22} = n1{4-1};
1811  let Inst{13-13} = n1{0-0};
1812}
1813class Enc_80296d : OpcodeHexagon {
1814  bits <5> Rs32;
1815  let Inst{12-8} = Rs32{4-0};
1816  bits <5> Rtt32;
1817  let Inst{20-16} = Rtt32{4-0};
1818  bits <5> Rd32;
1819  let Inst{4-0} = Rd32{4-0};
1820}
1821class Enc_802dc0 : OpcodeHexagon {
1822  bits <1> Ii;
1823  let Inst{8-8} = Ii{0-0};
1824  bits <2> Qv4;
1825  let Inst{23-22} = Qv4{1-0};
1826}
1827class Enc_81ac1d : OpcodeHexagon {
1828  bits <24> Ii;
1829  let Inst{24-16} = Ii{23-15};
1830  let Inst{13-1} = Ii{14-2};
1831}
1832class Enc_8203bb : OpcodeHexagon {
1833  bits <6> Ii;
1834  let Inst{12-7} = Ii{5-0};
1835  bits <8> II;
1836  let Inst{13-13} = II{7-7};
1837  let Inst{6-0} = II{6-0};
1838  bits <5> Rs32;
1839  let Inst{20-16} = Rs32{4-0};
1840}
1841class Enc_829a68 : OpcodeHexagon {
1842  bits <1> Mu2;
1843  let Inst{13-13} = Mu2{0-0};
1844  bits <5> Vdd32;
1845  let Inst{4-0} = Vdd32{4-0};
1846  bits <5> Rx32;
1847  let Inst{20-16} = Rx32{4-0};
1848}
1849class Enc_830e5d : OpcodeHexagon {
1850  bits <8> Ii;
1851  let Inst{12-5} = Ii{7-0};
1852  bits <8> II;
1853  let Inst{22-16} = II{7-1};
1854  let Inst{13-13} = II{0-0};
1855  bits <2> Pu4;
1856  let Inst{24-23} = Pu4{1-0};
1857  bits <5> Rd32;
1858  let Inst{4-0} = Rd32{4-0};
1859}
1860class Enc_831a7d : OpcodeHexagon {
1861  bits <5> Rss32;
1862  let Inst{20-16} = Rss32{4-0};
1863  bits <5> Rtt32;
1864  let Inst{12-8} = Rtt32{4-0};
1865  bits <5> Rxx32;
1866  let Inst{4-0} = Rxx32{4-0};
1867  bits <2> Pe4;
1868  let Inst{6-5} = Pe4{1-0};
1869}
1870class Enc_83ee64 : OpcodeHexagon {
1871  bits <5> Ii;
1872  let Inst{12-8} = Ii{4-0};
1873  bits <5> Rs32;
1874  let Inst{20-16} = Rs32{4-0};
1875  bits <2> Pd4;
1876  let Inst{1-0} = Pd4{1-0};
1877}
1878class Enc_84b2cd : OpcodeHexagon {
1879  bits <8> Ii;
1880  let Inst{12-7} = Ii{7-2};
1881  bits <5> II;
1882  let Inst{4-0} = II{4-0};
1883  bits <5> Rs32;
1884  let Inst{20-16} = Rs32{4-0};
1885}
1886class Enc_84bff1 : OpcodeHexagon {
1887  bits <2> Ii;
1888  let Inst{13-13} = Ii{1-1};
1889  let Inst{7-7} = Ii{0-0};
1890  bits <5> Rs32;
1891  let Inst{20-16} = Rs32{4-0};
1892  bits <5> Rt32;
1893  let Inst{12-8} = Rt32{4-0};
1894  bits <5> Rdd32;
1895  let Inst{4-0} = Rdd32{4-0};
1896}
1897class Enc_84d359 : OpcodeHexagon {
1898  bits <4> Ii;
1899  let Inst{3-0} = Ii{3-0};
1900  bits <4> Rs16;
1901  let Inst{7-4} = Rs16{3-0};
1902}
1903class Enc_85bf58 : OpcodeHexagon {
1904  bits <7> Ii;
1905  let Inst{6-3} = Ii{6-3};
1906  bits <5> Rtt32;
1907  let Inst{12-8} = Rtt32{4-0};
1908  bits <5> Rx32;
1909  let Inst{20-16} = Rx32{4-0};
1910}
1911class Enc_864a5a : OpcodeHexagon {
1912  bits <9> Ii;
1913  let Inst{12-8} = Ii{8-4};
1914  let Inst{4-3} = Ii{3-2};
1915  bits <5> Rs32;
1916  let Inst{20-16} = Rs32{4-0};
1917}
1918class Enc_865390 : OpcodeHexagon {
1919  bits <3> Ii;
1920  let Inst{10-8} = Ii{2-0};
1921  bits <2> Pv4;
1922  let Inst{12-11} = Pv4{1-0};
1923  bits <5> Vs32;
1924  let Inst{4-0} = Vs32{4-0};
1925  bits <5> Rx32;
1926  let Inst{20-16} = Rx32{4-0};
1927}
1928class Enc_86a14b : OpcodeHexagon {
1929  bits <8> Ii;
1930  let Inst{7-3} = Ii{7-3};
1931  bits <3> Rdd8;
1932  let Inst{2-0} = Rdd8{2-0};
1933}
1934class Enc_87c142 : OpcodeHexagon {
1935  bits <7> Ii;
1936  let Inst{8-4} = Ii{6-2};
1937  bits <4> Rt16;
1938  let Inst{3-0} = Rt16{3-0};
1939}
1940class Enc_88c16c : OpcodeHexagon {
1941  bits <5> Rss32;
1942  let Inst{20-16} = Rss32{4-0};
1943  bits <5> Rtt32;
1944  let Inst{12-8} = Rtt32{4-0};
1945  bits <5> Rxx32;
1946  let Inst{4-0} = Rxx32{4-0};
1947}
1948class Enc_88d4d9 : OpcodeHexagon {
1949  bits <2> Pu4;
1950  let Inst{9-8} = Pu4{1-0};
1951  bits <5> Rs32;
1952  let Inst{20-16} = Rs32{4-0};
1953}
1954class Enc_890909 : OpcodeHexagon {
1955  bits <5> Rs32;
1956  let Inst{20-16} = Rs32{4-0};
1957  bits <5> Rd32;
1958  let Inst{4-0} = Rd32{4-0};
1959  bits <2> Pe4;
1960  let Inst{6-5} = Pe4{1-0};
1961}
1962class Enc_895bd9 : OpcodeHexagon {
1963  bits <2> Qu4;
1964  let Inst{9-8} = Qu4{1-0};
1965  bits <5> Rt32;
1966  let Inst{20-16} = Rt32{4-0};
1967  bits <5> Vx32;
1968  let Inst{4-0} = Vx32{4-0};
1969}
1970class Enc_8b8927 : OpcodeHexagon {
1971  bits <5> Rt32;
1972  let Inst{20-16} = Rt32{4-0};
1973  bits <1> Mu2;
1974  let Inst{13-13} = Mu2{0-0};
1975  bits <5> Vv32;
1976  let Inst{4-0} = Vv32{4-0};
1977}
1978class Enc_8b8d61 : OpcodeHexagon {
1979  bits <6> Ii;
1980  let Inst{22-21} = Ii{5-4};
1981  let Inst{13-13} = Ii{3-3};
1982  let Inst{7-5} = Ii{2-0};
1983  bits <5> Rs32;
1984  let Inst{20-16} = Rs32{4-0};
1985  bits <5> Ru32;
1986  let Inst{4-0} = Ru32{4-0};
1987  bits <5> Rd32;
1988  let Inst{12-8} = Rd32{4-0};
1989}
1990class Enc_8bcba4 : OpcodeHexagon {
1991  bits <6> II;
1992  let Inst{5-0} = II{5-0};
1993  bits <5> Rt32;
1994  let Inst{12-8} = Rt32{4-0};
1995  bits <5> Re32;
1996  let Inst{20-16} = Re32{4-0};
1997}
1998class Enc_8c2412 : OpcodeHexagon {
1999  bits <2> Ps4;
2000  let Inst{6-5} = Ps4{1-0};
2001  bits <5> Vu32;
2002  let Inst{12-8} = Vu32{4-0};
2003  bits <5> Vv32;
2004  let Inst{20-16} = Vv32{4-0};
2005  bits <5> Vdd32;
2006  let Inst{4-0} = Vdd32{4-0};
2007}
2008class Enc_8c6530 : OpcodeHexagon {
2009  bits <5> Rtt32;
2010  let Inst{12-8} = Rtt32{4-0};
2011  bits <5> Rss32;
2012  let Inst{20-16} = Rss32{4-0};
2013  bits <2> Pu4;
2014  let Inst{6-5} = Pu4{1-0};
2015  bits <5> Rdd32;
2016  let Inst{4-0} = Rdd32{4-0};
2017}
2018class Enc_8d8a30 : OpcodeHexagon {
2019  bits <4> Ii;
2020  let Inst{13-13} = Ii{3-3};
2021  let Inst{10-8} = Ii{2-0};
2022  bits <2> Pv4;
2023  let Inst{12-11} = Pv4{1-0};
2024  bits <5> Rt32;
2025  let Inst{20-16} = Rt32{4-0};
2026  bits <5> Vd32;
2027  let Inst{4-0} = Vd32{4-0};
2028}
2029class Enc_8dbdfe : OpcodeHexagon {
2030  bits <8> Ii;
2031  let Inst{13-13} = Ii{7-7};
2032  let Inst{7-3} = Ii{6-2};
2033  bits <2> Pv4;
2034  let Inst{1-0} = Pv4{1-0};
2035  bits <5> Rs32;
2036  let Inst{20-16} = Rs32{4-0};
2037  bits <3> Nt8;
2038  let Inst{10-8} = Nt8{2-0};
2039}
2040class Enc_8dbe85 : OpcodeHexagon {
2041  bits <1> Mu2;
2042  let Inst{13-13} = Mu2{0-0};
2043  bits <3> Nt8;
2044  let Inst{10-8} = Nt8{2-0};
2045  bits <5> Rx32;
2046  let Inst{20-16} = Rx32{4-0};
2047}
2048class Enc_8dec2e : OpcodeHexagon {
2049  bits <5> Ii;
2050  let Inst{12-8} = Ii{4-0};
2051  bits <5> Rss32;
2052  let Inst{20-16} = Rss32{4-0};
2053  bits <5> Rd32;
2054  let Inst{4-0} = Rd32{4-0};
2055}
2056class Enc_8df4be : OpcodeHexagon {
2057  bits <17> Ii;
2058  let Inst{26-25} = Ii{16-15};
2059  let Inst{20-16} = Ii{14-10};
2060  let Inst{13-5} = Ii{9-1};
2061  bits <5> Rd32;
2062  let Inst{4-0} = Rd32{4-0};
2063}
2064class Enc_8e583a : OpcodeHexagon {
2065  bits <11> Ii;
2066  let Inst{21-20} = Ii{10-9};
2067  let Inst{7-1} = Ii{8-2};
2068  bits <4> Rs16;
2069  let Inst{19-16} = Rs16{3-0};
2070  bits <5> n1;
2071  let Inst{28-28} = n1{4-4};
2072  let Inst{25-23} = n1{3-1};
2073  let Inst{13-13} = n1{0-0};
2074}
2075class Enc_8f7633 : OpcodeHexagon {
2076  bits <5> Rs32;
2077  let Inst{20-16} = Rs32{4-0};
2078  bits <7> Sd128;
2079  let Inst{6-0} = Sd128{6-0};
2080}
2081class Enc_90cd8b : OpcodeHexagon {
2082  bits <5> Rss32;
2083  let Inst{20-16} = Rss32{4-0};
2084  bits <5> Rd32;
2085  let Inst{4-0} = Rd32{4-0};
2086}
2087class Enc_91b9fe : OpcodeHexagon {
2088  bits <5> Ii;
2089  let Inst{6-3} = Ii{4-1};
2090  bits <1> Mu2;
2091  let Inst{13-13} = Mu2{0-0};
2092  bits <3> Nt8;
2093  let Inst{10-8} = Nt8{2-0};
2094  bits <5> Rx32;
2095  let Inst{20-16} = Rx32{4-0};
2096}
2097class Enc_927852 : OpcodeHexagon {
2098  bits <5> Rss32;
2099  let Inst{20-16} = Rss32{4-0};
2100  bits <5> Rt32;
2101  let Inst{12-8} = Rt32{4-0};
2102  bits <5> Rdd32;
2103  let Inst{4-0} = Rdd32{4-0};
2104}
2105class Enc_928ca1 : OpcodeHexagon {
2106  bits <1> Mu2;
2107  let Inst{13-13} = Mu2{0-0};
2108  bits <5> Rtt32;
2109  let Inst{12-8} = Rtt32{4-0};
2110  bits <5> Rx32;
2111  let Inst{20-16} = Rx32{4-0};
2112}
2113class Enc_935d9b : OpcodeHexagon {
2114  bits <5> Ii;
2115  let Inst{6-3} = Ii{4-1};
2116  bits <1> Mu2;
2117  let Inst{13-13} = Mu2{0-0};
2118  bits <5> Rt32;
2119  let Inst{12-8} = Rt32{4-0};
2120  bits <5> Rx32;
2121  let Inst{20-16} = Rx32{4-0};
2122}
2123class Enc_93af4c : OpcodeHexagon {
2124  bits <7> Ii;
2125  let Inst{10-4} = Ii{6-0};
2126  bits <4> Rx16;
2127  let Inst{3-0} = Rx16{3-0};
2128}
2129class Enc_95441f : OpcodeHexagon {
2130  bits <5> Vu32;
2131  let Inst{12-8} = Vu32{4-0};
2132  bits <5> Vv32;
2133  let Inst{20-16} = Vv32{4-0};
2134  bits <2> Qd4;
2135  let Inst{1-0} = Qd4{1-0};
2136}
2137class Enc_96ce4f : OpcodeHexagon {
2138  bits <4> Ii;
2139  let Inst{6-3} = Ii{3-0};
2140  bits <1> Mu2;
2141  let Inst{13-13} = Mu2{0-0};
2142  bits <3> Nt8;
2143  let Inst{10-8} = Nt8{2-0};
2144  bits <5> Rx32;
2145  let Inst{20-16} = Rx32{4-0};
2146}
2147class Enc_97d666 : OpcodeHexagon {
2148  bits <4> Rs16;
2149  let Inst{7-4} = Rs16{3-0};
2150  bits <4> Rd16;
2151  let Inst{3-0} = Rd16{3-0};
2152}
2153class Enc_989021 : OpcodeHexagon {
2154  bits <5> Rt32;
2155  let Inst{20-16} = Rt32{4-0};
2156  bits <5> Vy32;
2157  let Inst{12-8} = Vy32{4-0};
2158  bits <5> Vx32;
2159  let Inst{4-0} = Vx32{4-0};
2160}
2161class Enc_98c0b8 : OpcodeHexagon {
2162  bits <2> Ii;
2163  let Inst{13-13} = Ii{1-1};
2164  let Inst{7-7} = Ii{0-0};
2165  bits <2> Pv4;
2166  let Inst{6-5} = Pv4{1-0};
2167  bits <5> Rs32;
2168  let Inst{20-16} = Rs32{4-0};
2169  bits <5> Rt32;
2170  let Inst{12-8} = Rt32{4-0};
2171  bits <5> Rdd32;
2172  let Inst{4-0} = Rdd32{4-0};
2173}
2174class Enc_9a33d5 : OpcodeHexagon {
2175  bits <7> Ii;
2176  let Inst{6-3} = Ii{6-3};
2177  bits <2> Pv4;
2178  let Inst{1-0} = Pv4{1-0};
2179  bits <5> Rtt32;
2180  let Inst{12-8} = Rtt32{4-0};
2181  bits <5> Rx32;
2182  let Inst{20-16} = Rx32{4-0};
2183}
2184class Enc_9ac432 : OpcodeHexagon {
2185  bits <2> Ps4;
2186  let Inst{17-16} = Ps4{1-0};
2187  bits <2> Pt4;
2188  let Inst{9-8} = Pt4{1-0};
2189  bits <2> Pu4;
2190  let Inst{7-6} = Pu4{1-0};
2191  bits <2> Pd4;
2192  let Inst{1-0} = Pd4{1-0};
2193}
2194class Enc_9b0bc1 : OpcodeHexagon {
2195  bits <2> Pu4;
2196  let Inst{6-5} = Pu4{1-0};
2197  bits <5> Rt32;
2198  let Inst{12-8} = Rt32{4-0};
2199  bits <5> Rs32;
2200  let Inst{20-16} = Rs32{4-0};
2201  bits <5> Rd32;
2202  let Inst{4-0} = Rd32{4-0};
2203}
2204class Enc_9be1de : OpcodeHexagon {
2205  bits <2> Qs4;
2206  let Inst{6-5} = Qs4{1-0};
2207  bits <5> Rt32;
2208  let Inst{20-16} = Rt32{4-0};
2209  bits <1> Mu2;
2210  let Inst{13-13} = Mu2{0-0};
2211  bits <5> Vv32;
2212  let Inst{12-8} = Vv32{4-0};
2213  bits <5> Vw32;
2214  let Inst{4-0} = Vw32{4-0};
2215}
2216class Enc_9cdba7 : OpcodeHexagon {
2217  bits <8> Ii;
2218  let Inst{12-5} = Ii{7-0};
2219  bits <5> Rs32;
2220  let Inst{20-16} = Rs32{4-0};
2221  bits <5> Rdd32;
2222  let Inst{4-0} = Rdd32{4-0};
2223}
2224class Enc_9d1247 : OpcodeHexagon {
2225  bits <7> Ii;
2226  let Inst{8-5} = Ii{6-3};
2227  bits <2> Pt4;
2228  let Inst{10-9} = Pt4{1-0};
2229  bits <5> Rdd32;
2230  let Inst{4-0} = Rdd32{4-0};
2231  bits <5> Rx32;
2232  let Inst{20-16} = Rx32{4-0};
2233}
2234class Enc_9e2e1c : OpcodeHexagon {
2235  bits <5> Ii;
2236  let Inst{8-5} = Ii{4-1};
2237  bits <1> Mu2;
2238  let Inst{13-13} = Mu2{0-0};
2239  bits <5> Ryy32;
2240  let Inst{4-0} = Ryy32{4-0};
2241  bits <5> Rx32;
2242  let Inst{20-16} = Rx32{4-0};
2243}
2244class Enc_9e4c3f : OpcodeHexagon {
2245  bits <6> II;
2246  let Inst{13-8} = II{5-0};
2247  bits <11> Ii;
2248  let Inst{21-20} = Ii{10-9};
2249  let Inst{7-1} = Ii{8-2};
2250  bits <4> Rd16;
2251  let Inst{19-16} = Rd16{3-0};
2252}
2253class Enc_9e9047 : OpcodeHexagon {
2254  bits <2> Pt4;
2255  let Inst{9-8} = Pt4{1-0};
2256  bits <5> Rs32;
2257  let Inst{20-16} = Rs32{4-0};
2258}
2259class Enc_9ea4cf : OpcodeHexagon {
2260  bits <2> Ii;
2261  let Inst{13-13} = Ii{1-1};
2262  let Inst{6-6} = Ii{0-0};
2263  bits <6> II;
2264  let Inst{5-0} = II{5-0};
2265  bits <5> Ru32;
2266  let Inst{20-16} = Ru32{4-0};
2267  bits <5> Rt32;
2268  let Inst{12-8} = Rt32{4-0};
2269}
2270class Enc_9fae8a : OpcodeHexagon {
2271  bits <6> Ii;
2272  let Inst{13-8} = Ii{5-0};
2273  bits <5> Rs32;
2274  let Inst{20-16} = Rs32{4-0};
2275  bits <5> Rd32;
2276  let Inst{4-0} = Rd32{4-0};
2277}
2278class Enc_a05677 : OpcodeHexagon {
2279  bits <5> Ii;
2280  let Inst{12-8} = Ii{4-0};
2281  bits <5> Rs32;
2282  let Inst{20-16} = Rs32{4-0};
2283  bits <5> Rd32;
2284  let Inst{4-0} = Rd32{4-0};
2285}
2286class Enc_a1640c : OpcodeHexagon {
2287  bits <6> Ii;
2288  let Inst{13-8} = Ii{5-0};
2289  bits <5> Rss32;
2290  let Inst{20-16} = Rss32{4-0};
2291  bits <5> Rd32;
2292  let Inst{4-0} = Rd32{4-0};
2293}
2294class Enc_a198f6 : OpcodeHexagon {
2295  bits <7> Ii;
2296  let Inst{10-5} = Ii{6-1};
2297  bits <2> Pt4;
2298  let Inst{12-11} = Pt4{1-0};
2299  bits <5> Rs32;
2300  let Inst{20-16} = Rs32{4-0};
2301  bits <5> Rd32;
2302  let Inst{4-0} = Rd32{4-0};
2303}
2304class Enc_a1e29d : OpcodeHexagon {
2305  bits <5> Ii;
2306  let Inst{12-8} = Ii{4-0};
2307  bits <5> II;
2308  let Inst{22-21} = II{4-3};
2309  let Inst{7-5} = II{2-0};
2310  bits <5> Rs32;
2311  let Inst{20-16} = Rs32{4-0};
2312  bits <5> Rx32;
2313  let Inst{4-0} = Rx32{4-0};
2314}
2315class Enc_a21d47 : OpcodeHexagon {
2316  bits <6> Ii;
2317  let Inst{10-5} = Ii{5-0};
2318  bits <2> Pt4;
2319  let Inst{12-11} = Pt4{1-0};
2320  bits <5> Rs32;
2321  let Inst{20-16} = Rs32{4-0};
2322  bits <5> Rd32;
2323  let Inst{4-0} = Rd32{4-0};
2324}
2325class Enc_a255dc : OpcodeHexagon {
2326  bits <3> Ii;
2327  let Inst{10-8} = Ii{2-0};
2328  bits <5> Vd32;
2329  let Inst{4-0} = Vd32{4-0};
2330  bits <5> Rx32;
2331  let Inst{20-16} = Rx32{4-0};
2332}
2333class Enc_a27588 : OpcodeHexagon {
2334  bits <11> Ii;
2335  let Inst{26-25} = Ii{10-9};
2336  let Inst{13-5} = Ii{8-0};
2337  bits <5> Rs32;
2338  let Inst{20-16} = Rs32{4-0};
2339  bits <5> Ryy32;
2340  let Inst{4-0} = Ryy32{4-0};
2341}
2342class Enc_a30110 : OpcodeHexagon {
2343  bits <5> Vu32;
2344  let Inst{12-8} = Vu32{4-0};
2345  bits <5> Vv32;
2346  let Inst{23-19} = Vv32{4-0};
2347  bits <3> Rt8;
2348  let Inst{18-16} = Rt8{2-0};
2349  bits <5> Vd32;
2350  let Inst{4-0} = Vd32{4-0};
2351}
2352class Enc_a33d04 : OpcodeHexagon {
2353  bits <5> Vuu32;
2354  let Inst{12-8} = Vuu32{4-0};
2355  bits <5> Vd32;
2356  let Inst{4-0} = Vd32{4-0};
2357}
2358class Enc_a42857 : OpcodeHexagon {
2359  bits <11> Ii;
2360  let Inst{21-20} = Ii{10-9};
2361  let Inst{7-1} = Ii{8-2};
2362  bits <4> Rs16;
2363  let Inst{19-16} = Rs16{3-0};
2364  bits <5> n1;
2365  let Inst{28-28} = n1{4-4};
2366  let Inst{24-22} = n1{3-1};
2367  let Inst{8-8} = n1{0-0};
2368}
2369class Enc_a4ef14 : OpcodeHexagon {
2370  bits <5> Rd32;
2371  let Inst{4-0} = Rd32{4-0};
2372}
2373class Enc_a51a9a : OpcodeHexagon {
2374  bits <8> Ii;
2375  let Inst{12-8} = Ii{7-3};
2376  let Inst{4-2} = Ii{2-0};
2377}
2378class Enc_a56825 : OpcodeHexagon {
2379  bits <5> Rss32;
2380  let Inst{20-16} = Rss32{4-0};
2381  bits <5> Rtt32;
2382  let Inst{12-8} = Rtt32{4-0};
2383  bits <5> Rdd32;
2384  let Inst{4-0} = Rdd32{4-0};
2385}
2386class Enc_a568d4 : OpcodeHexagon {
2387  bits <5> Rt32;
2388  let Inst{12-8} = Rt32{4-0};
2389  bits <5> Rs32;
2390  let Inst{20-16} = Rs32{4-0};
2391  bits <5> Rx32;
2392  let Inst{4-0} = Rx32{4-0};
2393}
2394class Enc_a5ed8a : OpcodeHexagon {
2395  bits <5> Rt32;
2396  let Inst{20-16} = Rt32{4-0};
2397  bits <5> Vd32;
2398  let Inst{4-0} = Vd32{4-0};
2399}
2400class Enc_a641d0 : OpcodeHexagon {
2401  bits <5> Rt32;
2402  let Inst{20-16} = Rt32{4-0};
2403  bits <1> Mu2;
2404  let Inst{13-13} = Mu2{0-0};
2405  bits <5> Vvv32;
2406  let Inst{12-8} = Vvv32{4-0};
2407  bits <5> Vw32;
2408  let Inst{4-0} = Vw32{4-0};
2409}
2410class Enc_a6853f : OpcodeHexagon {
2411  bits <11> Ii;
2412  let Inst{21-20} = Ii{10-9};
2413  let Inst{7-1} = Ii{8-2};
2414  bits <3> Ns8;
2415  let Inst{18-16} = Ns8{2-0};
2416  bits <6> n1;
2417  let Inst{29-29} = n1{5-5};
2418  let Inst{26-25} = n1{4-3};
2419  let Inst{23-22} = n1{2-1};
2420  let Inst{13-13} = n1{0-0};
2421}
2422class Enc_a6ce9c : OpcodeHexagon {
2423  bits <6> Ii;
2424  let Inst{3-0} = Ii{5-2};
2425  bits <4> Rs16;
2426  let Inst{7-4} = Rs16{3-0};
2427}
2428class Enc_a705fc : OpcodeHexagon {
2429  bits <5> Rss32;
2430  let Inst{20-16} = Rss32{4-0};
2431  bits <7> Sdd128;
2432  let Inst{6-0} = Sdd128{6-0};
2433}
2434class Enc_a7341a : OpcodeHexagon {
2435  bits <5> Vu32;
2436  let Inst{12-8} = Vu32{4-0};
2437  bits <5> Vv32;
2438  let Inst{20-16} = Vv32{4-0};
2439  bits <5> Vx32;
2440  let Inst{4-0} = Vx32{4-0};
2441}
2442class Enc_a75aa6 : OpcodeHexagon {
2443  bits <5> Rs32;
2444  let Inst{20-16} = Rs32{4-0};
2445  bits <5> Rt32;
2446  let Inst{12-8} = Rt32{4-0};
2447  bits <1> Mu2;
2448  let Inst{13-13} = Mu2{0-0};
2449}
2450class Enc_a7b8e8 : OpcodeHexagon {
2451  bits <6> Ii;
2452  let Inst{22-21} = Ii{5-4};
2453  let Inst{13-13} = Ii{3-3};
2454  let Inst{7-5} = Ii{2-0};
2455  bits <5> Rs32;
2456  let Inst{20-16} = Rs32{4-0};
2457  bits <5> Rt32;
2458  let Inst{12-8} = Rt32{4-0};
2459  bits <5> Rd32;
2460  let Inst{4-0} = Rd32{4-0};
2461}
2462class Enc_a803e0 : OpcodeHexagon {
2463  bits <7> Ii;
2464  let Inst{12-7} = Ii{6-1};
2465  bits <8> II;
2466  let Inst{13-13} = II{7-7};
2467  let Inst{6-0} = II{6-0};
2468  bits <5> Rs32;
2469  let Inst{20-16} = Rs32{4-0};
2470}
2471class Enc_a90628 : OpcodeHexagon {
2472  bits <2> Qv4;
2473  let Inst{23-22} = Qv4{1-0};
2474  bits <5> Vu32;
2475  let Inst{12-8} = Vu32{4-0};
2476  bits <5> Vx32;
2477  let Inst{4-0} = Vx32{4-0};
2478}
2479class Enc_a94f3b : OpcodeHexagon {
2480  bits <5> Rs32;
2481  let Inst{20-16} = Rs32{4-0};
2482  bits <5> Rt32;
2483  let Inst{12-8} = Rt32{4-0};
2484  bits <5> Rd32;
2485  let Inst{4-0} = Rd32{4-0};
2486  bits <2> Pe4;
2487  let Inst{6-5} = Pe4{1-0};
2488}
2489class Enc_aad80c : OpcodeHexagon {
2490  bits <5> Vuu32;
2491  let Inst{12-8} = Vuu32{4-0};
2492  bits <5> Rt32;
2493  let Inst{20-16} = Rt32{4-0};
2494  bits <5> Vdd32;
2495  let Inst{4-0} = Vdd32{4-0};
2496}
2497class Enc_acd6ed : OpcodeHexagon {
2498  bits <9> Ii;
2499  let Inst{10-5} = Ii{8-3};
2500  bits <2> Pt4;
2501  let Inst{12-11} = Pt4{1-0};
2502  bits <5> Rs32;
2503  let Inst{20-16} = Rs32{4-0};
2504  bits <5> Rdd32;
2505  let Inst{4-0} = Rdd32{4-0};
2506}
2507class Enc_ad1831 : OpcodeHexagon {
2508  bits <16> Ii;
2509  let Inst{26-25} = Ii{15-14};
2510  let Inst{20-16} = Ii{13-9};
2511  let Inst{13-13} = Ii{8-8};
2512  let Inst{7-0} = Ii{7-0};
2513  bits <3> Nt8;
2514  let Inst{10-8} = Nt8{2-0};
2515}
2516class Enc_ad1c74 : OpcodeHexagon {
2517  bits <11> Ii;
2518  let Inst{21-20} = Ii{10-9};
2519  let Inst{7-1} = Ii{8-2};
2520  bits <4> Rs16;
2521  let Inst{19-16} = Rs16{3-0};
2522}
2523class Enc_ad9bef : OpcodeHexagon {
2524  bits <5> Vu32;
2525  let Inst{12-8} = Vu32{4-0};
2526  bits <5> Rtt32;
2527  let Inst{20-16} = Rtt32{4-0};
2528  bits <5> Vxx32;
2529  let Inst{4-0} = Vxx32{4-0};
2530}
2531class Enc_adf111 : OpcodeHexagon {
2532  bits <5> Vu32;
2533  let Inst{12-8} = Vu32{4-0};
2534  bits <5> Rt32;
2535  let Inst{20-16} = Rt32{4-0};
2536  bits <2> Qx4;
2537  let Inst{1-0} = Qx4{1-0};
2538}
2539class Enc_b00112 : OpcodeHexagon {
2540  bits <5> Rss32;
2541  let Inst{20-16} = Rss32{4-0};
2542  bits <5> Rtt32;
2543  let Inst{12-8} = Rtt32{4-0};
2544}
2545class Enc_b025d6 : OpcodeHexagon {
2546  bits <3> Ii;
2547  let Inst{10-8} = Ii{2-0};
2548  bits <5> Vss32;
2549  let Inst{4-0} = Vss32{4-0};
2550  bits <5> Rx32;
2551  let Inst{20-16} = Rx32{4-0};
2552}
2553class Enc_b05839 : OpcodeHexagon {
2554  bits <7> Ii;
2555  let Inst{8-5} = Ii{6-3};
2556  bits <1> Mu2;
2557  let Inst{13-13} = Mu2{0-0};
2558  bits <5> Rdd32;
2559  let Inst{4-0} = Rdd32{4-0};
2560  bits <5> Rx32;
2561  let Inst{20-16} = Rx32{4-0};
2562}
2563class Enc_b087ac : OpcodeHexagon {
2564  bits <5> Vu32;
2565  let Inst{12-8} = Vu32{4-0};
2566  bits <5> Rt32;
2567  let Inst{20-16} = Rt32{4-0};
2568  bits <5> Vd32;
2569  let Inst{4-0} = Vd32{4-0};
2570}
2571class Enc_b0e9d8 : OpcodeHexagon {
2572  bits <10> Ii;
2573  let Inst{21-21} = Ii{9-9};
2574  let Inst{13-5} = Ii{8-0};
2575  bits <5> Rs32;
2576  let Inst{20-16} = Rs32{4-0};
2577  bits <5> Rx32;
2578  let Inst{4-0} = Rx32{4-0};
2579}
2580class Enc_b15941 : OpcodeHexagon {
2581  bits <4> Ii;
2582  let Inst{6-3} = Ii{3-0};
2583  bits <1> Mu2;
2584  let Inst{13-13} = Mu2{0-0};
2585  bits <5> Rt32;
2586  let Inst{12-8} = Rt32{4-0};
2587  bits <5> Rx32;
2588  let Inst{20-16} = Rx32{4-0};
2589}
2590class Enc_b1e1fb : OpcodeHexagon {
2591  bits <11> Ii;
2592  let Inst{21-20} = Ii{10-9};
2593  let Inst{7-1} = Ii{8-2};
2594  bits <4> Rs16;
2595  let Inst{19-16} = Rs16{3-0};
2596  bits <5> n1;
2597  let Inst{28-28} = n1{4-4};
2598  let Inst{25-23} = n1{3-1};
2599  let Inst{8-8} = n1{0-0};
2600}
2601class Enc_b388cf : OpcodeHexagon {
2602  bits <5> Ii;
2603  let Inst{12-8} = Ii{4-0};
2604  bits <5> II;
2605  let Inst{22-21} = II{4-3};
2606  let Inst{7-5} = II{2-0};
2607  bits <5> Rs32;
2608  let Inst{20-16} = Rs32{4-0};
2609  bits <5> Rd32;
2610  let Inst{4-0} = Rd32{4-0};
2611}
2612class Enc_b38ffc : OpcodeHexagon {
2613  bits <4> Ii;
2614  let Inst{11-8} = Ii{3-0};
2615  bits <4> Rs16;
2616  let Inst{7-4} = Rs16{3-0};
2617  bits <4> Rt16;
2618  let Inst{3-0} = Rt16{3-0};
2619}
2620class Enc_b43b67 : OpcodeHexagon {
2621  bits <5> Vu32;
2622  let Inst{12-8} = Vu32{4-0};
2623  bits <5> Vv32;
2624  let Inst{20-16} = Vv32{4-0};
2625  bits <5> Vd32;
2626  let Inst{4-0} = Vd32{4-0};
2627  bits <2> Qx4;
2628  let Inst{6-5} = Qx4{1-0};
2629}
2630class Enc_b4e6cf : OpcodeHexagon {
2631  bits <10> Ii;
2632  let Inst{21-21} = Ii{9-9};
2633  let Inst{13-5} = Ii{8-0};
2634  bits <5> Ru32;
2635  let Inst{4-0} = Ru32{4-0};
2636  bits <5> Rx32;
2637  let Inst{20-16} = Rx32{4-0};
2638}
2639class Enc_b62ef7 : OpcodeHexagon {
2640  bits <3> Ii;
2641  let Inst{10-8} = Ii{2-0};
2642  bits <5> Vs32;
2643  let Inst{4-0} = Vs32{4-0};
2644  bits <5> Rx32;
2645  let Inst{20-16} = Rx32{4-0};
2646}
2647class Enc_b72622 : OpcodeHexagon {
2648  bits <2> Ii;
2649  let Inst{13-13} = Ii{1-1};
2650  let Inst{5-5} = Ii{0-0};
2651  bits <5> Rss32;
2652  let Inst{20-16} = Rss32{4-0};
2653  bits <5> Rt32;
2654  let Inst{12-8} = Rt32{4-0};
2655  bits <5> Rxx32;
2656  let Inst{4-0} = Rxx32{4-0};
2657}
2658class Enc_b78edd : OpcodeHexagon {
2659  bits <11> Ii;
2660  let Inst{21-20} = Ii{10-9};
2661  let Inst{7-1} = Ii{8-2};
2662  bits <4> Rs16;
2663  let Inst{19-16} = Rs16{3-0};
2664  bits <4> n1;
2665  let Inst{28-28} = n1{3-3};
2666  let Inst{24-23} = n1{2-1};
2667  let Inst{8-8} = n1{0-0};
2668}
2669class Enc_b7fad3 : OpcodeHexagon {
2670  bits <2> Pv4;
2671  let Inst{9-8} = Pv4{1-0};
2672  bits <5> Rs32;
2673  let Inst{20-16} = Rs32{4-0};
2674  bits <5> Rdd32;
2675  let Inst{4-0} = Rdd32{4-0};
2676}
2677class Enc_b8309d : OpcodeHexagon {
2678  bits <9> Ii;
2679  let Inst{8-3} = Ii{8-3};
2680  bits <3> Rtt8;
2681  let Inst{2-0} = Rtt8{2-0};
2682}
2683class Enc_b84c4c : OpcodeHexagon {
2684  bits <6> Ii;
2685  let Inst{13-8} = Ii{5-0};
2686  bits <6> II;
2687  let Inst{23-21} = II{5-3};
2688  let Inst{7-5} = II{2-0};
2689  bits <5> Rss32;
2690  let Inst{20-16} = Rss32{4-0};
2691  bits <5> Rdd32;
2692  let Inst{4-0} = Rdd32{4-0};
2693}
2694class Enc_b886fd : OpcodeHexagon {
2695  bits <5> Ii;
2696  let Inst{6-3} = Ii{4-1};
2697  bits <2> Pv4;
2698  let Inst{1-0} = Pv4{1-0};
2699  bits <5> Rt32;
2700  let Inst{12-8} = Rt32{4-0};
2701  bits <5> Rx32;
2702  let Inst{20-16} = Rx32{4-0};
2703}
2704class Enc_b8c967 : OpcodeHexagon {
2705  bits <8> Ii;
2706  let Inst{12-5} = Ii{7-0};
2707  bits <5> Rs32;
2708  let Inst{20-16} = Rs32{4-0};
2709  bits <5> Rd32;
2710  let Inst{4-0} = Rd32{4-0};
2711}
2712class Enc_b909d2 : OpcodeHexagon {
2713  bits <11> Ii;
2714  let Inst{21-20} = Ii{10-9};
2715  let Inst{7-1} = Ii{8-2};
2716  bits <4> Rs16;
2717  let Inst{19-16} = Rs16{3-0};
2718  bits <7> n1;
2719  let Inst{28-28} = n1{6-6};
2720  let Inst{25-22} = n1{5-2};
2721  let Inst{13-13} = n1{1-1};
2722  let Inst{8-8} = n1{0-0};
2723}
2724class Enc_b91167 : OpcodeHexagon {
2725  bits <2> Ii;
2726  let Inst{6-5} = Ii{1-0};
2727  bits <5> Vuu32;
2728  let Inst{12-8} = Vuu32{4-0};
2729  bits <5> Vvv32;
2730  let Inst{20-16} = Vvv32{4-0};
2731  bits <5> Vdd32;
2732  let Inst{4-0} = Vdd32{4-0};
2733}
2734class Enc_b97f71 : OpcodeHexagon {
2735  bits <6> Ii;
2736  let Inst{8-5} = Ii{5-2};
2737  bits <2> Pt4;
2738  let Inst{10-9} = Pt4{1-0};
2739  bits <5> Rd32;
2740  let Inst{4-0} = Rd32{4-0};
2741  bits <5> Rx32;
2742  let Inst{20-16} = Rx32{4-0};
2743}
2744class Enc_b98b95 : OpcodeHexagon {
2745  bits <4> Ii;
2746  let Inst{13-13} = Ii{3-3};
2747  let Inst{10-8} = Ii{2-0};
2748  bits <5> Rt32;
2749  let Inst{20-16} = Rt32{4-0};
2750  bits <5> Vss32;
2751  let Inst{4-0} = Vss32{4-0};
2752}
2753class Enc_b9c5fb : OpcodeHexagon {
2754  bits <5> Rss32;
2755  let Inst{20-16} = Rss32{4-0};
2756  bits <5> Rdd32;
2757  let Inst{4-0} = Rdd32{4-0};
2758}
2759class Enc_bc03e5 : OpcodeHexagon {
2760  bits <17> Ii;
2761  let Inst{26-25} = Ii{16-15};
2762  let Inst{20-16} = Ii{14-10};
2763  let Inst{13-13} = Ii{9-9};
2764  let Inst{7-0} = Ii{8-1};
2765  bits <3> Nt8;
2766  let Inst{10-8} = Nt8{2-0};
2767}
2768class Enc_bd0b33 : OpcodeHexagon {
2769  bits <10> Ii;
2770  let Inst{21-21} = Ii{9-9};
2771  let Inst{13-5} = Ii{8-0};
2772  bits <5> Rs32;
2773  let Inst{20-16} = Rs32{4-0};
2774  bits <2> Pd4;
2775  let Inst{1-0} = Pd4{1-0};
2776}
2777class Enc_bd1cbc : OpcodeHexagon {
2778  bits <5> Ii;
2779  let Inst{8-5} = Ii{4-1};
2780  bits <5> Ryy32;
2781  let Inst{4-0} = Ryy32{4-0};
2782  bits <5> Rx32;
2783  let Inst{20-16} = Rx32{4-0};
2784}
2785class Enc_bd6011 : OpcodeHexagon {
2786  bits <5> Rt32;
2787  let Inst{12-8} = Rt32{4-0};
2788  bits <5> Rs32;
2789  let Inst{20-16} = Rs32{4-0};
2790  bits <5> Rd32;
2791  let Inst{4-0} = Rd32{4-0};
2792}
2793class Enc_bd811a : OpcodeHexagon {
2794  bits <5> Rs32;
2795  let Inst{20-16} = Rs32{4-0};
2796  bits <5> Cd32;
2797  let Inst{4-0} = Cd32{4-0};
2798}
2799class Enc_bddee3 : OpcodeHexagon {
2800  bits <5> Vu32;
2801  let Inst{12-8} = Vu32{4-0};
2802  bits <5> Vyyyy32;
2803  let Inst{4-0} = Vyyyy32{4-0};
2804  bits <3> Rx8;
2805  let Inst{18-16} = Rx8{2-0};
2806}
2807class Enc_be32a5 : OpcodeHexagon {
2808  bits <5> Rs32;
2809  let Inst{20-16} = Rs32{4-0};
2810  bits <5> Rt32;
2811  let Inst{12-8} = Rt32{4-0};
2812  bits <5> Rdd32;
2813  let Inst{4-0} = Rdd32{4-0};
2814}
2815class Enc_bea5da : OpcodeHexagon {
2816  bits <10> Ii;
2817  let Inst{17-16} = Ii{9-8};
2818  let Inst{12-8} = Ii{7-3};
2819  let Inst{4-2} = Ii{2-0};
2820}
2821class Enc_bfbf03 : OpcodeHexagon {
2822  bits <2> Qs4;
2823  let Inst{9-8} = Qs4{1-0};
2824  bits <2> Qd4;
2825  let Inst{1-0} = Qd4{1-0};
2826}
2827class Enc_c0cdde : OpcodeHexagon {
2828  bits <9> Ii;
2829  let Inst{13-5} = Ii{8-0};
2830  bits <5> Rs32;
2831  let Inst{20-16} = Rs32{4-0};
2832  bits <2> Pd4;
2833  let Inst{1-0} = Pd4{1-0};
2834}
2835class Enc_c175d0 : OpcodeHexagon {
2836  bits <4> Ii;
2837  let Inst{11-8} = Ii{3-0};
2838  bits <4> Rs16;
2839  let Inst{7-4} = Rs16{3-0};
2840  bits <4> Rd16;
2841  let Inst{3-0} = Rd16{3-0};
2842}
2843class Enc_c1d806 : OpcodeHexagon {
2844  bits <5> Vu32;
2845  let Inst{12-8} = Vu32{4-0};
2846  bits <5> Vv32;
2847  let Inst{20-16} = Vv32{4-0};
2848  bits <5> Vd32;
2849  let Inst{4-0} = Vd32{4-0};
2850  bits <2> Qe4;
2851  let Inst{6-5} = Qe4{1-0};
2852}
2853class Enc_c2b48e : OpcodeHexagon {
2854  bits <5> Rs32;
2855  let Inst{20-16} = Rs32{4-0};
2856  bits <5> Rt32;
2857  let Inst{12-8} = Rt32{4-0};
2858  bits <2> Pd4;
2859  let Inst{1-0} = Pd4{1-0};
2860}
2861class Enc_c31910 : OpcodeHexagon {
2862  bits <8> Ii;
2863  let Inst{23-21} = Ii{7-5};
2864  let Inst{13-13} = Ii{4-4};
2865  let Inst{7-5} = Ii{3-1};
2866  let Inst{3-3} = Ii{0-0};
2867  bits <5> II;
2868  let Inst{12-8} = II{4-0};
2869  bits <5> Rx32;
2870  let Inst{20-16} = Rx32{4-0};
2871}
2872class Enc_c4dc92 : OpcodeHexagon {
2873  bits <2> Qv4;
2874  let Inst{23-22} = Qv4{1-0};
2875  bits <5> Vu32;
2876  let Inst{12-8} = Vu32{4-0};
2877  bits <5> Vd32;
2878  let Inst{4-0} = Vd32{4-0};
2879}
2880class Enc_c6220b : OpcodeHexagon {
2881  bits <2> Ii;
2882  let Inst{13-13} = Ii{1-1};
2883  let Inst{7-7} = Ii{0-0};
2884  bits <5> Rs32;
2885  let Inst{20-16} = Rs32{4-0};
2886  bits <5> Ru32;
2887  let Inst{12-8} = Ru32{4-0};
2888  bits <3> Nt8;
2889  let Inst{2-0} = Nt8{2-0};
2890}
2891class Enc_c7a204 : OpcodeHexagon {
2892  bits <6> II;
2893  let Inst{5-0} = II{5-0};
2894  bits <5> Rtt32;
2895  let Inst{12-8} = Rtt32{4-0};
2896  bits <5> Re32;
2897  let Inst{20-16} = Re32{4-0};
2898}
2899class Enc_c7cd90 : OpcodeHexagon {
2900  bits <4> Ii;
2901  let Inst{6-3} = Ii{3-0};
2902  bits <3> Nt8;
2903  let Inst{10-8} = Nt8{2-0};
2904  bits <5> Rx32;
2905  let Inst{20-16} = Rx32{4-0};
2906}
2907class Enc_c85e2a : OpcodeHexagon {
2908  bits <5> Ii;
2909  let Inst{12-8} = Ii{4-0};
2910  bits <5> II;
2911  let Inst{22-21} = II{4-3};
2912  let Inst{7-5} = II{2-0};
2913  bits <5> Rd32;
2914  let Inst{4-0} = Rd32{4-0};
2915}
2916class Enc_c89067 : OpcodeHexagon {
2917  bits <5> Rtt32;
2918  let Inst{20-16} = Rtt32{4-0};
2919  bits <5> Rdd32;
2920  let Inst{4-0} = Rdd32{4-0};
2921  bits <5> Rx32;
2922  let Inst{12-8} = Rx32{4-0};
2923}
2924class Enc_c90aca : OpcodeHexagon {
2925  bits <8> Ii;
2926  let Inst{12-5} = Ii{7-0};
2927  bits <5> Rs32;
2928  let Inst{20-16} = Rs32{4-0};
2929  bits <5> Rx32;
2930  let Inst{4-0} = Rx32{4-0};
2931}
2932class Enc_c9a18e : OpcodeHexagon {
2933  bits <11> Ii;
2934  let Inst{21-20} = Ii{10-9};
2935  let Inst{7-1} = Ii{8-2};
2936  bits <3> Ns8;
2937  let Inst{18-16} = Ns8{2-0};
2938  bits <5> Rt32;
2939  let Inst{12-8} = Rt32{4-0};
2940}
2941class Enc_c9e3bc : OpcodeHexagon {
2942  bits <4> Ii;
2943  let Inst{13-13} = Ii{3-3};
2944  let Inst{10-8} = Ii{2-0};
2945  bits <5> Rt32;
2946  let Inst{20-16} = Rt32{4-0};
2947  bits <5> Vs32;
2948  let Inst{4-0} = Vs32{4-0};
2949}
2950class Enc_ca3887 : OpcodeHexagon {
2951  bits <5> Rs32;
2952  let Inst{20-16} = Rs32{4-0};
2953  bits <5> Rt32;
2954  let Inst{12-8} = Rt32{4-0};
2955}
2956class Enc_cb4b4e : OpcodeHexagon {
2957  bits <2> Pu4;
2958  let Inst{6-5} = Pu4{1-0};
2959  bits <5> Rs32;
2960  let Inst{20-16} = Rs32{4-0};
2961  bits <5> Rt32;
2962  let Inst{12-8} = Rt32{4-0};
2963  bits <5> Rdd32;
2964  let Inst{4-0} = Rdd32{4-0};
2965}
2966class Enc_cb785b : OpcodeHexagon {
2967  bits <5> Vu32;
2968  let Inst{12-8} = Vu32{4-0};
2969  bits <5> Rtt32;
2970  let Inst{20-16} = Rtt32{4-0};
2971  bits <5> Vdd32;
2972  let Inst{4-0} = Vdd32{4-0};
2973}
2974class Enc_cb9321 : OpcodeHexagon {
2975  bits <16> Ii;
2976  let Inst{27-21} = Ii{15-9};
2977  let Inst{13-5} = Ii{8-0};
2978  bits <5> Rs32;
2979  let Inst{20-16} = Rs32{4-0};
2980  bits <5> Rd32;
2981  let Inst{4-0} = Rd32{4-0};
2982}
2983class Enc_cc449f : OpcodeHexagon {
2984  bits <4> Ii;
2985  let Inst{6-3} = Ii{3-0};
2986  bits <2> Pv4;
2987  let Inst{1-0} = Pv4{1-0};
2988  bits <5> Rt32;
2989  let Inst{12-8} = Rt32{4-0};
2990  bits <5> Rx32;
2991  let Inst{20-16} = Rx32{4-0};
2992}
2993class Enc_cc857d : OpcodeHexagon {
2994  bits <5> Vuu32;
2995  let Inst{12-8} = Vuu32{4-0};
2996  bits <5> Rt32;
2997  let Inst{20-16} = Rt32{4-0};
2998  bits <5> Vx32;
2999  let Inst{4-0} = Vx32{4-0};
3000}
3001class Enc_cd4705 : OpcodeHexagon {
3002  bits <3> Ii;
3003  let Inst{7-5} = Ii{2-0};
3004  bits <5> Vu32;
3005  let Inst{12-8} = Vu32{4-0};
3006  bits <5> Vv32;
3007  let Inst{20-16} = Vv32{4-0};
3008  bits <5> Vx32;
3009  let Inst{4-0} = Vx32{4-0};
3010}
3011class Enc_cd82bc : OpcodeHexagon {
3012  bits <4> Ii;
3013  let Inst{21-21} = Ii{3-3};
3014  let Inst{7-5} = Ii{2-0};
3015  bits <6> II;
3016  let Inst{13-8} = II{5-0};
3017  bits <5> Rs32;
3018  let Inst{20-16} = Rs32{4-0};
3019  bits <5> Rx32;
3020  let Inst{4-0} = Rx32{4-0};
3021}
3022class Enc_cda00a : OpcodeHexagon {
3023  bits <12> Ii;
3024  let Inst{19-16} = Ii{11-8};
3025  let Inst{12-5} = Ii{7-0};
3026  bits <2> Pu4;
3027  let Inst{22-21} = Pu4{1-0};
3028  bits <5> Rd32;
3029  let Inst{4-0} = Rd32{4-0};
3030}
3031class Enc_ce6828 : OpcodeHexagon {
3032  bits <14> Ii;
3033  let Inst{26-25} = Ii{13-12};
3034  let Inst{13-13} = Ii{11-11};
3035  let Inst{7-0} = Ii{10-3};
3036  bits <5> Rs32;
3037  let Inst{20-16} = Rs32{4-0};
3038  bits <5> Rtt32;
3039  let Inst{12-8} = Rtt32{4-0};
3040}
3041class Enc_cf1927 : OpcodeHexagon {
3042  bits <1> Mu2;
3043  let Inst{13-13} = Mu2{0-0};
3044  bits <3> Os8;
3045  let Inst{2-0} = Os8{2-0};
3046  bits <5> Rx32;
3047  let Inst{20-16} = Rx32{4-0};
3048}
3049class Enc_d0fe02 : OpcodeHexagon {
3050  bits <5> Rxx32;
3051  let Inst{20-16} = Rxx32{4-0};
3052  bits <0> sgp10;
3053}
3054class Enc_d15d19 : OpcodeHexagon {
3055  bits <1> Mu2;
3056  let Inst{13-13} = Mu2{0-0};
3057  bits <5> Vs32;
3058  let Inst{4-0} = Vs32{4-0};
3059  bits <5> Rx32;
3060  let Inst{20-16} = Rx32{4-0};
3061}
3062class Enc_d2216a : OpcodeHexagon {
3063  bits <5> Rss32;
3064  let Inst{20-16} = Rss32{4-0};
3065  bits <5> Rtt32;
3066  let Inst{12-8} = Rtt32{4-0};
3067  bits <5> Rd32;
3068  let Inst{4-0} = Rd32{4-0};
3069}
3070class Enc_d2c7f1 : OpcodeHexagon {
3071  bits <5> Rtt32;
3072  let Inst{12-8} = Rtt32{4-0};
3073  bits <5> Rss32;
3074  let Inst{20-16} = Rss32{4-0};
3075  bits <5> Rdd32;
3076  let Inst{4-0} = Rdd32{4-0};
3077  bits <2> Pe4;
3078  let Inst{6-5} = Pe4{1-0};
3079}
3080class Enc_d44e31 : OpcodeHexagon {
3081  bits <6> Ii;
3082  let Inst{12-7} = Ii{5-0};
3083  bits <5> Rs32;
3084  let Inst{20-16} = Rs32{4-0};
3085  bits <5> Rt32;
3086  let Inst{4-0} = Rt32{4-0};
3087}
3088class Enc_d483b9 : OpcodeHexagon {
3089  bits <1> Ii;
3090  let Inst{5-5} = Ii{0-0};
3091  bits <5> Vuu32;
3092  let Inst{12-8} = Vuu32{4-0};
3093  bits <5> Rt32;
3094  let Inst{20-16} = Rt32{4-0};
3095  bits <5> Vxx32;
3096  let Inst{4-0} = Vxx32{4-0};
3097}
3098class Enc_d50cd3 : OpcodeHexagon {
3099  bits <3> Ii;
3100  let Inst{7-5} = Ii{2-0};
3101  bits <5> Rss32;
3102  let Inst{20-16} = Rss32{4-0};
3103  bits <5> Rtt32;
3104  let Inst{12-8} = Rtt32{4-0};
3105  bits <5> Rdd32;
3106  let Inst{4-0} = Rdd32{4-0};
3107}
3108class Enc_d5c73f : OpcodeHexagon {
3109  bits <1> Mu2;
3110  let Inst{13-13} = Mu2{0-0};
3111  bits <5> Rt32;
3112  let Inst{12-8} = Rt32{4-0};
3113  bits <5> Rx32;
3114  let Inst{20-16} = Rx32{4-0};
3115}
3116class Enc_d6990d : OpcodeHexagon {
3117  bits <5> Vuu32;
3118  let Inst{12-8} = Vuu32{4-0};
3119  bits <5> Rt32;
3120  let Inst{20-16} = Rt32{4-0};
3121  bits <5> Vxx32;
3122  let Inst{4-0} = Vxx32{4-0};
3123}
3124class Enc_d7a65e : OpcodeHexagon {
3125  bits <6> Ii;
3126  let Inst{12-7} = Ii{5-0};
3127  bits <6> II;
3128  let Inst{13-13} = II{5-5};
3129  let Inst{4-0} = II{4-0};
3130  bits <2> Pv4;
3131  let Inst{6-5} = Pv4{1-0};
3132  bits <5> Rs32;
3133  let Inst{20-16} = Rs32{4-0};
3134}
3135class Enc_d7bc34 : OpcodeHexagon {
3136  bits <5> Vu32;
3137  let Inst{12-8} = Vu32{4-0};
3138  bits <3> Rt8;
3139  let Inst{18-16} = Rt8{2-0};
3140  bits <5> Vyyyy32;
3141  let Inst{4-0} = Vyyyy32{4-0};
3142}
3143class Enc_d7dc10 : OpcodeHexagon {
3144  bits <5> Rs32;
3145  let Inst{20-16} = Rs32{4-0};
3146  bits <5> Rtt32;
3147  let Inst{12-8} = Rtt32{4-0};
3148  bits <2> Pd4;
3149  let Inst{1-0} = Pd4{1-0};
3150}
3151class Enc_da664b : OpcodeHexagon {
3152  bits <2> Ii;
3153  let Inst{13-13} = Ii{1-1};
3154  let Inst{7-7} = Ii{0-0};
3155  bits <5> Rs32;
3156  let Inst{20-16} = Rs32{4-0};
3157  bits <5> Rt32;
3158  let Inst{12-8} = Rt32{4-0};
3159  bits <5> Rd32;
3160  let Inst{4-0} = Rd32{4-0};
3161}
3162class Enc_da8d43 : OpcodeHexagon {
3163  bits <6> Ii;
3164  let Inst{13-13} = Ii{5-5};
3165  let Inst{7-3} = Ii{4-0};
3166  bits <2> Pv4;
3167  let Inst{1-0} = Pv4{1-0};
3168  bits <5> Rs32;
3169  let Inst{20-16} = Rs32{4-0};
3170  bits <5> Rt32;
3171  let Inst{12-8} = Rt32{4-0};
3172}
3173class Enc_daea09 : OpcodeHexagon {
3174  bits <17> Ii;
3175  let Inst{23-22} = Ii{16-15};
3176  let Inst{20-16} = Ii{14-10};
3177  let Inst{13-13} = Ii{9-9};
3178  let Inst{7-1} = Ii{8-2};
3179  bits <2> Pu4;
3180  let Inst{9-8} = Pu4{1-0};
3181}
3182class Enc_db40cd : OpcodeHexagon {
3183  bits <6> Ii;
3184  let Inst{6-3} = Ii{5-2};
3185  bits <5> Rt32;
3186  let Inst{12-8} = Rt32{4-0};
3187  bits <5> Rx32;
3188  let Inst{20-16} = Rx32{4-0};
3189}
3190class Enc_dbd70c : OpcodeHexagon {
3191  bits <5> Rss32;
3192  let Inst{20-16} = Rss32{4-0};
3193  bits <5> Rtt32;
3194  let Inst{12-8} = Rtt32{4-0};
3195  bits <2> Pu4;
3196  let Inst{6-5} = Pu4{1-0};
3197  bits <5> Rdd32;
3198  let Inst{4-0} = Rdd32{4-0};
3199}
3200class Enc_dd766a : OpcodeHexagon {
3201  bits <5> Vu32;
3202  let Inst{12-8} = Vu32{4-0};
3203  bits <5> Vdd32;
3204  let Inst{4-0} = Vdd32{4-0};
3205}
3206class Enc_de0214 : OpcodeHexagon {
3207  bits <12> Ii;
3208  let Inst{26-25} = Ii{11-10};
3209  let Inst{13-5} = Ii{9-1};
3210  bits <5> Rs32;
3211  let Inst{20-16} = Rs32{4-0};
3212  bits <5> Rd32;
3213  let Inst{4-0} = Rd32{4-0};
3214}
3215class Enc_de5ea0 : OpcodeHexagon {
3216  bits <5> Vuu32;
3217  let Inst{12-8} = Vuu32{4-0};
3218  bits <5> Vv32;
3219  let Inst{20-16} = Vv32{4-0};
3220  bits <5> Vd32;
3221  let Inst{4-0} = Vd32{4-0};
3222}
3223class Enc_e07374 : OpcodeHexagon {
3224  bits <5> Rs32;
3225  let Inst{20-16} = Rs32{4-0};
3226  bits <5> Rtt32;
3227  let Inst{12-8} = Rtt32{4-0};
3228  bits <5> Rd32;
3229  let Inst{4-0} = Rd32{4-0};
3230}
3231class Enc_e0820b : OpcodeHexagon {
3232  bits <5> Vu32;
3233  let Inst{12-8} = Vu32{4-0};
3234  bits <5> Vv32;
3235  let Inst{20-16} = Vv32{4-0};
3236  bits <2> Qs4;
3237  let Inst{6-5} = Qs4{1-0};
3238  bits <5> Vd32;
3239  let Inst{4-0} = Vd32{4-0};
3240}
3241class Enc_e0a47a : OpcodeHexagon {
3242  bits <4> Ii;
3243  let Inst{8-5} = Ii{3-0};
3244  bits <1> Mu2;
3245  let Inst{13-13} = Mu2{0-0};
3246  bits <5> Rd32;
3247  let Inst{4-0} = Rd32{4-0};
3248  bits <5> Rx32;
3249  let Inst{20-16} = Rx32{4-0};
3250}
3251class Enc_e26546 : OpcodeHexagon {
3252  bits <5> Ii;
3253  let Inst{6-3} = Ii{4-1};
3254  bits <3> Nt8;
3255  let Inst{10-8} = Nt8{2-0};
3256  bits <5> Rx32;
3257  let Inst{20-16} = Rx32{4-0};
3258}
3259class Enc_e32517 : OpcodeHexagon {
3260  bits <7> Sss128;
3261  let Inst{22-16} = Sss128{6-0};
3262  bits <5> Rdd32;
3263  let Inst{4-0} = Rdd32{4-0};
3264}
3265class Enc_e38e1f : OpcodeHexagon {
3266  bits <8> Ii;
3267  let Inst{12-5} = Ii{7-0};
3268  bits <2> Pu4;
3269  let Inst{22-21} = Pu4{1-0};
3270  bits <5> Rs32;
3271  let Inst{20-16} = Rs32{4-0};
3272  bits <5> Rd32;
3273  let Inst{4-0} = Rd32{4-0};
3274}
3275class Enc_e39bb2 : OpcodeHexagon {
3276  bits <6> Ii;
3277  let Inst{9-4} = Ii{5-0};
3278  bits <4> Rd16;
3279  let Inst{3-0} = Rd16{3-0};
3280}
3281class Enc_e3b0c4 : OpcodeHexagon {
3282
3283}
3284class Enc_e66a97 : OpcodeHexagon {
3285  bits <7> Ii;
3286  let Inst{12-7} = Ii{6-1};
3287  bits <5> II;
3288  let Inst{4-0} = II{4-0};
3289  bits <5> Rs32;
3290  let Inst{20-16} = Rs32{4-0};
3291}
3292class Enc_e6abcf : OpcodeHexagon {
3293  bits <5> Rs32;
3294  let Inst{20-16} = Rs32{4-0};
3295  bits <5> Rtt32;
3296  let Inst{12-8} = Rtt32{4-0};
3297}
3298class Enc_e6c957 : OpcodeHexagon {
3299  bits <10> Ii;
3300  let Inst{21-21} = Ii{9-9};
3301  let Inst{13-5} = Ii{8-0};
3302  bits <5> Rdd32;
3303  let Inst{4-0} = Rdd32{4-0};
3304}
3305class Enc_e7581c : OpcodeHexagon {
3306  bits <5> Vu32;
3307  let Inst{12-8} = Vu32{4-0};
3308  bits <5> Vd32;
3309  let Inst{4-0} = Vd32{4-0};
3310}
3311class Enc_e83554 : OpcodeHexagon {
3312  bits <5> Ii;
3313  let Inst{8-5} = Ii{4-1};
3314  bits <1> Mu2;
3315  let Inst{13-13} = Mu2{0-0};
3316  bits <5> Rd32;
3317  let Inst{4-0} = Rd32{4-0};
3318  bits <5> Rx32;
3319  let Inst{20-16} = Rx32{4-0};
3320}
3321class Enc_e8c45e : OpcodeHexagon {
3322  bits <7> Ii;
3323  let Inst{13-13} = Ii{6-6};
3324  let Inst{7-3} = Ii{5-1};
3325  bits <2> Pv4;
3326  let Inst{1-0} = Pv4{1-0};
3327  bits <5> Rs32;
3328  let Inst{20-16} = Rs32{4-0};
3329  bits <5> Rt32;
3330  let Inst{12-8} = Rt32{4-0};
3331}
3332class Enc_e90a15 : OpcodeHexagon {
3333  bits <11> Ii;
3334  let Inst{21-20} = Ii{10-9};
3335  let Inst{7-1} = Ii{8-2};
3336  bits <3> Ns8;
3337  let Inst{18-16} = Ns8{2-0};
3338  bits <4> n1;
3339  let Inst{29-29} = n1{3-3};
3340  let Inst{26-25} = n1{2-1};
3341  let Inst{22-22} = n1{0-0};
3342}
3343class Enc_e957fb : OpcodeHexagon {
3344  bits <12> Ii;
3345  let Inst{26-25} = Ii{11-10};
3346  let Inst{13-13} = Ii{9-9};
3347  let Inst{7-0} = Ii{8-1};
3348  bits <5> Rs32;
3349  let Inst{20-16} = Rs32{4-0};
3350  bits <5> Rt32;
3351  let Inst{12-8} = Rt32{4-0};
3352}
3353class Enc_ea23e4 : OpcodeHexagon {
3354  bits <5> Rtt32;
3355  let Inst{12-8} = Rtt32{4-0};
3356  bits <5> Rss32;
3357  let Inst{20-16} = Rss32{4-0};
3358  bits <5> Rdd32;
3359  let Inst{4-0} = Rdd32{4-0};
3360}
3361class Enc_ea4c54 : OpcodeHexagon {
3362  bits <2> Pu4;
3363  let Inst{6-5} = Pu4{1-0};
3364  bits <5> Rs32;
3365  let Inst{20-16} = Rs32{4-0};
3366  bits <5> Rt32;
3367  let Inst{12-8} = Rt32{4-0};
3368  bits <5> Rd32;
3369  let Inst{4-0} = Rd32{4-0};
3370}
3371class Enc_eaa9f8 : OpcodeHexagon {
3372  bits <5> Vu32;
3373  let Inst{12-8} = Vu32{4-0};
3374  bits <5> Vv32;
3375  let Inst{20-16} = Vv32{4-0};
3376  bits <2> Qx4;
3377  let Inst{1-0} = Qx4{1-0};
3378}
3379class Enc_eafd18 : OpcodeHexagon {
3380  bits <5> II;
3381  let Inst{12-8} = II{4-0};
3382  bits <11> Ii;
3383  let Inst{21-20} = Ii{10-9};
3384  let Inst{7-1} = Ii{8-2};
3385  bits <3> Ns8;
3386  let Inst{18-16} = Ns8{2-0};
3387}
3388class Enc_eca7c8 : OpcodeHexagon {
3389  bits <2> Ii;
3390  let Inst{13-13} = Ii{1-1};
3391  let Inst{7-7} = Ii{0-0};
3392  bits <5> Rs32;
3393  let Inst{20-16} = Rs32{4-0};
3394  bits <5> Ru32;
3395  let Inst{12-8} = Ru32{4-0};
3396  bits <5> Rt32;
3397  let Inst{4-0} = Rt32{4-0};
3398}
3399class Enc_ecbcc8 : OpcodeHexagon {
3400  bits <5> Rs32;
3401  let Inst{20-16} = Rs32{4-0};
3402}
3403class Enc_ed48be : OpcodeHexagon {
3404  bits <2> Ii;
3405  let Inst{6-5} = Ii{1-0};
3406  bits <3> Rdd8;
3407  let Inst{2-0} = Rdd8{2-0};
3408}
3409class Enc_ed5027 : OpcodeHexagon {
3410  bits <5> Rss32;
3411  let Inst{20-16} = Rss32{4-0};
3412  bits <5> Gdd32;
3413  let Inst{4-0} = Gdd32{4-0};
3414}
3415class Enc_ee5ed0 : OpcodeHexagon {
3416  bits <4> Rs16;
3417  let Inst{7-4} = Rs16{3-0};
3418  bits <4> Rd16;
3419  let Inst{3-0} = Rd16{3-0};
3420  bits <2> n1;
3421  let Inst{9-8} = n1{1-0};
3422}
3423class Enc_ef601b : OpcodeHexagon {
3424  bits <4> Ii;
3425  let Inst{13-13} = Ii{3-3};
3426  let Inst{10-8} = Ii{2-0};
3427  bits <2> Pv4;
3428  let Inst{12-11} = Pv4{1-0};
3429  bits <5> Rt32;
3430  let Inst{20-16} = Rt32{4-0};
3431}
3432class Enc_efaed8 : OpcodeHexagon {
3433  bits <1> Ii;
3434  let Inst{8-8} = Ii{0-0};
3435}
3436class Enc_f0cca7 : OpcodeHexagon {
3437  bits <8> Ii;
3438  let Inst{12-5} = Ii{7-0};
3439  bits <6> II;
3440  let Inst{20-16} = II{5-1};
3441  let Inst{13-13} = II{0-0};
3442  bits <5> Rdd32;
3443  let Inst{4-0} = Rdd32{4-0};
3444}
3445class Enc_f20719 : OpcodeHexagon {
3446  bits <7> Ii;
3447  let Inst{12-7} = Ii{6-1};
3448  bits <6> II;
3449  let Inst{13-13} = II{5-5};
3450  let Inst{4-0} = II{4-0};
3451  bits <2> Pv4;
3452  let Inst{6-5} = Pv4{1-0};
3453  bits <5> Rs32;
3454  let Inst{20-16} = Rs32{4-0};
3455}
3456class Enc_f37377 : OpcodeHexagon {
3457  bits <8> Ii;
3458  let Inst{12-7} = Ii{7-2};
3459  bits <8> II;
3460  let Inst{13-13} = II{7-7};
3461  let Inst{6-0} = II{6-0};
3462  bits <5> Rs32;
3463  let Inst{20-16} = Rs32{4-0};
3464}
3465class Enc_f394d3 : OpcodeHexagon {
3466  bits <6> II;
3467  let Inst{11-8} = II{5-2};
3468  let Inst{6-5} = II{1-0};
3469  bits <5> Ryy32;
3470  let Inst{4-0} = Ryy32{4-0};
3471  bits <5> Re32;
3472  let Inst{20-16} = Re32{4-0};
3473}
3474class Enc_f3f408 : OpcodeHexagon {
3475  bits <4> Ii;
3476  let Inst{13-13} = Ii{3-3};
3477  let Inst{10-8} = Ii{2-0};
3478  bits <5> Rt32;
3479  let Inst{20-16} = Rt32{4-0};
3480  bits <5> Vd32;
3481  let Inst{4-0} = Vd32{4-0};
3482}
3483class Enc_f4413a : OpcodeHexagon {
3484  bits <4> Ii;
3485  let Inst{8-5} = Ii{3-0};
3486  bits <2> Pt4;
3487  let Inst{10-9} = Pt4{1-0};
3488  bits <5> Rd32;
3489  let Inst{4-0} = Rd32{4-0};
3490  bits <5> Rx32;
3491  let Inst{20-16} = Rx32{4-0};
3492}
3493class Enc_f44229 : OpcodeHexagon {
3494  bits <7> Ii;
3495  let Inst{13-13} = Ii{6-6};
3496  let Inst{7-3} = Ii{5-1};
3497  bits <2> Pv4;
3498  let Inst{1-0} = Pv4{1-0};
3499  bits <5> Rs32;
3500  let Inst{20-16} = Rs32{4-0};
3501  bits <3> Nt8;
3502  let Inst{10-8} = Nt8{2-0};
3503}
3504class Enc_f4f57b : OpcodeHexagon {
3505  bits <2> Ii;
3506  let Inst{6-5} = Ii{1-0};
3507  bits <5> Vuu32;
3508  let Inst{12-8} = Vuu32{4-0};
3509  bits <5> Vvv32;
3510  let Inst{20-16} = Vvv32{4-0};
3511  bits <5> Vxx32;
3512  let Inst{4-0} = Vxx32{4-0};
3513}
3514class Enc_f55a0c : OpcodeHexagon {
3515  bits <6> Ii;
3516  let Inst{11-8} = Ii{5-2};
3517  bits <4> Rs16;
3518  let Inst{7-4} = Rs16{3-0};
3519  bits <4> Rt16;
3520  let Inst{3-0} = Rt16{3-0};
3521}
3522class Enc_f5e933 : OpcodeHexagon {
3523  bits <2> Ps4;
3524  let Inst{17-16} = Ps4{1-0};
3525  bits <5> Rd32;
3526  let Inst{4-0} = Rd32{4-0};
3527}
3528class Enc_f6fe0b : OpcodeHexagon {
3529  bits <11> Ii;
3530  let Inst{21-20} = Ii{10-9};
3531  let Inst{7-1} = Ii{8-2};
3532  bits <4> Rs16;
3533  let Inst{19-16} = Rs16{3-0};
3534  bits <6> n1;
3535  let Inst{28-28} = n1{5-5};
3536  let Inst{24-22} = n1{4-2};
3537  let Inst{13-13} = n1{1-1};
3538  let Inst{8-8} = n1{0-0};
3539}
3540class Enc_f7430e : OpcodeHexagon {
3541  bits <4> Ii;
3542  let Inst{13-13} = Ii{3-3};
3543  let Inst{10-8} = Ii{2-0};
3544  bits <2> Pv4;
3545  let Inst{12-11} = Pv4{1-0};
3546  bits <5> Rt32;
3547  let Inst{20-16} = Rt32{4-0};
3548  bits <3> Os8;
3549  let Inst{2-0} = Os8{2-0};
3550}
3551class Enc_f77fbc : OpcodeHexagon {
3552  bits <4> Ii;
3553  let Inst{13-13} = Ii{3-3};
3554  let Inst{10-8} = Ii{2-0};
3555  bits <5> Rt32;
3556  let Inst{20-16} = Rt32{4-0};
3557  bits <3> Os8;
3558  let Inst{2-0} = Os8{2-0};
3559}
3560class Enc_f79415 : OpcodeHexagon {
3561  bits <2> Ii;
3562  let Inst{13-13} = Ii{1-1};
3563  let Inst{6-6} = Ii{0-0};
3564  bits <6> II;
3565  let Inst{5-0} = II{5-0};
3566  bits <5> Ru32;
3567  let Inst{20-16} = Ru32{4-0};
3568  bits <5> Rtt32;
3569  let Inst{12-8} = Rtt32{4-0};
3570}
3571class Enc_f7ea77 : OpcodeHexagon {
3572  bits <11> Ii;
3573  let Inst{21-20} = Ii{10-9};
3574  let Inst{7-1} = Ii{8-2};
3575  bits <3> Ns8;
3576  let Inst{18-16} = Ns8{2-0};
3577  bits <4> n1;
3578  let Inst{29-29} = n1{3-3};
3579  let Inst{26-25} = n1{2-1};
3580  let Inst{13-13} = n1{0-0};
3581}
3582class Enc_f82302 : OpcodeHexagon {
3583  bits <11> Ii;
3584  let Inst{21-20} = Ii{10-9};
3585  let Inst{7-1} = Ii{8-2};
3586  bits <3> Ns8;
3587  let Inst{18-16} = Ns8{2-0};
3588  bits <4> n1;
3589  let Inst{29-29} = n1{3-3};
3590  let Inst{26-25} = n1{2-1};
3591  let Inst{23-23} = n1{0-0};
3592}
3593class Enc_f82eaf : OpcodeHexagon {
3594  bits <8> Ii;
3595  let Inst{10-5} = Ii{7-2};
3596  bits <2> Pt4;
3597  let Inst{12-11} = Pt4{1-0};
3598  bits <5> Rs32;
3599  let Inst{20-16} = Rs32{4-0};
3600  bits <5> Rd32;
3601  let Inst{4-0} = Rd32{4-0};
3602}
3603class Enc_f8c1c4 : OpcodeHexagon {
3604  bits <2> Pv4;
3605  let Inst{12-11} = Pv4{1-0};
3606  bits <1> Mu2;
3607  let Inst{13-13} = Mu2{0-0};
3608  bits <5> Vd32;
3609  let Inst{4-0} = Vd32{4-0};
3610  bits <5> Rx32;
3611  let Inst{20-16} = Rx32{4-0};
3612}
3613class Enc_f8ecf9 : OpcodeHexagon {
3614  bits <5> Vuu32;
3615  let Inst{12-8} = Vuu32{4-0};
3616  bits <5> Vvv32;
3617  let Inst{20-16} = Vvv32{4-0};
3618  bits <5> Vdd32;
3619  let Inst{4-0} = Vdd32{4-0};
3620}
3621class Enc_fa3ba4 : OpcodeHexagon {
3622  bits <14> Ii;
3623  let Inst{26-25} = Ii{13-12};
3624  let Inst{13-5} = Ii{11-3};
3625  bits <5> Rs32;
3626  let Inst{20-16} = Rs32{4-0};
3627  bits <5> Rdd32;
3628  let Inst{4-0} = Rdd32{4-0};
3629}
3630class Enc_fb6577 : OpcodeHexagon {
3631  bits <2> Pu4;
3632  let Inst{9-8} = Pu4{1-0};
3633  bits <5> Rs32;
3634  let Inst{20-16} = Rs32{4-0};
3635  bits <5> Rd32;
3636  let Inst{4-0} = Rd32{4-0};
3637}
3638class Enc_fc4562 : OpcodeHexagon {
3639  bits <5> Rs32;
3640  let Inst{12-8} = Rs32{4-0};
3641  bits <5> Rtt32;
3642  let Inst{20-16} = Rtt32{4-0};
3643  bits <5> Rdd32;
3644  let Inst{4-0} = Rdd32{4-0};
3645}
3646class Enc_fcf7a7 : OpcodeHexagon {
3647  bits <5> Rss32;
3648  let Inst{20-16} = Rss32{4-0};
3649  bits <5> Rtt32;
3650  let Inst{12-8} = Rtt32{4-0};
3651  bits <2> Pd4;
3652  let Inst{1-0} = Pd4{1-0};
3653}
3654class Enc_fda92c : OpcodeHexagon {
3655  bits <17> Ii;
3656  let Inst{26-25} = Ii{16-15};
3657  let Inst{20-16} = Ii{14-10};
3658  let Inst{13-13} = Ii{9-9};
3659  let Inst{7-0} = Ii{8-1};
3660  bits <5> Rt32;
3661  let Inst{12-8} = Rt32{4-0};
3662}
3663class Enc_fef969 : OpcodeHexagon {
3664  bits <6> Ii;
3665  let Inst{20-16} = Ii{5-1};
3666  let Inst{5-5} = Ii{0-0};
3667  bits <5> Rt32;
3668  let Inst{12-8} = Rt32{4-0};
3669  bits <5> Rd32;
3670  let Inst{4-0} = Rd32{4-0};
3671}
3672class Enc_ff3442 : OpcodeHexagon {
3673  bits <4> Ii;
3674  let Inst{13-13} = Ii{3-3};
3675  let Inst{10-8} = Ii{2-0};
3676  bits <5> Rt32;
3677  let Inst{20-16} = Rt32{4-0};
3678}
3679