xref: /freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/HexagonDepInstrFormats.td (revision a521f2116473fbd8c09db395518f060a27d02334) 
1//===----------------------------------------------------------------------===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8// Automatically generated file, do not edit!
9//===----------------------------------------------------------------------===//
10
11class Enc_5e2823 : OpcodeHexagon {
12  bits <5> Rs32;
13  let Inst{20-16} = Rs32{4-0};
14  bits <5> Rd32;
15  let Inst{4-0} = Rd32{4-0};
16}
17class Enc_b9c5fb : OpcodeHexagon {
18  bits <5> Rss32;
19  let Inst{20-16} = Rss32{4-0};
20  bits <5> Rdd32;
21  let Inst{4-0} = Rdd32{4-0};
22}
23class Enc_5ab2be : OpcodeHexagon {
24  bits <5> Rs32;
25  let Inst{20-16} = Rs32{4-0};
26  bits <5> Rt32;
27  let Inst{12-8} = Rt32{4-0};
28  bits <5> Rd32;
29  let Inst{4-0} = Rd32{4-0};
30}
31class Enc_bd6011 : OpcodeHexagon {
32  bits <5> Rt32;
33  let Inst{12-8} = Rt32{4-0};
34  bits <5> Rs32;
35  let Inst{20-16} = Rs32{4-0};
36  bits <5> Rd32;
37  let Inst{4-0} = Rd32{4-0};
38}
39class Enc_cb9321 : OpcodeHexagon {
40  bits <16> Ii;
41  let Inst{27-21} = Ii{15-9};
42  let Inst{13-5} = Ii{8-0};
43  bits <5> Rs32;
44  let Inst{20-16} = Rs32{4-0};
45  bits <5> Rd32;
46  let Inst{4-0} = Rd32{4-0};
47}
48class Enc_a56825 : OpcodeHexagon {
49  bits <5> Rss32;
50  let Inst{20-16} = Rss32{4-0};
51  bits <5> Rtt32;
52  let Inst{12-8} = Rtt32{4-0};
53  bits <5> Rdd32;
54  let Inst{4-0} = Rdd32{4-0};
55}
56class Enc_140c83 : OpcodeHexagon {
57  bits <10> Ii;
58  let Inst{21-21} = Ii{9-9};
59  let Inst{13-5} = Ii{8-0};
60  bits <5> Rs32;
61  let Inst{20-16} = Rs32{4-0};
62  bits <5> Rd32;
63  let Inst{4-0} = Rd32{4-0};
64}
65class Enc_18c338 : OpcodeHexagon {
66  bits <8> Ii;
67  let Inst{12-5} = Ii{7-0};
68  bits <8> II;
69  let Inst{22-16} = II{7-1};
70  let Inst{13-13} = II{0-0};
71  bits <5> Rdd32;
72  let Inst{4-0} = Rdd32{4-0};
73}
74class Enc_be32a5 : OpcodeHexagon {
75  bits <5> Rs32;
76  let Inst{20-16} = Rs32{4-0};
77  bits <5> Rt32;
78  let Inst{12-8} = Rt32{4-0};
79  bits <5> Rdd32;
80  let Inst{4-0} = Rdd32{4-0};
81}
82class Enc_ea23e4 : OpcodeHexagon {
83  bits <5> Rtt32;
84  let Inst{12-8} = Rtt32{4-0};
85  bits <5> Rss32;
86  let Inst{20-16} = Rss32{4-0};
87  bits <5> Rdd32;
88  let Inst{4-0} = Rdd32{4-0};
89}
90class Enc_e3b0c4 : OpcodeHexagon {
91
92}
93class Enc_ea4c54 : OpcodeHexagon {
94  bits <2> Pu4;
95  let Inst{6-5} = Pu4{1-0};
96  bits <5> Rs32;
97  let Inst{20-16} = Rs32{4-0};
98  bits <5> Rt32;
99  let Inst{12-8} = Rt32{4-0};
100  bits <5> Rd32;
101  let Inst{4-0} = Rd32{4-0};
102}
103class Enc_e38e1f : OpcodeHexagon {
104  bits <8> Ii;
105  let Inst{12-5} = Ii{7-0};
106  bits <2> Pu4;
107  let Inst{22-21} = Pu4{1-0};
108  bits <5> Rs32;
109  let Inst{20-16} = Rs32{4-0};
110  bits <5> Rd32;
111  let Inst{4-0} = Rd32{4-0};
112}
113class Enc_9b0bc1 : OpcodeHexagon {
114  bits <2> Pu4;
115  let Inst{6-5} = Pu4{1-0};
116  bits <5> Rt32;
117  let Inst{12-8} = Rt32{4-0};
118  bits <5> Rs32;
119  let Inst{20-16} = Rs32{4-0};
120  bits <5> Rd32;
121  let Inst{4-0} = Rd32{4-0};
122}
123class Enc_90cd8b : OpcodeHexagon {
124  bits <5> Rss32;
125  let Inst{20-16} = Rss32{4-0};
126  bits <5> Rd32;
127  let Inst{4-0} = Rd32{4-0};
128}
129class Enc_3a3d62 : OpcodeHexagon {
130  bits <5> Rs32;
131  let Inst{20-16} = Rs32{4-0};
132  bits <5> Rdd32;
133  let Inst{4-0} = Rdd32{4-0};
134}
135class Enc_0cb018 : OpcodeHexagon {
136  bits <5> Cs32;
137  let Inst{20-16} = Cs32{4-0};
138  bits <5> Rd32;
139  let Inst{4-0} = Rd32{4-0};
140}
141class Enc_51436c : OpcodeHexagon {
142  bits <16> Ii;
143  let Inst{23-22} = Ii{15-14};
144  let Inst{13-0} = Ii{13-0};
145  bits <5> Rx32;
146  let Inst{20-16} = Rx32{4-0};
147}
148class Enc_bd811a : OpcodeHexagon {
149  bits <5> Rs32;
150  let Inst{20-16} = Rs32{4-0};
151  bits <5> Cd32;
152  let Inst{4-0} = Cd32{4-0};
153}
154class Enc_5e87ce : OpcodeHexagon {
155  bits <16> Ii;
156  let Inst{23-22} = Ii{15-14};
157  let Inst{20-16} = Ii{13-9};
158  let Inst{13-5} = Ii{8-0};
159  bits <5> Rd32;
160  let Inst{4-0} = Rd32{4-0};
161}
162class Enc_fcf7a7 : OpcodeHexagon {
163  bits <5> Rss32;
164  let Inst{20-16} = Rss32{4-0};
165  bits <5> Rtt32;
166  let Inst{12-8} = Rtt32{4-0};
167  bits <2> Pd4;
168  let Inst{1-0} = Pd4{1-0};
169}
170class Enc_88c16c : OpcodeHexagon {
171  bits <5> Rss32;
172  let Inst{20-16} = Rss32{4-0};
173  bits <5> Rtt32;
174  let Inst{12-8} = Rtt32{4-0};
175  bits <5> Rxx32;
176  let Inst{4-0} = Rxx32{4-0};
177}
178class Enc_2b3f60 : OpcodeHexagon {
179  bits <5> Rss32;
180  let Inst{20-16} = Rss32{4-0};
181  bits <5> Rtt32;
182  let Inst{12-8} = Rtt32{4-0};
183  bits <5> Rdd32;
184  let Inst{4-0} = Rdd32{4-0};
185  bits <2> Px4;
186  let Inst{6-5} = Px4{1-0};
187}
188class Enc_311abd : OpcodeHexagon {
189  bits <5> Ii;
190  let Inst{12-8} = Ii{4-0};
191  bits <5> Rs32;
192  let Inst{20-16} = Rs32{4-0};
193  bits <5> Rdd32;
194  let Inst{4-0} = Rdd32{4-0};
195}
196class Enc_c2b48e : OpcodeHexagon {
197  bits <5> Rs32;
198  let Inst{20-16} = Rs32{4-0};
199  bits <5> Rt32;
200  let Inst{12-8} = Rt32{4-0};
201  bits <2> Pd4;
202  let Inst{1-0} = Pd4{1-0};
203}
204class Enc_08d755 : OpcodeHexagon {
205  bits <8> Ii;
206  let Inst{12-5} = Ii{7-0};
207  bits <5> Rs32;
208  let Inst{20-16} = Rs32{4-0};
209  bits <2> Pd4;
210  let Inst{1-0} = Pd4{1-0};
211}
212class Enc_02553a : OpcodeHexagon {
213  bits <7> Ii;
214  let Inst{11-5} = Ii{6-0};
215  bits <5> Rs32;
216  let Inst{20-16} = Rs32{4-0};
217  bits <2> Pd4;
218  let Inst{1-0} = Pd4{1-0};
219}
220class Enc_f0cca7 : OpcodeHexagon {
221  bits <8> Ii;
222  let Inst{12-5} = Ii{7-0};
223  bits <6> II;
224  let Inst{20-16} = II{5-1};
225  let Inst{13-13} = II{0-0};
226  bits <5> Rdd32;
227  let Inst{4-0} = Rdd32{4-0};
228}
229class Enc_9cdba7 : OpcodeHexagon {
230  bits <8> Ii;
231  let Inst{12-5} = Ii{7-0};
232  bits <5> Rs32;
233  let Inst{20-16} = Rs32{4-0};
234  bits <5> Rdd32;
235  let Inst{4-0} = Rdd32{4-0};
236}
237class Enc_a05677 : OpcodeHexagon {
238  bits <5> Ii;
239  let Inst{12-8} = Ii{4-0};
240  bits <5> Rs32;
241  let Inst{20-16} = Rs32{4-0};
242  bits <5> Rd32;
243  let Inst{4-0} = Rd32{4-0};
244}
245class Enc_2b518f : OpcodeHexagon {
246  bits <32> Ii;
247  let Inst{27-16} = Ii{31-20};
248  let Inst{13-0} = Ii{19-6};
249}
250class Enc_fb6577 : OpcodeHexagon {
251  bits <2> Pu4;
252  let Inst{9-8} = Pu4{1-0};
253  bits <5> Rs32;
254  let Inst{20-16} = Rs32{4-0};
255  bits <5> Rd32;
256  let Inst{4-0} = Rd32{4-0};
257}
258class Enc_b8c967 : OpcodeHexagon {
259  bits <8> Ii;
260  let Inst{12-5} = Ii{7-0};
261  bits <5> Rs32;
262  let Inst{20-16} = Rs32{4-0};
263  bits <5> Rd32;
264  let Inst{4-0} = Rd32{4-0};
265}
266class Enc_667b39 : OpcodeHexagon {
267  bits <5> Css32;
268  let Inst{20-16} = Css32{4-0};
269  bits <5> Rdd32;
270  let Inst{4-0} = Rdd32{4-0};
271}
272class Enc_0ed752 : OpcodeHexagon {
273  bits <5> Rss32;
274  let Inst{20-16} = Rss32{4-0};
275  bits <5> Cdd32;
276  let Inst{4-0} = Cdd32{4-0};
277}
278class Enc_03833b : OpcodeHexagon {
279  bits <5> Rss32;
280  let Inst{20-16} = Rss32{4-0};
281  bits <5> Rt32;
282  let Inst{12-8} = Rt32{4-0};
283  bits <2> Pd4;
284  let Inst{1-0} = Pd4{1-0};
285}
286class Enc_0d8adb : OpcodeHexagon {
287  bits <8> Ii;
288  let Inst{12-5} = Ii{7-0};
289  bits <5> Rss32;
290  let Inst{20-16} = Rss32{4-0};
291  bits <2> Pd4;
292  let Inst{1-0} = Pd4{1-0};
293}
294class Enc_3680c2 : OpcodeHexagon {
295  bits <7> Ii;
296  let Inst{11-5} = Ii{6-0};
297  bits <5> Rss32;
298  let Inst{20-16} = Rss32{4-0};
299  bits <2> Pd4;
300  let Inst{1-0} = Pd4{1-0};
301}
302class Enc_412ff0 : OpcodeHexagon {
303  bits <5> Rss32;
304  let Inst{20-16} = Rss32{4-0};
305  bits <5> Ru32;
306  let Inst{4-0} = Ru32{4-0};
307  bits <5> Rxx32;
308  let Inst{12-8} = Rxx32{4-0};
309}
310class Enc_831a7d : OpcodeHexagon {
311  bits <5> Rss32;
312  let Inst{20-16} = Rss32{4-0};
313  bits <5> Rtt32;
314  let Inst{12-8} = Rtt32{4-0};
315  bits <5> Rxx32;
316  let Inst{4-0} = Rxx32{4-0};
317  bits <2> Pe4;
318  let Inst{6-5} = Pe4{1-0};
319}
320class Enc_d2216a : OpcodeHexagon {
321  bits <5> Rss32;
322  let Inst{20-16} = Rss32{4-0};
323  bits <5> Rtt32;
324  let Inst{12-8} = Rtt32{4-0};
325  bits <5> Rd32;
326  let Inst{4-0} = Rd32{4-0};
327}
328class Enc_d2c7f1 : OpcodeHexagon {
329  bits <5> Rtt32;
330  let Inst{12-8} = Rtt32{4-0};
331  bits <5> Rss32;
332  let Inst{20-16} = Rss32{4-0};
333  bits <5> Rdd32;
334  let Inst{4-0} = Rdd32{4-0};
335  bits <2> Pe4;
336  let Inst{6-5} = Pe4{1-0};
337}
338class Enc_5eac98 : OpcodeHexagon {
339  bits <6> Ii;
340  let Inst{13-8} = Ii{5-0};
341  bits <5> Rss32;
342  let Inst{20-16} = Rss32{4-0};
343  bits <5> Rdd32;
344  let Inst{4-0} = Rdd32{4-0};
345}
346class Enc_927852 : OpcodeHexagon {
347  bits <5> Rss32;
348  let Inst{20-16} = Rss32{4-0};
349  bits <5> Rt32;
350  let Inst{12-8} = Rt32{4-0};
351  bits <5> Rdd32;
352  let Inst{4-0} = Rdd32{4-0};
353}
354class Enc_7e5a82 : OpcodeHexagon {
355  bits <5> Ii;
356  let Inst{12-8} = Ii{4-0};
357  bits <5> Rss32;
358  let Inst{20-16} = Rss32{4-0};
359  bits <5> Rdd32;
360  let Inst{4-0} = Rdd32{4-0};
361}
362class Enc_65d691 : OpcodeHexagon {
363  bits <2> Ps4;
364  let Inst{17-16} = Ps4{1-0};
365  bits <2> Pd4;
366  let Inst{1-0} = Pd4{1-0};
367}
368class Enc_454a26 : OpcodeHexagon {
369  bits <2> Pt4;
370  let Inst{9-8} = Pt4{1-0};
371  bits <2> Ps4;
372  let Inst{17-16} = Ps4{1-0};
373  bits <2> Pd4;
374  let Inst{1-0} = Pd4{1-0};
375}
376class Enc_5d6c34 : OpcodeHexagon {
377  bits <6> Ii;
378  let Inst{13-8} = Ii{5-0};
379  bits <5> Rs32;
380  let Inst{20-16} = Rs32{4-0};
381  bits <2> Pd4;
382  let Inst{1-0} = Pd4{1-0};
383}
384class Enc_cb4b4e : OpcodeHexagon {
385  bits <2> Pu4;
386  let Inst{6-5} = Pu4{1-0};
387  bits <5> Rs32;
388  let Inst{20-16} = Rs32{4-0};
389  bits <5> Rt32;
390  let Inst{12-8} = Rt32{4-0};
391  bits <5> Rdd32;
392  let Inst{4-0} = Rdd32{4-0};
393}
394class Enc_cda00a : OpcodeHexagon {
395  bits <12> Ii;
396  let Inst{19-16} = Ii{11-8};
397  let Inst{12-5} = Ii{7-0};
398  bits <2> Pu4;
399  let Inst{22-21} = Pu4{1-0};
400  bits <5> Rd32;
401  let Inst{4-0} = Rd32{4-0};
402}
403class Enc_bd0b33 : OpcodeHexagon {
404  bits <10> Ii;
405  let Inst{21-21} = Ii{9-9};
406  let Inst{13-5} = Ii{8-0};
407  bits <5> Rs32;
408  let Inst{20-16} = Rs32{4-0};
409  bits <2> Pd4;
410  let Inst{1-0} = Pd4{1-0};
411}
412class Enc_c0cdde : OpcodeHexagon {
413  bits <9> Ii;
414  let Inst{13-5} = Ii{8-0};
415  bits <5> Rs32;
416  let Inst{20-16} = Rs32{4-0};
417  bits <2> Pd4;
418  let Inst{1-0} = Pd4{1-0};
419}
420class Enc_78e566 : OpcodeHexagon {
421  bits <2> Pt4;
422  let Inst{9-8} = Pt4{1-0};
423  bits <5> Rdd32;
424  let Inst{4-0} = Rdd32{4-0};
425}
426class Enc_830e5d : OpcodeHexagon {
427  bits <8> Ii;
428  let Inst{12-5} = Ii{7-0};
429  bits <8> II;
430  let Inst{22-16} = II{7-1};
431  let Inst{13-13} = II{0-0};
432  bits <2> Pu4;
433  let Inst{24-23} = Pu4{1-0};
434  bits <5> Rd32;
435  let Inst{4-0} = Rd32{4-0};
436}
437class Enc_f5e933 : OpcodeHexagon {
438  bits <2> Ps4;
439  let Inst{17-16} = Ps4{1-0};
440  bits <5> Rd32;
441  let Inst{4-0} = Rd32{4-0};
442}
443class Enc_48b75f : OpcodeHexagon {
444  bits <5> Rs32;
445  let Inst{20-16} = Rs32{4-0};
446  bits <2> Pd4;
447  let Inst{1-0} = Pd4{1-0};
448}
449class Enc_527412 : OpcodeHexagon {
450  bits <2> Ps4;
451  let Inst{17-16} = Ps4{1-0};
452  bits <2> Pt4;
453  let Inst{9-8} = Pt4{1-0};
454  bits <5> Rd32;
455  let Inst{4-0} = Rd32{4-0};
456}
457class Enc_329361 : OpcodeHexagon {
458  bits <2> Pu4;
459  let Inst{6-5} = Pu4{1-0};
460  bits <5> Rss32;
461  let Inst{20-16} = Rss32{4-0};
462  bits <5> Rtt32;
463  let Inst{12-8} = Rtt32{4-0};
464  bits <5> Rdd32;
465  let Inst{4-0} = Rdd32{4-0};
466}
467class Enc_284ebb : OpcodeHexagon {
468  bits <2> Ps4;
469  let Inst{17-16} = Ps4{1-0};
470  bits <2> Pt4;
471  let Inst{9-8} = Pt4{1-0};
472  bits <2> Pd4;
473  let Inst{1-0} = Pd4{1-0};
474}
475class Enc_607661 : OpcodeHexagon {
476  bits <6> Ii;
477  let Inst{12-7} = Ii{5-0};
478  bits <5> Rd32;
479  let Inst{4-0} = Rd32{4-0};
480}
481class Enc_9ac432 : OpcodeHexagon {
482  bits <2> Ps4;
483  let Inst{17-16} = Ps4{1-0};
484  bits <2> Pt4;
485  let Inst{9-8} = Pt4{1-0};
486  bits <2> Pu4;
487  let Inst{7-6} = Pu4{1-0};
488  bits <2> Pd4;
489  let Inst{1-0} = Pd4{1-0};
490}
491class Enc_1f19b5 : OpcodeHexagon {
492  bits <5> Ii;
493  let Inst{9-5} = Ii{4-0};
494  bits <5> Rss32;
495  let Inst{20-16} = Rss32{4-0};
496  bits <2> Pd4;
497  let Inst{1-0} = Pd4{1-0};
498}
499class Enc_e6c957 : OpcodeHexagon {
500  bits <10> Ii;
501  let Inst{21-21} = Ii{9-9};
502  let Inst{13-5} = Ii{8-0};
503  bits <5> Rdd32;
504  let Inst{4-0} = Rdd32{4-0};
505}
506class Enc_83ee64 : OpcodeHexagon {
507  bits <5> Ii;
508  let Inst{12-8} = Ii{4-0};
509  bits <5> Rs32;
510  let Inst{20-16} = Rs32{4-0};
511  bits <2> Pd4;
512  let Inst{1-0} = Pd4{1-0};
513}
514class Enc_2ae154 : OpcodeHexagon {
515  bits <5> Rs32;
516  let Inst{20-16} = Rs32{4-0};
517  bits <5> Rt32;
518  let Inst{12-8} = Rt32{4-0};
519  bits <5> Rx32;
520  let Inst{4-0} = Rx32{4-0};
521}
522class Enc_437f33 : OpcodeHexagon {
523  bits <5> Rs32;
524  let Inst{20-16} = Rs32{4-0};
525  bits <5> Rt32;
526  let Inst{12-8} = Rt32{4-0};
527  bits <2> Pu4;
528  let Inst{6-5} = Pu4{1-0};
529  bits <5> Rx32;
530  let Inst{4-0} = Rx32{4-0};
531}
532class Enc_6c9440 : OpcodeHexagon {
533  bits <10> Ii;
534  let Inst{21-21} = Ii{9-9};
535  let Inst{13-5} = Ii{8-0};
536  bits <5> Rd32;
537  let Inst{4-0} = Rd32{4-0};
538}
539class Enc_890909 : OpcodeHexagon {
540  bits <5> Rs32;
541  let Inst{20-16} = Rs32{4-0};
542  bits <5> Rd32;
543  let Inst{4-0} = Rd32{4-0};
544  bits <2> Pe4;
545  let Inst{6-5} = Pe4{1-0};
546}
547class Enc_a94f3b : OpcodeHexagon {
548  bits <5> Rs32;
549  let Inst{20-16} = Rs32{4-0};
550  bits <5> Rt32;
551  let Inst{12-8} = Rt32{4-0};
552  bits <5> Rd32;
553  let Inst{4-0} = Rd32{4-0};
554  bits <2> Pe4;
555  let Inst{6-5} = Pe4{1-0};
556}
557class Enc_0aa344 : OpcodeHexagon {
558  bits <5> Gss32;
559  let Inst{20-16} = Gss32{4-0};
560  bits <5> Rdd32;
561  let Inst{4-0} = Rdd32{4-0};
562}
563class Enc_44271f : OpcodeHexagon {
564  bits <5> Gs32;
565  let Inst{20-16} = Gs32{4-0};
566  bits <5> Rd32;
567  let Inst{4-0} = Rd32{4-0};
568}
569class Enc_ed5027 : OpcodeHexagon {
570  bits <5> Rss32;
571  let Inst{20-16} = Rss32{4-0};
572  bits <5> Gdd32;
573  let Inst{4-0} = Gdd32{4-0};
574}
575class Enc_621fba : OpcodeHexagon {
576  bits <5> Rs32;
577  let Inst{20-16} = Rs32{4-0};
578  bits <5> Gd32;
579  let Inst{4-0} = Gd32{4-0};
580}
581class Enc_81ac1d : OpcodeHexagon {
582  bits <24> Ii;
583  let Inst{24-16} = Ii{23-15};
584  let Inst{13-1} = Ii{14-2};
585}
586class Enc_daea09 : OpcodeHexagon {
587  bits <17> Ii;
588  let Inst{23-22} = Ii{16-15};
589  let Inst{20-16} = Ii{14-10};
590  let Inst{13-13} = Ii{9-9};
591  let Inst{7-1} = Ii{8-2};
592  bits <2> Pu4;
593  let Inst{9-8} = Pu4{1-0};
594}
595class Enc_ecbcc8 : OpcodeHexagon {
596  bits <5> Rs32;
597  let Inst{20-16} = Rs32{4-0};
598}
599class Enc_88d4d9 : OpcodeHexagon {
600  bits <2> Pu4;
601  let Inst{9-8} = Pu4{1-0};
602  bits <5> Rs32;
603  let Inst{20-16} = Rs32{4-0};
604}
605class Enc_0fa531 : OpcodeHexagon {
606  bits <15> Ii;
607  let Inst{21-21} = Ii{14-14};
608  let Inst{13-13} = Ii{13-13};
609  let Inst{11-1} = Ii{12-2};
610  bits <5> Rs32;
611  let Inst{20-16} = Rs32{4-0};
612}
613class Enc_4dc228 : OpcodeHexagon {
614  bits <9> Ii;
615  let Inst{12-8} = Ii{8-4};
616  let Inst{4-3} = Ii{3-2};
617  bits <10> II;
618  let Inst{20-16} = II{9-5};
619  let Inst{7-5} = II{4-2};
620  let Inst{1-0} = II{1-0};
621}
622class Enc_864a5a : OpcodeHexagon {
623  bits <9> Ii;
624  let Inst{12-8} = Ii{8-4};
625  let Inst{4-3} = Ii{3-2};
626  bits <5> Rs32;
627  let Inst{20-16} = Rs32{4-0};
628}
629class Enc_a51a9a : OpcodeHexagon {
630  bits <8> Ii;
631  let Inst{12-8} = Ii{7-3};
632  let Inst{4-2} = Ii{2-0};
633}
634class Enc_33f8ba : OpcodeHexagon {
635  bits <8> Ii;
636  let Inst{12-8} = Ii{7-3};
637  let Inst{4-2} = Ii{2-0};
638  bits <5> Rx32;
639  let Inst{20-16} = Rx32{4-0};
640}
641class Enc_c9a18e : OpcodeHexagon {
642  bits <11> Ii;
643  let Inst{21-20} = Ii{10-9};
644  let Inst{7-1} = Ii{8-2};
645  bits <3> Ns8;
646  let Inst{18-16} = Ns8{2-0};
647  bits <5> Rt32;
648  let Inst{12-8} = Rt32{4-0};
649}
650class Enc_6a5972 : OpcodeHexagon {
651  bits <11> Ii;
652  let Inst{21-20} = Ii{10-9};
653  let Inst{7-1} = Ii{8-2};
654  bits <4> Rs16;
655  let Inst{19-16} = Rs16{3-0};
656  bits <4> Rt16;
657  let Inst{11-8} = Rt16{3-0};
658}
659class Enc_eafd18 : OpcodeHexagon {
660  bits <5> II;
661  let Inst{12-8} = II{4-0};
662  bits <11> Ii;
663  let Inst{21-20} = Ii{10-9};
664  let Inst{7-1} = Ii{8-2};
665  bits <3> Ns8;
666  let Inst{18-16} = Ns8{2-0};
667}
668class Enc_14d27a : OpcodeHexagon {
669  bits <5> II;
670  let Inst{12-8} = II{4-0};
671  bits <11> Ii;
672  let Inst{21-20} = Ii{10-9};
673  let Inst{7-1} = Ii{8-2};
674  bits <4> Rs16;
675  let Inst{19-16} = Rs16{3-0};
676}
677class Enc_e90a15 : OpcodeHexagon {
678  bits <11> Ii;
679  let Inst{21-20} = Ii{10-9};
680  let Inst{7-1} = Ii{8-2};
681  bits <3> Ns8;
682  let Inst{18-16} = Ns8{2-0};
683  bits <4> n1;
684  let Inst{29-29} = n1{3-3};
685  let Inst{26-25} = n1{2-1};
686  let Inst{22-22} = n1{0-0};
687}
688class Enc_5a18b3 : OpcodeHexagon {
689  bits <11> Ii;
690  let Inst{21-20} = Ii{10-9};
691  let Inst{7-1} = Ii{8-2};
692  bits <3> Ns8;
693  let Inst{18-16} = Ns8{2-0};
694  bits <5> n1;
695  let Inst{29-29} = n1{4-4};
696  let Inst{26-25} = n1{3-2};
697  let Inst{22-22} = n1{1-1};
698  let Inst{13-13} = n1{0-0};
699}
700class Enc_1de724 : OpcodeHexagon {
701  bits <11> Ii;
702  let Inst{21-20} = Ii{10-9};
703  let Inst{7-1} = Ii{8-2};
704  bits <4> Rs16;
705  let Inst{19-16} = Rs16{3-0};
706  bits <4> n1;
707  let Inst{28-28} = n1{3-3};
708  let Inst{24-22} = n1{2-0};
709}
710class Enc_14640c : OpcodeHexagon {
711  bits <11> Ii;
712  let Inst{21-20} = Ii{10-9};
713  let Inst{7-1} = Ii{8-2};
714  bits <4> Rs16;
715  let Inst{19-16} = Rs16{3-0};
716  bits <5> n1;
717  let Inst{28-28} = n1{4-4};
718  let Inst{24-22} = n1{3-1};
719  let Inst{13-13} = n1{0-0};
720}
721class Enc_668704 : OpcodeHexagon {
722  bits <11> Ii;
723  let Inst{21-20} = Ii{10-9};
724  let Inst{7-1} = Ii{8-2};
725  bits <4> Rs16;
726  let Inst{19-16} = Rs16{3-0};
727  bits <5> n1;
728  let Inst{28-28} = n1{4-4};
729  let Inst{25-22} = n1{3-0};
730}
731class Enc_800e04 : OpcodeHexagon {
732  bits <11> Ii;
733  let Inst{21-20} = Ii{10-9};
734  let Inst{7-1} = Ii{8-2};
735  bits <4> Rs16;
736  let Inst{19-16} = Rs16{3-0};
737  bits <6> n1;
738  let Inst{28-28} = n1{5-5};
739  let Inst{25-22} = n1{4-1};
740  let Inst{13-13} = n1{0-0};
741}
742class Enc_4aca3a : OpcodeHexagon {
743  bits <11> Ii;
744  let Inst{21-20} = Ii{10-9};
745  let Inst{7-1} = Ii{8-2};
746  bits <3> Ns8;
747  let Inst{18-16} = Ns8{2-0};
748  bits <3> n1;
749  let Inst{29-29} = n1{2-2};
750  let Inst{26-25} = n1{1-0};
751}
752class Enc_f7ea77 : OpcodeHexagon {
753  bits <11> Ii;
754  let Inst{21-20} = Ii{10-9};
755  let Inst{7-1} = Ii{8-2};
756  bits <3> Ns8;
757  let Inst{18-16} = Ns8{2-0};
758  bits <4> n1;
759  let Inst{29-29} = n1{3-3};
760  let Inst{26-25} = n1{2-1};
761  let Inst{13-13} = n1{0-0};
762}
763class Enc_405228 : OpcodeHexagon {
764  bits <11> Ii;
765  let Inst{21-20} = Ii{10-9};
766  let Inst{7-1} = Ii{8-2};
767  bits <4> Rs16;
768  let Inst{19-16} = Rs16{3-0};
769  bits <3> n1;
770  let Inst{28-28} = n1{2-2};
771  let Inst{24-23} = n1{1-0};
772}
773class Enc_3a2484 : OpcodeHexagon {
774  bits <11> Ii;
775  let Inst{21-20} = Ii{10-9};
776  let Inst{7-1} = Ii{8-2};
777  bits <4> Rs16;
778  let Inst{19-16} = Rs16{3-0};
779  bits <4> n1;
780  let Inst{28-28} = n1{3-3};
781  let Inst{24-23} = n1{2-1};
782  let Inst{13-13} = n1{0-0};
783}
784class Enc_736575 : OpcodeHexagon {
785  bits <11> Ii;
786  let Inst{21-20} = Ii{10-9};
787  let Inst{7-1} = Ii{8-2};
788  bits <4> Rs16;
789  let Inst{19-16} = Rs16{3-0};
790  bits <4> n1;
791  let Inst{28-28} = n1{3-3};
792  let Inst{25-23} = n1{2-0};
793}
794class Enc_8e583a : OpcodeHexagon {
795  bits <11> Ii;
796  let Inst{21-20} = Ii{10-9};
797  let Inst{7-1} = Ii{8-2};
798  bits <4> Rs16;
799  let Inst{19-16} = Rs16{3-0};
800  bits <5> n1;
801  let Inst{28-28} = n1{4-4};
802  let Inst{25-23} = n1{3-1};
803  let Inst{13-13} = n1{0-0};
804}
805class Enc_3694bd : OpcodeHexagon {
806  bits <11> Ii;
807  let Inst{21-20} = Ii{10-9};
808  let Inst{7-1} = Ii{8-2};
809  bits <3> Ns8;
810  let Inst{18-16} = Ns8{2-0};
811  bits <5> n1;
812  let Inst{29-29} = n1{4-4};
813  let Inst{26-25} = n1{3-2};
814  let Inst{23-22} = n1{1-0};
815}
816class Enc_a6853f : OpcodeHexagon {
817  bits <11> Ii;
818  let Inst{21-20} = Ii{10-9};
819  let Inst{7-1} = Ii{8-2};
820  bits <3> Ns8;
821  let Inst{18-16} = Ns8{2-0};
822  bits <6> n1;
823  let Inst{29-29} = n1{5-5};
824  let Inst{26-25} = n1{4-3};
825  let Inst{23-22} = n1{2-1};
826  let Inst{13-13} = n1{0-0};
827}
828class Enc_a42857 : OpcodeHexagon {
829  bits <11> Ii;
830  let Inst{21-20} = Ii{10-9};
831  let Inst{7-1} = Ii{8-2};
832  bits <4> Rs16;
833  let Inst{19-16} = Rs16{3-0};
834  bits <5> n1;
835  let Inst{28-28} = n1{4-4};
836  let Inst{24-22} = n1{3-1};
837  let Inst{8-8} = n1{0-0};
838}
839class Enc_f6fe0b : OpcodeHexagon {
840  bits <11> Ii;
841  let Inst{21-20} = Ii{10-9};
842  let Inst{7-1} = Ii{8-2};
843  bits <4> Rs16;
844  let Inst{19-16} = Rs16{3-0};
845  bits <6> n1;
846  let Inst{28-28} = n1{5-5};
847  let Inst{24-22} = n1{4-2};
848  let Inst{13-13} = n1{1-1};
849  let Inst{8-8} = n1{0-0};
850}
851class Enc_3e3989 : OpcodeHexagon {
852  bits <11> Ii;
853  let Inst{21-20} = Ii{10-9};
854  let Inst{7-1} = Ii{8-2};
855  bits <4> Rs16;
856  let Inst{19-16} = Rs16{3-0};
857  bits <6> n1;
858  let Inst{28-28} = n1{5-5};
859  let Inst{25-22} = n1{4-1};
860  let Inst{8-8} = n1{0-0};
861}
862class Enc_b909d2 : OpcodeHexagon {
863  bits <11> Ii;
864  let Inst{21-20} = Ii{10-9};
865  let Inst{7-1} = Ii{8-2};
866  bits <4> Rs16;
867  let Inst{19-16} = Rs16{3-0};
868  bits <7> n1;
869  let Inst{28-28} = n1{6-6};
870  let Inst{25-22} = n1{5-2};
871  let Inst{13-13} = n1{1-1};
872  let Inst{8-8} = n1{0-0};
873}
874class Enc_f82302 : OpcodeHexagon {
875  bits <11> Ii;
876  let Inst{21-20} = Ii{10-9};
877  let Inst{7-1} = Ii{8-2};
878  bits <3> Ns8;
879  let Inst{18-16} = Ns8{2-0};
880  bits <4> n1;
881  let Inst{29-29} = n1{3-3};
882  let Inst{26-25} = n1{2-1};
883  let Inst{23-23} = n1{0-0};
884}
885class Enc_6413b6 : OpcodeHexagon {
886  bits <11> Ii;
887  let Inst{21-20} = Ii{10-9};
888  let Inst{7-1} = Ii{8-2};
889  bits <3> Ns8;
890  let Inst{18-16} = Ns8{2-0};
891  bits <5> n1;
892  let Inst{29-29} = n1{4-4};
893  let Inst{26-25} = n1{3-2};
894  let Inst{23-23} = n1{1-1};
895  let Inst{13-13} = n1{0-0};
896}
897class Enc_b78edd : OpcodeHexagon {
898  bits <11> Ii;
899  let Inst{21-20} = Ii{10-9};
900  let Inst{7-1} = Ii{8-2};
901  bits <4> Rs16;
902  let Inst{19-16} = Rs16{3-0};
903  bits <4> n1;
904  let Inst{28-28} = n1{3-3};
905  let Inst{24-23} = n1{2-1};
906  let Inst{8-8} = n1{0-0};
907}
908class Enc_041d7b : OpcodeHexagon {
909  bits <11> Ii;
910  let Inst{21-20} = Ii{10-9};
911  let Inst{7-1} = Ii{8-2};
912  bits <4> Rs16;
913  let Inst{19-16} = Rs16{3-0};
914  bits <5> n1;
915  let Inst{28-28} = n1{4-4};
916  let Inst{24-23} = n1{3-2};
917  let Inst{13-13} = n1{1-1};
918  let Inst{8-8} = n1{0-0};
919}
920class Enc_b1e1fb : OpcodeHexagon {
921  bits <11> Ii;
922  let Inst{21-20} = Ii{10-9};
923  let Inst{7-1} = Ii{8-2};
924  bits <4> Rs16;
925  let Inst{19-16} = Rs16{3-0};
926  bits <5> n1;
927  let Inst{28-28} = n1{4-4};
928  let Inst{25-23} = n1{3-1};
929  let Inst{8-8} = n1{0-0};
930}
931class Enc_178717 : OpcodeHexagon {
932  bits <11> Ii;
933  let Inst{21-20} = Ii{10-9};
934  let Inst{7-1} = Ii{8-2};
935  bits <4> Rs16;
936  let Inst{19-16} = Rs16{3-0};
937  bits <6> n1;
938  let Inst{28-28} = n1{5-5};
939  let Inst{25-23} = n1{4-2};
940  let Inst{13-13} = n1{1-1};
941  let Inst{8-8} = n1{0-0};
942}
943class Enc_5de85f : OpcodeHexagon {
944  bits <11> Ii;
945  let Inst{21-20} = Ii{10-9};
946  let Inst{7-1} = Ii{8-2};
947  bits <5> Rt32;
948  let Inst{12-8} = Rt32{4-0};
949  bits <3> Ns8;
950  let Inst{18-16} = Ns8{2-0};
951}
952class Enc_9e4c3f : OpcodeHexagon {
953  bits <6> II;
954  let Inst{13-8} = II{5-0};
955  bits <11> Ii;
956  let Inst{21-20} = Ii{10-9};
957  let Inst{7-1} = Ii{8-2};
958  bits <4> Rd16;
959  let Inst{19-16} = Rd16{3-0};
960}
961class Enc_66bce1 : OpcodeHexagon {
962  bits <11> Ii;
963  let Inst{21-20} = Ii{10-9};
964  let Inst{7-1} = Ii{8-2};
965  bits <4> Rs16;
966  let Inst{19-16} = Rs16{3-0};
967  bits <4> Rd16;
968  let Inst{11-8} = Rd16{3-0};
969}
970class Enc_69d63b : OpcodeHexagon {
971  bits <11> Ii;
972  let Inst{21-20} = Ii{10-9};
973  let Inst{7-1} = Ii{8-2};
974  bits <3> Ns8;
975  let Inst{18-16} = Ns8{2-0};
976}
977class Enc_ad1c74 : OpcodeHexagon {
978  bits <11> Ii;
979  let Inst{21-20} = Ii{10-9};
980  let Inst{7-1} = Ii{8-2};
981  bits <4> Rs16;
982  let Inst{19-16} = Rs16{3-0};
983}
984class Enc_a27588 : OpcodeHexagon {
985  bits <11> Ii;
986  let Inst{26-25} = Ii{10-9};
987  let Inst{13-5} = Ii{8-0};
988  bits <5> Rs32;
989  let Inst{20-16} = Rs32{4-0};
990  bits <5> Ryy32;
991  let Inst{4-0} = Ryy32{4-0};
992}
993class Enc_1f5d8f : OpcodeHexagon {
994  bits <1> Mu2;
995  let Inst{13-13} = Mu2{0-0};
996  bits <5> Ryy32;
997  let Inst{4-0} = Ryy32{4-0};
998  bits <5> Rx32;
999  let Inst{20-16} = Rx32{4-0};
1000}
1001class Enc_74aef2 : OpcodeHexagon {
1002  bits <4> Ii;
1003  let Inst{8-5} = Ii{3-0};
1004  bits <1> Mu2;
1005  let Inst{13-13} = Mu2{0-0};
1006  bits <5> Ryy32;
1007  let Inst{4-0} = Ryy32{4-0};
1008  bits <5> Rx32;
1009  let Inst{20-16} = Rx32{4-0};
1010}
1011class Enc_6b197f : OpcodeHexagon {
1012  bits <4> Ii;
1013  let Inst{8-5} = Ii{3-0};
1014  bits <5> Ryy32;
1015  let Inst{4-0} = Ryy32{4-0};
1016  bits <5> Rx32;
1017  let Inst{20-16} = Rx32{4-0};
1018}
1019class Enc_5cd7e9 : OpcodeHexagon {
1020  bits <12> Ii;
1021  let Inst{26-25} = Ii{11-10};
1022  let Inst{13-5} = Ii{9-1};
1023  bits <5> Rs32;
1024  let Inst{20-16} = Rs32{4-0};
1025  bits <5> Ryy32;
1026  let Inst{4-0} = Ryy32{4-0};
1027}
1028class Enc_9e2e1c : OpcodeHexagon {
1029  bits <5> Ii;
1030  let Inst{8-5} = Ii{4-1};
1031  bits <1> Mu2;
1032  let Inst{13-13} = Mu2{0-0};
1033  bits <5> Ryy32;
1034  let Inst{4-0} = Ryy32{4-0};
1035  bits <5> Rx32;
1036  let Inst{20-16} = Rx32{4-0};
1037}
1038class Enc_bd1cbc : OpcodeHexagon {
1039  bits <5> Ii;
1040  let Inst{8-5} = Ii{4-1};
1041  bits <5> Ryy32;
1042  let Inst{4-0} = Ryy32{4-0};
1043  bits <5> Rx32;
1044  let Inst{20-16} = Rx32{4-0};
1045}
1046class Enc_de0214 : OpcodeHexagon {
1047  bits <12> Ii;
1048  let Inst{26-25} = Ii{11-10};
1049  let Inst{13-5} = Ii{9-1};
1050  bits <5> Rs32;
1051  let Inst{20-16} = Rs32{4-0};
1052  bits <5> Rd32;
1053  let Inst{4-0} = Rd32{4-0};
1054}
1055class Enc_74d4e5 : OpcodeHexagon {
1056  bits <1> Mu2;
1057  let Inst{13-13} = Mu2{0-0};
1058  bits <5> Rd32;
1059  let Inst{4-0} = Rd32{4-0};
1060  bits <5> Rx32;
1061  let Inst{20-16} = Rx32{4-0};
1062}
1063class Enc_e83554 : OpcodeHexagon {
1064  bits <5> Ii;
1065  let Inst{8-5} = Ii{4-1};
1066  bits <1> Mu2;
1067  let Inst{13-13} = Mu2{0-0};
1068  bits <5> Rd32;
1069  let Inst{4-0} = Rd32{4-0};
1070  bits <5> Rx32;
1071  let Inst{20-16} = Rx32{4-0};
1072}
1073class Enc_152467 : OpcodeHexagon {
1074  bits <5> Ii;
1075  let Inst{8-5} = Ii{4-1};
1076  bits <5> Rd32;
1077  let Inst{4-0} = Rd32{4-0};
1078  bits <5> Rx32;
1079  let Inst{20-16} = Rx32{4-0};
1080}
1081class Enc_2d7491 : OpcodeHexagon {
1082  bits <13> Ii;
1083  let Inst{26-25} = Ii{12-11};
1084  let Inst{13-5} = Ii{10-2};
1085  bits <5> Rs32;
1086  let Inst{20-16} = Rs32{4-0};
1087  bits <5> Rdd32;
1088  let Inst{4-0} = Rdd32{4-0};
1089}
1090class Enc_7eee72 : OpcodeHexagon {
1091  bits <1> Mu2;
1092  let Inst{13-13} = Mu2{0-0};
1093  bits <5> Rdd32;
1094  let Inst{4-0} = Rdd32{4-0};
1095  bits <5> Rx32;
1096  let Inst{20-16} = Rx32{4-0};
1097}
1098class Enc_70b24b : OpcodeHexagon {
1099  bits <6> Ii;
1100  let Inst{8-5} = Ii{5-2};
1101  bits <1> Mu2;
1102  let Inst{13-13} = Mu2{0-0};
1103  bits <5> Rdd32;
1104  let Inst{4-0} = Rdd32{4-0};
1105  bits <5> Rx32;
1106  let Inst{20-16} = Rx32{4-0};
1107}
1108class Enc_71f1b4 : OpcodeHexagon {
1109  bits <6> Ii;
1110  let Inst{8-5} = Ii{5-2};
1111  bits <5> Rdd32;
1112  let Inst{4-0} = Rdd32{4-0};
1113  bits <5> Rx32;
1114  let Inst{20-16} = Rx32{4-0};
1115}
1116class Enc_211aaa : OpcodeHexagon {
1117  bits <11> Ii;
1118  let Inst{26-25} = Ii{10-9};
1119  let Inst{13-5} = Ii{8-0};
1120  bits <5> Rs32;
1121  let Inst{20-16} = Rs32{4-0};
1122  bits <5> Rd32;
1123  let Inst{4-0} = Rd32{4-0};
1124}
1125class Enc_e0a47a : OpcodeHexagon {
1126  bits <4> Ii;
1127  let Inst{8-5} = Ii{3-0};
1128  bits <1> Mu2;
1129  let Inst{13-13} = Mu2{0-0};
1130  bits <5> Rd32;
1131  let Inst{4-0} = Rd32{4-0};
1132  bits <5> Rx32;
1133  let Inst{20-16} = Rx32{4-0};
1134}
1135class Enc_222336 : OpcodeHexagon {
1136  bits <4> Ii;
1137  let Inst{8-5} = Ii{3-0};
1138  bits <5> Rd32;
1139  let Inst{4-0} = Rd32{4-0};
1140  bits <5> Rx32;
1141  let Inst{20-16} = Rx32{4-0};
1142}
1143class Enc_25bef0 : OpcodeHexagon {
1144  bits <16> Ii;
1145  let Inst{26-25} = Ii{15-14};
1146  let Inst{20-16} = Ii{13-9};
1147  let Inst{13-5} = Ii{8-0};
1148  bits <5> Rd32;
1149  let Inst{4-0} = Rd32{4-0};
1150}
1151class Enc_fa3ba4 : OpcodeHexagon {
1152  bits <14> Ii;
1153  let Inst{26-25} = Ii{13-12};
1154  let Inst{13-5} = Ii{11-3};
1155  bits <5> Rs32;
1156  let Inst{20-16} = Rs32{4-0};
1157  bits <5> Rdd32;
1158  let Inst{4-0} = Rdd32{4-0};
1159}
1160class Enc_b05839 : OpcodeHexagon {
1161  bits <7> Ii;
1162  let Inst{8-5} = Ii{6-3};
1163  bits <1> Mu2;
1164  let Inst{13-13} = Mu2{0-0};
1165  bits <5> Rdd32;
1166  let Inst{4-0} = Rdd32{4-0};
1167  bits <5> Rx32;
1168  let Inst{20-16} = Rx32{4-0};
1169}
1170class Enc_5bdd42 : OpcodeHexagon {
1171  bits <7> Ii;
1172  let Inst{8-5} = Ii{6-3};
1173  bits <5> Rdd32;
1174  let Inst{4-0} = Rdd32{4-0};
1175  bits <5> Rx32;
1176  let Inst{20-16} = Rx32{4-0};
1177}
1178class Enc_509701 : OpcodeHexagon {
1179  bits <19> Ii;
1180  let Inst{26-25} = Ii{18-17};
1181  let Inst{20-16} = Ii{16-12};
1182  let Inst{13-5} = Ii{11-3};
1183  bits <5> Rdd32;
1184  let Inst{4-0} = Rdd32{4-0};
1185}
1186class Enc_8df4be : OpcodeHexagon {
1187  bits <17> Ii;
1188  let Inst{26-25} = Ii{16-15};
1189  let Inst{20-16} = Ii{14-10};
1190  let Inst{13-5} = Ii{9-1};
1191  bits <5> Rd32;
1192  let Inst{4-0} = Rd32{4-0};
1193}
1194class Enc_2a3787 : OpcodeHexagon {
1195  bits <13> Ii;
1196  let Inst{26-25} = Ii{12-11};
1197  let Inst{13-5} = Ii{10-2};
1198  bits <5> Rs32;
1199  let Inst{20-16} = Rs32{4-0};
1200  bits <5> Rd32;
1201  let Inst{4-0} = Rd32{4-0};
1202}
1203class Enc_27fd0e : OpcodeHexagon {
1204  bits <6> Ii;
1205  let Inst{8-5} = Ii{5-2};
1206  bits <1> Mu2;
1207  let Inst{13-13} = Mu2{0-0};
1208  bits <5> Rd32;
1209  let Inst{4-0} = Rd32{4-0};
1210  bits <5> Rx32;
1211  let Inst{20-16} = Rx32{4-0};
1212}
1213class Enc_3d920a : OpcodeHexagon {
1214  bits <6> Ii;
1215  let Inst{8-5} = Ii{5-2};
1216  bits <5> Rd32;
1217  let Inst{4-0} = Rd32{4-0};
1218  bits <5> Rx32;
1219  let Inst{20-16} = Rx32{4-0};
1220}
1221class Enc_4f4ed7 : OpcodeHexagon {
1222  bits <18> Ii;
1223  let Inst{26-25} = Ii{17-16};
1224  let Inst{20-16} = Ii{15-11};
1225  let Inst{13-5} = Ii{10-2};
1226  bits <5> Rd32;
1227  let Inst{4-0} = Rd32{4-0};
1228}
1229class Enc_a21d47 : OpcodeHexagon {
1230  bits <6> Ii;
1231  let Inst{10-5} = Ii{5-0};
1232  bits <2> Pt4;
1233  let Inst{12-11} = Pt4{1-0};
1234  bits <5> Rs32;
1235  let Inst{20-16} = Rs32{4-0};
1236  bits <5> Rd32;
1237  let Inst{4-0} = Rd32{4-0};
1238}
1239class Enc_f4413a : OpcodeHexagon {
1240  bits <4> Ii;
1241  let Inst{8-5} = Ii{3-0};
1242  bits <2> Pt4;
1243  let Inst{10-9} = Pt4{1-0};
1244  bits <5> Rd32;
1245  let Inst{4-0} = Rd32{4-0};
1246  bits <5> Rx32;
1247  let Inst{20-16} = Rx32{4-0};
1248}
1249class Enc_acd6ed : OpcodeHexagon {
1250  bits <9> Ii;
1251  let Inst{10-5} = Ii{8-3};
1252  bits <2> Pt4;
1253  let Inst{12-11} = Pt4{1-0};
1254  bits <5> Rs32;
1255  let Inst{20-16} = Rs32{4-0};
1256  bits <5> Rdd32;
1257  let Inst{4-0} = Rdd32{4-0};
1258}
1259class Enc_9d1247 : OpcodeHexagon {
1260  bits <7> Ii;
1261  let Inst{8-5} = Ii{6-3};
1262  bits <2> Pt4;
1263  let Inst{10-9} = Pt4{1-0};
1264  bits <5> Rdd32;
1265  let Inst{4-0} = Rdd32{4-0};
1266  bits <5> Rx32;
1267  let Inst{20-16} = Rx32{4-0};
1268}
1269class Enc_a198f6 : OpcodeHexagon {
1270  bits <7> Ii;
1271  let Inst{10-5} = Ii{6-1};
1272  bits <2> Pt4;
1273  let Inst{12-11} = Pt4{1-0};
1274  bits <5> Rs32;
1275  let Inst{20-16} = Rs32{4-0};
1276  bits <5> Rd32;
1277  let Inst{4-0} = Rd32{4-0};
1278}
1279class Enc_733b27 : OpcodeHexagon {
1280  bits <5> Ii;
1281  let Inst{8-5} = Ii{4-1};
1282  bits <2> Pt4;
1283  let Inst{10-9} = Pt4{1-0};
1284  bits <5> Rd32;
1285  let Inst{4-0} = Rd32{4-0};
1286  bits <5> Rx32;
1287  let Inst{20-16} = Rx32{4-0};
1288}
1289class Enc_f82eaf : OpcodeHexagon {
1290  bits <8> Ii;
1291  let Inst{10-5} = Ii{7-2};
1292  bits <2> Pt4;
1293  let Inst{12-11} = Pt4{1-0};
1294  bits <5> Rs32;
1295  let Inst{20-16} = Rs32{4-0};
1296  bits <5> Rd32;
1297  let Inst{4-0} = Rd32{4-0};
1298}
1299class Enc_b97f71 : OpcodeHexagon {
1300  bits <6> Ii;
1301  let Inst{8-5} = Ii{5-2};
1302  bits <2> Pt4;
1303  let Inst{10-9} = Pt4{1-0};
1304  bits <5> Rd32;
1305  let Inst{4-0} = Rd32{4-0};
1306  bits <5> Rx32;
1307  let Inst{20-16} = Rx32{4-0};
1308}
1309class Enc_d44e31 : OpcodeHexagon {
1310  bits <6> Ii;
1311  let Inst{12-7} = Ii{5-0};
1312  bits <5> Rs32;
1313  let Inst{20-16} = Rs32{4-0};
1314  bits <5> Rt32;
1315  let Inst{4-0} = Rt32{4-0};
1316}
1317class Enc_163a3c : OpcodeHexagon {
1318  bits <7> Ii;
1319  let Inst{12-7} = Ii{6-1};
1320  bits <5> Rs32;
1321  let Inst{20-16} = Rs32{4-0};
1322  bits <5> Rt32;
1323  let Inst{4-0} = Rt32{4-0};
1324}
1325class Enc_226535 : OpcodeHexagon {
1326  bits <8> Ii;
1327  let Inst{12-7} = Ii{7-2};
1328  bits <5> Rs32;
1329  let Inst{20-16} = Rs32{4-0};
1330  bits <5> Rt32;
1331  let Inst{4-0} = Rt32{4-0};
1332}
1333class Enc_46c951 : OpcodeHexagon {
1334  bits <6> Ii;
1335  let Inst{12-7} = Ii{5-0};
1336  bits <5> II;
1337  let Inst{4-0} = II{4-0};
1338  bits <5> Rs32;
1339  let Inst{20-16} = Rs32{4-0};
1340}
1341class Enc_e66a97 : OpcodeHexagon {
1342  bits <7> Ii;
1343  let Inst{12-7} = Ii{6-1};
1344  bits <5> II;
1345  let Inst{4-0} = II{4-0};
1346  bits <5> Rs32;
1347  let Inst{20-16} = Rs32{4-0};
1348}
1349class Enc_84b2cd : OpcodeHexagon {
1350  bits <8> Ii;
1351  let Inst{12-7} = Ii{7-2};
1352  bits <5> II;
1353  let Inst{4-0} = II{4-0};
1354  bits <5> Rs32;
1355  let Inst{20-16} = Rs32{4-0};
1356}
1357class Enc_f394d3 : OpcodeHexagon {
1358  bits <6> II;
1359  let Inst{11-8} = II{5-2};
1360  let Inst{6-5} = II{1-0};
1361  bits <5> Ryy32;
1362  let Inst{4-0} = Ryy32{4-0};
1363  bits <5> Re32;
1364  let Inst{20-16} = Re32{4-0};
1365}
1366class Enc_04c959 : OpcodeHexagon {
1367  bits <2> Ii;
1368  let Inst{13-13} = Ii{1-1};
1369  let Inst{7-7} = Ii{0-0};
1370  bits <6> II;
1371  let Inst{11-8} = II{5-2};
1372  let Inst{6-5} = II{1-0};
1373  bits <5> Rt32;
1374  let Inst{20-16} = Rt32{4-0};
1375  bits <5> Ryy32;
1376  let Inst{4-0} = Ryy32{4-0};
1377}
1378class Enc_323f2d : OpcodeHexagon {
1379  bits <6> II;
1380  let Inst{11-8} = II{5-2};
1381  let Inst{6-5} = II{1-0};
1382  bits <5> Rd32;
1383  let Inst{4-0} = Rd32{4-0};
1384  bits <5> Re32;
1385  let Inst{20-16} = Re32{4-0};
1386}
1387class Enc_4f677b : OpcodeHexagon {
1388  bits <2> Ii;
1389  let Inst{13-13} = Ii{1-1};
1390  let Inst{7-7} = Ii{0-0};
1391  bits <6> II;
1392  let Inst{11-8} = II{5-2};
1393  let Inst{6-5} = II{1-0};
1394  bits <5> Rt32;
1395  let Inst{20-16} = Rt32{4-0};
1396  bits <5> Rd32;
1397  let Inst{4-0} = Rd32{4-0};
1398}
1399class Enc_7fa7f6 : OpcodeHexagon {
1400  bits <6> II;
1401  let Inst{11-8} = II{5-2};
1402  let Inst{6-5} = II{1-0};
1403  bits <5> Rdd32;
1404  let Inst{4-0} = Rdd32{4-0};
1405  bits <5> Re32;
1406  let Inst{20-16} = Re32{4-0};
1407}
1408class Enc_6185fe : OpcodeHexagon {
1409  bits <2> Ii;
1410  let Inst{13-13} = Ii{1-1};
1411  let Inst{7-7} = Ii{0-0};
1412  bits <6> II;
1413  let Inst{11-8} = II{5-2};
1414  let Inst{6-5} = II{1-0};
1415  bits <5> Rt32;
1416  let Inst{20-16} = Rt32{4-0};
1417  bits <5> Rdd32;
1418  let Inst{4-0} = Rdd32{4-0};
1419}
1420class Enc_da664b : OpcodeHexagon {
1421  bits <2> Ii;
1422  let Inst{13-13} = Ii{1-1};
1423  let Inst{7-7} = Ii{0-0};
1424  bits <5> Rs32;
1425  let Inst{20-16} = Rs32{4-0};
1426  bits <5> Rt32;
1427  let Inst{12-8} = Rt32{4-0};
1428  bits <5> Rd32;
1429  let Inst{4-0} = Rd32{4-0};
1430}
1431class Enc_84bff1 : OpcodeHexagon {
1432  bits <2> Ii;
1433  let Inst{13-13} = Ii{1-1};
1434  let Inst{7-7} = Ii{0-0};
1435  bits <5> Rs32;
1436  let Inst{20-16} = Rs32{4-0};
1437  bits <5> Rt32;
1438  let Inst{12-8} = Rt32{4-0};
1439  bits <5> Rdd32;
1440  let Inst{4-0} = Rdd32{4-0};
1441}
1442class Enc_2301d6 : OpcodeHexagon {
1443  bits <6> Ii;
1444  let Inst{20-16} = Ii{5-1};
1445  let Inst{8-8} = Ii{0-0};
1446  bits <2> Pt4;
1447  let Inst{10-9} = Pt4{1-0};
1448  bits <5> Rd32;
1449  let Inst{4-0} = Rd32{4-0};
1450}
1451class Enc_2e1979 : OpcodeHexagon {
1452  bits <2> Ii;
1453  let Inst{13-13} = Ii{1-1};
1454  let Inst{7-7} = Ii{0-0};
1455  bits <2> Pv4;
1456  let Inst{6-5} = Pv4{1-0};
1457  bits <5> Rs32;
1458  let Inst{20-16} = Rs32{4-0};
1459  bits <5> Rt32;
1460  let Inst{12-8} = Rt32{4-0};
1461  bits <5> Rd32;
1462  let Inst{4-0} = Rd32{4-0};
1463}
1464class Enc_2a7b91 : OpcodeHexagon {
1465  bits <6> Ii;
1466  let Inst{20-16} = Ii{5-1};
1467  let Inst{8-8} = Ii{0-0};
1468  bits <2> Pt4;
1469  let Inst{10-9} = Pt4{1-0};
1470  bits <5> Rdd32;
1471  let Inst{4-0} = Rdd32{4-0};
1472}
1473class Enc_98c0b8 : OpcodeHexagon {
1474  bits <2> Ii;
1475  let Inst{13-13} = Ii{1-1};
1476  let Inst{7-7} = Ii{0-0};
1477  bits <2> Pv4;
1478  let Inst{6-5} = Pv4{1-0};
1479  bits <5> Rs32;
1480  let Inst{20-16} = Rs32{4-0};
1481  bits <5> Rt32;
1482  let Inst{12-8} = Rt32{4-0};
1483  bits <5> Rdd32;
1484  let Inst{4-0} = Rdd32{4-0};
1485}
1486class Enc_b7fad3 : OpcodeHexagon {
1487  bits <2> Pv4;
1488  let Inst{9-8} = Pv4{1-0};
1489  bits <5> Rs32;
1490  let Inst{20-16} = Rs32{4-0};
1491  bits <5> Rdd32;
1492  let Inst{4-0} = Rdd32{4-0};
1493}
1494class Enc_a75aa6 : OpcodeHexagon {
1495  bits <5> Rs32;
1496  let Inst{20-16} = Rs32{4-0};
1497  bits <5> Rt32;
1498  let Inst{12-8} = Rt32{4-0};
1499  bits <1> Mu2;
1500  let Inst{13-13} = Mu2{0-0};
1501}
1502class Enc_c90aca : OpcodeHexagon {
1503  bits <8> Ii;
1504  let Inst{12-5} = Ii{7-0};
1505  bits <5> Rs32;
1506  let Inst{20-16} = Rs32{4-0};
1507  bits <5> Rx32;
1508  let Inst{4-0} = Rx32{4-0};
1509}
1510class Enc_61f0b0 : OpcodeHexagon {
1511  bits <5> Rs32;
1512  let Inst{20-16} = Rs32{4-0};
1513  bits <5> Rt32;
1514  let Inst{12-8} = Rt32{4-0};
1515  bits <5> Rxx32;
1516  let Inst{4-0} = Rxx32{4-0};
1517}
1518class Enc_a568d4 : OpcodeHexagon {
1519  bits <5> Rt32;
1520  let Inst{12-8} = Rt32{4-0};
1521  bits <5> Rs32;
1522  let Inst{20-16} = Rs32{4-0};
1523  bits <5> Rx32;
1524  let Inst{4-0} = Rx32{4-0};
1525}
1526class Enc_3d5b28 : OpcodeHexagon {
1527  bits <5> Rss32;
1528  let Inst{20-16} = Rss32{4-0};
1529  bits <5> Rt32;
1530  let Inst{12-8} = Rt32{4-0};
1531  bits <5> Rd32;
1532  let Inst{4-0} = Rd32{4-0};
1533}
1534class Enc_322e1b : OpcodeHexagon {
1535  bits <6> Ii;
1536  let Inst{22-21} = Ii{5-4};
1537  let Inst{13-13} = Ii{3-3};
1538  let Inst{7-5} = Ii{2-0};
1539  bits <6> II;
1540  let Inst{23-23} = II{5-5};
1541  let Inst{4-0} = II{4-0};
1542  bits <5> Rs32;
1543  let Inst{20-16} = Rs32{4-0};
1544  bits <5> Rd32;
1545  let Inst{12-8} = Rd32{4-0};
1546}
1547class Enc_420cf3 : OpcodeHexagon {
1548  bits <6> Ii;
1549  let Inst{22-21} = Ii{5-4};
1550  let Inst{13-13} = Ii{3-3};
1551  let Inst{7-5} = Ii{2-0};
1552  bits <5> Ru32;
1553  let Inst{4-0} = Ru32{4-0};
1554  bits <5> Rs32;
1555  let Inst{20-16} = Rs32{4-0};
1556  bits <5> Rd32;
1557  let Inst{12-8} = Rd32{4-0};
1558}
1559class Enc_277737 : OpcodeHexagon {
1560  bits <8> Ii;
1561  let Inst{22-21} = Ii{7-6};
1562  let Inst{13-13} = Ii{5-5};
1563  let Inst{7-5} = Ii{4-2};
1564  bits <5> Ru32;
1565  let Inst{4-0} = Ru32{4-0};
1566  bits <5> Rs32;
1567  let Inst{20-16} = Rs32{4-0};
1568  bits <5> Rd32;
1569  let Inst{12-8} = Rd32{4-0};
1570}
1571class Enc_a7b8e8 : OpcodeHexagon {
1572  bits <6> Ii;
1573  let Inst{22-21} = Ii{5-4};
1574  let Inst{13-13} = Ii{3-3};
1575  let Inst{7-5} = Ii{2-0};
1576  bits <5> Rs32;
1577  let Inst{20-16} = Rs32{4-0};
1578  bits <5> Rt32;
1579  let Inst{12-8} = Rt32{4-0};
1580  bits <5> Rd32;
1581  let Inst{4-0} = Rd32{4-0};
1582}
1583class Enc_7f1a05 : OpcodeHexagon {
1584  bits <5> Ru32;
1585  let Inst{4-0} = Ru32{4-0};
1586  bits <5> Rs32;
1587  let Inst{20-16} = Rs32{4-0};
1588  bits <5> Ry32;
1589  let Inst{12-8} = Ry32{4-0};
1590}
1591class Enc_1b64fb : OpcodeHexagon {
1592  bits <16> Ii;
1593  let Inst{26-25} = Ii{15-14};
1594  let Inst{20-16} = Ii{13-9};
1595  let Inst{13-13} = Ii{8-8};
1596  let Inst{7-0} = Ii{7-0};
1597  bits <5> Rt32;
1598  let Inst{12-8} = Rt32{4-0};
1599}
1600class Enc_ad1831 : OpcodeHexagon {
1601  bits <16> Ii;
1602  let Inst{26-25} = Ii{15-14};
1603  let Inst{20-16} = Ii{13-9};
1604  let Inst{13-13} = Ii{8-8};
1605  let Inst{7-0} = Ii{7-0};
1606  bits <3> Nt8;
1607  let Inst{10-8} = Nt8{2-0};
1608}
1609class Enc_5c124a : OpcodeHexagon {
1610  bits <19> Ii;
1611  let Inst{26-25} = Ii{18-17};
1612  let Inst{20-16} = Ii{16-12};
1613  let Inst{13-13} = Ii{11-11};
1614  let Inst{7-0} = Ii{10-3};
1615  bits <5> Rtt32;
1616  let Inst{12-8} = Rtt32{4-0};
1617}
1618class Enc_fda92c : OpcodeHexagon {
1619  bits <17> Ii;
1620  let Inst{26-25} = Ii{16-15};
1621  let Inst{20-16} = Ii{14-10};
1622  let Inst{13-13} = Ii{9-9};
1623  let Inst{7-0} = Ii{8-1};
1624  bits <5> Rt32;
1625  let Inst{12-8} = Rt32{4-0};
1626}
1627class Enc_bc03e5 : OpcodeHexagon {
1628  bits <17> Ii;
1629  let Inst{26-25} = Ii{16-15};
1630  let Inst{20-16} = Ii{14-10};
1631  let Inst{13-13} = Ii{9-9};
1632  let Inst{7-0} = Ii{8-1};
1633  bits <3> Nt8;
1634  let Inst{10-8} = Nt8{2-0};
1635}
1636class Enc_541f26 : OpcodeHexagon {
1637  bits <18> Ii;
1638  let Inst{26-25} = Ii{17-16};
1639  let Inst{20-16} = Ii{15-11};
1640  let Inst{13-13} = Ii{10-10};
1641  let Inst{7-0} = Ii{9-2};
1642  bits <5> Rt32;
1643  let Inst{12-8} = Rt32{4-0};
1644}
1645class Enc_78cbf0 : OpcodeHexagon {
1646  bits <18> Ii;
1647  let Inst{26-25} = Ii{17-16};
1648  let Inst{20-16} = Ii{15-11};
1649  let Inst{13-13} = Ii{10-10};
1650  let Inst{7-0} = Ii{9-2};
1651  bits <3> Nt8;
1652  let Inst{10-8} = Nt8{2-0};
1653}
1654class Enc_47ef61 : OpcodeHexagon {
1655  bits <3> Ii;
1656  let Inst{7-5} = Ii{2-0};
1657  bits <5> Rt32;
1658  let Inst{12-8} = Rt32{4-0};
1659  bits <5> Rs32;
1660  let Inst{20-16} = Rs32{4-0};
1661  bits <5> Rd32;
1662  let Inst{4-0} = Rd32{4-0};
1663}
1664class Enc_22c845 : OpcodeHexagon {
1665  bits <14> Ii;
1666  let Inst{10-0} = Ii{13-3};
1667  bits <5> Rx32;
1668  let Inst{20-16} = Rx32{4-0};
1669}
1670class Enc_70fb07 : OpcodeHexagon {
1671  bits <6> Ii;
1672  let Inst{13-8} = Ii{5-0};
1673  bits <5> Rss32;
1674  let Inst{20-16} = Rss32{4-0};
1675  bits <5> Rxx32;
1676  let Inst{4-0} = Rxx32{4-0};
1677}
1678class Enc_28a2dc : OpcodeHexagon {
1679  bits <5> Ii;
1680  let Inst{12-8} = Ii{4-0};
1681  bits <5> Rs32;
1682  let Inst{20-16} = Rs32{4-0};
1683  bits <5> Rx32;
1684  let Inst{4-0} = Rx32{4-0};
1685}
1686class Enc_12b6e9 : OpcodeHexagon {
1687  bits <4> Ii;
1688  let Inst{11-8} = Ii{3-0};
1689  bits <5> Rss32;
1690  let Inst{20-16} = Rss32{4-0};
1691  bits <5> Rdd32;
1692  let Inst{4-0} = Rdd32{4-0};
1693}
1694class Enc_1aa186 : OpcodeHexagon {
1695  bits <5> Rss32;
1696  let Inst{20-16} = Rss32{4-0};
1697  bits <5> Rt32;
1698  let Inst{12-8} = Rt32{4-0};
1699  bits <5> Rxx32;
1700  let Inst{4-0} = Rxx32{4-0};
1701}
1702class Enc_8dec2e : OpcodeHexagon {
1703  bits <5> Ii;
1704  let Inst{12-8} = Ii{4-0};
1705  bits <5> Rss32;
1706  let Inst{20-16} = Rss32{4-0};
1707  bits <5> Rd32;
1708  let Inst{4-0} = Rd32{4-0};
1709}
1710class Enc_b388cf : OpcodeHexagon {
1711  bits <5> Ii;
1712  let Inst{12-8} = Ii{4-0};
1713  bits <5> II;
1714  let Inst{22-21} = II{4-3};
1715  let Inst{7-5} = II{2-0};
1716  bits <5> Rs32;
1717  let Inst{20-16} = Rs32{4-0};
1718  bits <5> Rd32;
1719  let Inst{4-0} = Rd32{4-0};
1720}
1721class Enc_e07374 : OpcodeHexagon {
1722  bits <5> Rs32;
1723  let Inst{20-16} = Rs32{4-0};
1724  bits <5> Rtt32;
1725  let Inst{12-8} = Rtt32{4-0};
1726  bits <5> Rd32;
1727  let Inst{4-0} = Rd32{4-0};
1728}
1729class Enc_b84c4c : OpcodeHexagon {
1730  bits <6> Ii;
1731  let Inst{13-8} = Ii{5-0};
1732  bits <6> II;
1733  let Inst{23-21} = II{5-3};
1734  let Inst{7-5} = II{2-0};
1735  bits <5> Rss32;
1736  let Inst{20-16} = Rss32{4-0};
1737  bits <5> Rdd32;
1738  let Inst{4-0} = Rdd32{4-0};
1739}
1740class Enc_a1e29d : OpcodeHexagon {
1741  bits <5> Ii;
1742  let Inst{12-8} = Ii{4-0};
1743  bits <5> II;
1744  let Inst{22-21} = II{4-3};
1745  let Inst{7-5} = II{2-0};
1746  bits <5> Rs32;
1747  let Inst{20-16} = Rs32{4-0};
1748  bits <5> Rx32;
1749  let Inst{4-0} = Rx32{4-0};
1750}
1751class Enc_179b35 : OpcodeHexagon {
1752  bits <5> Rs32;
1753  let Inst{20-16} = Rs32{4-0};
1754  bits <5> Rtt32;
1755  let Inst{12-8} = Rtt32{4-0};
1756  bits <5> Rx32;
1757  let Inst{4-0} = Rx32{4-0};
1758}
1759class Enc_143a3c : OpcodeHexagon {
1760  bits <6> Ii;
1761  let Inst{13-8} = Ii{5-0};
1762  bits <6> II;
1763  let Inst{23-21} = II{5-3};
1764  let Inst{7-5} = II{2-0};
1765  bits <5> Rss32;
1766  let Inst{20-16} = Rss32{4-0};
1767  bits <5> Rxx32;
1768  let Inst{4-0} = Rxx32{4-0};
1769}
1770class Enc_c85e2a : OpcodeHexagon {
1771  bits <5> Ii;
1772  let Inst{12-8} = Ii{4-0};
1773  bits <5> II;
1774  let Inst{22-21} = II{4-3};
1775  let Inst{7-5} = II{2-0};
1776  bits <5> Rd32;
1777  let Inst{4-0} = Rd32{4-0};
1778}
1779class Enc_da8d43 : OpcodeHexagon {
1780  bits <6> Ii;
1781  let Inst{13-13} = Ii{5-5};
1782  let Inst{7-3} = Ii{4-0};
1783  bits <2> Pv4;
1784  let Inst{1-0} = Pv4{1-0};
1785  bits <5> Rs32;
1786  let Inst{20-16} = Rs32{4-0};
1787  bits <5> Rt32;
1788  let Inst{12-8} = Rt32{4-0};
1789}
1790class Enc_cc449f : OpcodeHexagon {
1791  bits <4> Ii;
1792  let Inst{6-3} = Ii{3-0};
1793  bits <2> Pv4;
1794  let Inst{1-0} = Pv4{1-0};
1795  bits <5> Rt32;
1796  let Inst{12-8} = Rt32{4-0};
1797  bits <5> Rx32;
1798  let Inst{20-16} = Rx32{4-0};
1799}
1800class Enc_585242 : OpcodeHexagon {
1801  bits <6> Ii;
1802  let Inst{13-13} = Ii{5-5};
1803  let Inst{7-3} = Ii{4-0};
1804  bits <2> Pv4;
1805  let Inst{1-0} = Pv4{1-0};
1806  bits <5> Rs32;
1807  let Inst{20-16} = Rs32{4-0};
1808  bits <3> Nt8;
1809  let Inst{10-8} = Nt8{2-0};
1810}
1811class Enc_52a5dd : OpcodeHexagon {
1812  bits <4> Ii;
1813  let Inst{6-3} = Ii{3-0};
1814  bits <2> Pv4;
1815  let Inst{1-0} = Pv4{1-0};
1816  bits <3> Nt8;
1817  let Inst{10-8} = Nt8{2-0};
1818  bits <5> Rx32;
1819  let Inst{20-16} = Rx32{4-0};
1820}
1821class Enc_57a33e : OpcodeHexagon {
1822  bits <9> Ii;
1823  let Inst{13-13} = Ii{8-8};
1824  let Inst{7-3} = Ii{7-3};
1825  bits <2> Pv4;
1826  let Inst{1-0} = Pv4{1-0};
1827  bits <5> Rs32;
1828  let Inst{20-16} = Rs32{4-0};
1829  bits <5> Rtt32;
1830  let Inst{12-8} = Rtt32{4-0};
1831}
1832class Enc_9a33d5 : OpcodeHexagon {
1833  bits <7> Ii;
1834  let Inst{6-3} = Ii{6-3};
1835  bits <2> Pv4;
1836  let Inst{1-0} = Pv4{1-0};
1837  bits <5> Rtt32;
1838  let Inst{12-8} = Rtt32{4-0};
1839  bits <5> Rx32;
1840  let Inst{20-16} = Rx32{4-0};
1841}
1842class Enc_e8c45e : OpcodeHexagon {
1843  bits <7> Ii;
1844  let Inst{13-13} = Ii{6-6};
1845  let Inst{7-3} = Ii{5-1};
1846  bits <2> Pv4;
1847  let Inst{1-0} = Pv4{1-0};
1848  bits <5> Rs32;
1849  let Inst{20-16} = Rs32{4-0};
1850  bits <5> Rt32;
1851  let Inst{12-8} = Rt32{4-0};
1852}
1853class Enc_b886fd : OpcodeHexagon {
1854  bits <5> Ii;
1855  let Inst{6-3} = Ii{4-1};
1856  bits <2> Pv4;
1857  let Inst{1-0} = Pv4{1-0};
1858  bits <5> Rt32;
1859  let Inst{12-8} = Rt32{4-0};
1860  bits <5> Rx32;
1861  let Inst{20-16} = Rx32{4-0};
1862}
1863class Enc_f44229 : OpcodeHexagon {
1864  bits <7> Ii;
1865  let Inst{13-13} = Ii{6-6};
1866  let Inst{7-3} = Ii{5-1};
1867  bits <2> Pv4;
1868  let Inst{1-0} = Pv4{1-0};
1869  bits <5> Rs32;
1870  let Inst{20-16} = Rs32{4-0};
1871  bits <3> Nt8;
1872  let Inst{10-8} = Nt8{2-0};
1873}
1874class Enc_31aa6a : OpcodeHexagon {
1875  bits <5> Ii;
1876  let Inst{6-3} = Ii{4-1};
1877  bits <2> Pv4;
1878  let Inst{1-0} = Pv4{1-0};
1879  bits <3> Nt8;
1880  let Inst{10-8} = Nt8{2-0};
1881  bits <5> Rx32;
1882  let Inst{20-16} = Rx32{4-0};
1883}
1884class Enc_397f23 : OpcodeHexagon {
1885  bits <8> Ii;
1886  let Inst{13-13} = Ii{7-7};
1887  let Inst{7-3} = Ii{6-2};
1888  bits <2> Pv4;
1889  let Inst{1-0} = Pv4{1-0};
1890  bits <5> Rs32;
1891  let Inst{20-16} = Rs32{4-0};
1892  bits <5> Rt32;
1893  let Inst{12-8} = Rt32{4-0};
1894}
1895class Enc_7eaeb6 : OpcodeHexagon {
1896  bits <6> Ii;
1897  let Inst{6-3} = Ii{5-2};
1898  bits <2> Pv4;
1899  let Inst{1-0} = Pv4{1-0};
1900  bits <5> Rt32;
1901  let Inst{12-8} = Rt32{4-0};
1902  bits <5> Rx32;
1903  let Inst{20-16} = Rx32{4-0};
1904}
1905class Enc_8dbdfe : OpcodeHexagon {
1906  bits <8> Ii;
1907  let Inst{13-13} = Ii{7-7};
1908  let Inst{7-3} = Ii{6-2};
1909  bits <2> Pv4;
1910  let Inst{1-0} = Pv4{1-0};
1911  bits <5> Rs32;
1912  let Inst{20-16} = Rs32{4-0};
1913  bits <3> Nt8;
1914  let Inst{10-8} = Nt8{2-0};
1915}
1916class Enc_65f095 : OpcodeHexagon {
1917  bits <6> Ii;
1918  let Inst{6-3} = Ii{5-2};
1919  bits <2> Pv4;
1920  let Inst{1-0} = Pv4{1-0};
1921  bits <3> Nt8;
1922  let Inst{10-8} = Nt8{2-0};
1923  bits <5> Rx32;
1924  let Inst{20-16} = Rx32{4-0};
1925}
1926class Enc_448f7f : OpcodeHexagon {
1927  bits <11> Ii;
1928  let Inst{26-25} = Ii{10-9};
1929  let Inst{13-13} = Ii{8-8};
1930  let Inst{7-0} = Ii{7-0};
1931  bits <5> Rs32;
1932  let Inst{20-16} = Rs32{4-0};
1933  bits <5> Rt32;
1934  let Inst{12-8} = Rt32{4-0};
1935}
1936class Enc_d5c73f : OpcodeHexagon {
1937  bits <1> Mu2;
1938  let Inst{13-13} = Mu2{0-0};
1939  bits <5> Rt32;
1940  let Inst{12-8} = Rt32{4-0};
1941  bits <5> Rx32;
1942  let Inst{20-16} = Rx32{4-0};
1943}
1944class Enc_b15941 : OpcodeHexagon {
1945  bits <4> Ii;
1946  let Inst{6-3} = Ii{3-0};
1947  bits <1> Mu2;
1948  let Inst{13-13} = Mu2{0-0};
1949  bits <5> Rt32;
1950  let Inst{12-8} = Rt32{4-0};
1951  bits <5> Rx32;
1952  let Inst{20-16} = Rx32{4-0};
1953}
1954class Enc_10bc21 : OpcodeHexagon {
1955  bits <4> Ii;
1956  let Inst{6-3} = Ii{3-0};
1957  bits <5> Rt32;
1958  let Inst{12-8} = Rt32{4-0};
1959  bits <5> Rx32;
1960  let Inst{20-16} = Rx32{4-0};
1961}
1962class Enc_4df4e9 : OpcodeHexagon {
1963  bits <11> Ii;
1964  let Inst{26-25} = Ii{10-9};
1965  let Inst{13-13} = Ii{8-8};
1966  let Inst{7-0} = Ii{7-0};
1967  bits <5> Rs32;
1968  let Inst{20-16} = Rs32{4-0};
1969  bits <3> Nt8;
1970  let Inst{10-8} = Nt8{2-0};
1971}
1972class Enc_8dbe85 : OpcodeHexagon {
1973  bits <1> Mu2;
1974  let Inst{13-13} = Mu2{0-0};
1975  bits <3> Nt8;
1976  let Inst{10-8} = Nt8{2-0};
1977  bits <5> Rx32;
1978  let Inst{20-16} = Rx32{4-0};
1979}
1980class Enc_96ce4f : OpcodeHexagon {
1981  bits <4> Ii;
1982  let Inst{6-3} = Ii{3-0};
1983  bits <1> Mu2;
1984  let Inst{13-13} = Mu2{0-0};
1985  bits <3> Nt8;
1986  let Inst{10-8} = Nt8{2-0};
1987  bits <5> Rx32;
1988  let Inst{20-16} = Rx32{4-0};
1989}
1990class Enc_c7cd90 : OpcodeHexagon {
1991  bits <4> Ii;
1992  let Inst{6-3} = Ii{3-0};
1993  bits <3> Nt8;
1994  let Inst{10-8} = Nt8{2-0};
1995  bits <5> Rx32;
1996  let Inst{20-16} = Rx32{4-0};
1997}
1998class Enc_ce6828 : OpcodeHexagon {
1999  bits <14> Ii;
2000  let Inst{26-25} = Ii{13-12};
2001  let Inst{13-13} = Ii{11-11};
2002  let Inst{7-0} = Ii{10-3};
2003  bits <5> Rs32;
2004  let Inst{20-16} = Rs32{4-0};
2005  bits <5> Rtt32;
2006  let Inst{12-8} = Rtt32{4-0};
2007}
2008class Enc_928ca1 : OpcodeHexagon {
2009  bits <1> Mu2;
2010  let Inst{13-13} = Mu2{0-0};
2011  bits <5> Rtt32;
2012  let Inst{12-8} = Rtt32{4-0};
2013  bits <5> Rx32;
2014  let Inst{20-16} = Rx32{4-0};
2015}
2016class Enc_395cc4 : OpcodeHexagon {
2017  bits <7> Ii;
2018  let Inst{6-3} = Ii{6-3};
2019  bits <1> Mu2;
2020  let Inst{13-13} = Mu2{0-0};
2021  bits <5> Rtt32;
2022  let Inst{12-8} = Rtt32{4-0};
2023  bits <5> Rx32;
2024  let Inst{20-16} = Rx32{4-0};
2025}
2026class Enc_85bf58 : OpcodeHexagon {
2027  bits <7> Ii;
2028  let Inst{6-3} = Ii{6-3};
2029  bits <5> Rtt32;
2030  let Inst{12-8} = Rtt32{4-0};
2031  bits <5> Rx32;
2032  let Inst{20-16} = Rx32{4-0};
2033}
2034class Enc_e957fb : OpcodeHexagon {
2035  bits <12> Ii;
2036  let Inst{26-25} = Ii{11-10};
2037  let Inst{13-13} = Ii{9-9};
2038  let Inst{7-0} = Ii{8-1};
2039  bits <5> Rs32;
2040  let Inst{20-16} = Rs32{4-0};
2041  bits <5> Rt32;
2042  let Inst{12-8} = Rt32{4-0};
2043}
2044class Enc_935d9b : OpcodeHexagon {
2045  bits <5> Ii;
2046  let Inst{6-3} = Ii{4-1};
2047  bits <1> Mu2;
2048  let Inst{13-13} = Mu2{0-0};
2049  bits <5> Rt32;
2050  let Inst{12-8} = Rt32{4-0};
2051  bits <5> Rx32;
2052  let Inst{20-16} = Rx32{4-0};
2053}
2054class Enc_052c7d : OpcodeHexagon {
2055  bits <5> Ii;
2056  let Inst{6-3} = Ii{4-1};
2057  bits <5> Rt32;
2058  let Inst{12-8} = Rt32{4-0};
2059  bits <5> Rx32;
2060  let Inst{20-16} = Rx32{4-0};
2061}
2062class Enc_0d8870 : OpcodeHexagon {
2063  bits <12> Ii;
2064  let Inst{26-25} = Ii{11-10};
2065  let Inst{13-13} = Ii{9-9};
2066  let Inst{7-0} = Ii{8-1};
2067  bits <5> Rs32;
2068  let Inst{20-16} = Rs32{4-0};
2069  bits <3> Nt8;
2070  let Inst{10-8} = Nt8{2-0};
2071}
2072class Enc_91b9fe : OpcodeHexagon {
2073  bits <5> Ii;
2074  let Inst{6-3} = Ii{4-1};
2075  bits <1> Mu2;
2076  let Inst{13-13} = Mu2{0-0};
2077  bits <3> Nt8;
2078  let Inst{10-8} = Nt8{2-0};
2079  bits <5> Rx32;
2080  let Inst{20-16} = Rx32{4-0};
2081}
2082class Enc_e26546 : OpcodeHexagon {
2083  bits <5> Ii;
2084  let Inst{6-3} = Ii{4-1};
2085  bits <3> Nt8;
2086  let Inst{10-8} = Nt8{2-0};
2087  bits <5> Rx32;
2088  let Inst{20-16} = Rx32{4-0};
2089}
2090class Enc_143445 : OpcodeHexagon {
2091  bits <13> Ii;
2092  let Inst{26-25} = Ii{12-11};
2093  let Inst{13-13} = Ii{10-10};
2094  let Inst{7-0} = Ii{9-2};
2095  bits <5> Rs32;
2096  let Inst{20-16} = Rs32{4-0};
2097  bits <5> Rt32;
2098  let Inst{12-8} = Rt32{4-0};
2099}
2100class Enc_79b8c8 : OpcodeHexagon {
2101  bits <6> Ii;
2102  let Inst{6-3} = Ii{5-2};
2103  bits <1> Mu2;
2104  let Inst{13-13} = Mu2{0-0};
2105  bits <5> Rt32;
2106  let Inst{12-8} = Rt32{4-0};
2107  bits <5> Rx32;
2108  let Inst{20-16} = Rx32{4-0};
2109}
2110class Enc_db40cd : OpcodeHexagon {
2111  bits <6> Ii;
2112  let Inst{6-3} = Ii{5-2};
2113  bits <5> Rt32;
2114  let Inst{12-8} = Rt32{4-0};
2115  bits <5> Rx32;
2116  let Inst{20-16} = Rx32{4-0};
2117}
2118class Enc_690862 : OpcodeHexagon {
2119  bits <13> Ii;
2120  let Inst{26-25} = Ii{12-11};
2121  let Inst{13-13} = Ii{10-10};
2122  let Inst{7-0} = Ii{9-2};
2123  bits <5> Rs32;
2124  let Inst{20-16} = Rs32{4-0};
2125  bits <3> Nt8;
2126  let Inst{10-8} = Nt8{2-0};
2127}
2128class Enc_3f97c8 : OpcodeHexagon {
2129  bits <6> Ii;
2130  let Inst{6-3} = Ii{5-2};
2131  bits <1> Mu2;
2132  let Inst{13-13} = Mu2{0-0};
2133  bits <3> Nt8;
2134  let Inst{10-8} = Nt8{2-0};
2135  bits <5> Rx32;
2136  let Inst{20-16} = Rx32{4-0};
2137}
2138class Enc_223005 : OpcodeHexagon {
2139  bits <6> Ii;
2140  let Inst{6-3} = Ii{5-2};
2141  bits <3> Nt8;
2142  let Inst{10-8} = Nt8{2-0};
2143  bits <5> Rx32;
2144  let Inst{20-16} = Rx32{4-0};
2145}
2146class Enc_cd82bc : OpcodeHexagon {
2147  bits <4> Ii;
2148  let Inst{21-21} = Ii{3-3};
2149  let Inst{7-5} = Ii{2-0};
2150  bits <6> II;
2151  let Inst{13-8} = II{5-0};
2152  bits <5> Rs32;
2153  let Inst{20-16} = Rs32{4-0};
2154  bits <5> Rx32;
2155  let Inst{4-0} = Rx32{4-0};
2156}
2157class Enc_729ff7 : OpcodeHexagon {
2158  bits <3> Ii;
2159  let Inst{7-5} = Ii{2-0};
2160  bits <5> Rtt32;
2161  let Inst{12-8} = Rtt32{4-0};
2162  bits <5> Rss32;
2163  let Inst{20-16} = Rss32{4-0};
2164  bits <5> Rdd32;
2165  let Inst{4-0} = Rdd32{4-0};
2166}
2167class Enc_8c6530 : OpcodeHexagon {
2168  bits <5> Rtt32;
2169  let Inst{12-8} = Rtt32{4-0};
2170  bits <5> Rss32;
2171  let Inst{20-16} = Rss32{4-0};
2172  bits <2> Pu4;
2173  let Inst{6-5} = Pu4{1-0};
2174  bits <5> Rdd32;
2175  let Inst{4-0} = Rdd32{4-0};
2176}
2177class Enc_d50cd3 : OpcodeHexagon {
2178  bits <3> Ii;
2179  let Inst{7-5} = Ii{2-0};
2180  bits <5> Rss32;
2181  let Inst{20-16} = Rss32{4-0};
2182  bits <5> Rtt32;
2183  let Inst{12-8} = Rtt32{4-0};
2184  bits <5> Rdd32;
2185  let Inst{4-0} = Rdd32{4-0};
2186}
2187class Enc_dbd70c : OpcodeHexagon {
2188  bits <5> Rss32;
2189  let Inst{20-16} = Rss32{4-0};
2190  bits <5> Rtt32;
2191  let Inst{12-8} = Rtt32{4-0};
2192  bits <2> Pu4;
2193  let Inst{6-5} = Pu4{1-0};
2194  bits <5> Rdd32;
2195  let Inst{4-0} = Rdd32{4-0};
2196}
2197class Enc_8b8d61 : OpcodeHexagon {
2198  bits <6> Ii;
2199  let Inst{22-21} = Ii{5-4};
2200  let Inst{13-13} = Ii{3-3};
2201  let Inst{7-5} = Ii{2-0};
2202  bits <5> Rs32;
2203  let Inst{20-16} = Rs32{4-0};
2204  bits <5> Ru32;
2205  let Inst{4-0} = Ru32{4-0};
2206  bits <5> Rd32;
2207  let Inst{12-8} = Rd32{4-0};
2208}
2209class Enc_c31910 : OpcodeHexagon {
2210  bits <8> Ii;
2211  let Inst{23-21} = Ii{7-5};
2212  let Inst{13-13} = Ii{4-4};
2213  let Inst{7-5} = Ii{3-1};
2214  let Inst{3-3} = Ii{0-0};
2215  bits <5> II;
2216  let Inst{12-8} = II{4-0};
2217  bits <5> Rx32;
2218  let Inst{20-16} = Rx32{4-0};
2219}
2220class Enc_9fae8a : OpcodeHexagon {
2221  bits <6> Ii;
2222  let Inst{13-8} = Ii{5-0};
2223  bits <5> Rs32;
2224  let Inst{20-16} = Rs32{4-0};
2225  bits <5> Rd32;
2226  let Inst{4-0} = Rd32{4-0};
2227}
2228class Enc_a1640c : OpcodeHexagon {
2229  bits <6> Ii;
2230  let Inst{13-8} = Ii{5-0};
2231  bits <5> Rss32;
2232  let Inst{20-16} = Rss32{4-0};
2233  bits <5> Rd32;
2234  let Inst{4-0} = Rd32{4-0};
2235}
2236class Enc_fef969 : OpcodeHexagon {
2237  bits <6> Ii;
2238  let Inst{20-16} = Ii{5-1};
2239  let Inst{5-5} = Ii{0-0};
2240  bits <5> Rt32;
2241  let Inst{12-8} = Rt32{4-0};
2242  bits <5> Rd32;
2243  let Inst{4-0} = Rd32{4-0};
2244}
2245class Enc_b0e9d8 : OpcodeHexagon {
2246  bits <10> Ii;
2247  let Inst{21-21} = Ii{9-9};
2248  let Inst{13-5} = Ii{8-0};
2249  bits <5> Rs32;
2250  let Inst{20-16} = Rs32{4-0};
2251  bits <5> Rx32;
2252  let Inst{4-0} = Rx32{4-0};
2253}
2254class Enc_b4e6cf : OpcodeHexagon {
2255  bits <10> Ii;
2256  let Inst{21-21} = Ii{9-9};
2257  let Inst{13-5} = Ii{8-0};
2258  bits <5> Ru32;
2259  let Inst{4-0} = Ru32{4-0};
2260  bits <5> Rx32;
2261  let Inst{20-16} = Rx32{4-0};
2262}
2263class Enc_1cf4ca : OpcodeHexagon {
2264  bits <6> Ii;
2265  let Inst{17-16} = Ii{5-4};
2266  let Inst{6-3} = Ii{3-0};
2267  bits <2> Pv4;
2268  let Inst{1-0} = Pv4{1-0};
2269  bits <5> Rt32;
2270  let Inst{12-8} = Rt32{4-0};
2271}
2272class Enc_6339d5 : OpcodeHexagon {
2273  bits <2> Ii;
2274  let Inst{13-13} = Ii{1-1};
2275  let Inst{7-7} = Ii{0-0};
2276  bits <2> Pv4;
2277  let Inst{6-5} = Pv4{1-0};
2278  bits <5> Rs32;
2279  let Inst{20-16} = Rs32{4-0};
2280  bits <5> Ru32;
2281  let Inst{12-8} = Ru32{4-0};
2282  bits <5> Rt32;
2283  let Inst{4-0} = Rt32{4-0};
2284}
2285class Enc_44215c : OpcodeHexagon {
2286  bits <6> Ii;
2287  let Inst{17-16} = Ii{5-4};
2288  let Inst{6-3} = Ii{3-0};
2289  bits <2> Pv4;
2290  let Inst{1-0} = Pv4{1-0};
2291  bits <3> Nt8;
2292  let Inst{10-8} = Nt8{2-0};
2293}
2294class Enc_47ee5e : OpcodeHexagon {
2295  bits <2> Ii;
2296  let Inst{13-13} = Ii{1-1};
2297  let Inst{7-7} = Ii{0-0};
2298  bits <2> Pv4;
2299  let Inst{6-5} = Pv4{1-0};
2300  bits <5> Rs32;
2301  let Inst{20-16} = Rs32{4-0};
2302  bits <5> Ru32;
2303  let Inst{12-8} = Ru32{4-0};
2304  bits <3> Nt8;
2305  let Inst{2-0} = Nt8{2-0};
2306}
2307class Enc_50b5ac : OpcodeHexagon {
2308  bits <6> Ii;
2309  let Inst{17-16} = Ii{5-4};
2310  let Inst{6-3} = Ii{3-0};
2311  bits <2> Pv4;
2312  let Inst{1-0} = Pv4{1-0};
2313  bits <5> Rtt32;
2314  let Inst{12-8} = Rtt32{4-0};
2315}
2316class Enc_1a9974 : OpcodeHexagon {
2317  bits <2> Ii;
2318  let Inst{13-13} = Ii{1-1};
2319  let Inst{7-7} = Ii{0-0};
2320  bits <2> Pv4;
2321  let Inst{6-5} = Pv4{1-0};
2322  bits <5> Rs32;
2323  let Inst{20-16} = Rs32{4-0};
2324  bits <5> Ru32;
2325  let Inst{12-8} = Ru32{4-0};
2326  bits <5> Rtt32;
2327  let Inst{4-0} = Rtt32{4-0};
2328}
2329class Enc_d7dc10 : OpcodeHexagon {
2330  bits <5> Rs32;
2331  let Inst{20-16} = Rs32{4-0};
2332  bits <5> Rtt32;
2333  let Inst{12-8} = Rtt32{4-0};
2334  bits <2> Pd4;
2335  let Inst{1-0} = Pd4{1-0};
2336}
2337class Enc_8203bb : OpcodeHexagon {
2338  bits <6> Ii;
2339  let Inst{12-7} = Ii{5-0};
2340  bits <8> II;
2341  let Inst{13-13} = II{7-7};
2342  let Inst{6-0} = II{6-0};
2343  bits <5> Rs32;
2344  let Inst{20-16} = Rs32{4-0};
2345}
2346class Enc_d7a65e : OpcodeHexagon {
2347  bits <6> Ii;
2348  let Inst{12-7} = Ii{5-0};
2349  bits <6> II;
2350  let Inst{13-13} = II{5-5};
2351  let Inst{4-0} = II{4-0};
2352  bits <2> Pv4;
2353  let Inst{6-5} = Pv4{1-0};
2354  bits <5> Rs32;
2355  let Inst{20-16} = Rs32{4-0};
2356}
2357class Enc_a803e0 : OpcodeHexagon {
2358  bits <7> Ii;
2359  let Inst{12-7} = Ii{6-1};
2360  bits <8> II;
2361  let Inst{13-13} = II{7-7};
2362  let Inst{6-0} = II{6-0};
2363  bits <5> Rs32;
2364  let Inst{20-16} = Rs32{4-0};
2365}
2366class Enc_f20719 : OpcodeHexagon {
2367  bits <7> Ii;
2368  let Inst{12-7} = Ii{6-1};
2369  bits <6> II;
2370  let Inst{13-13} = II{5-5};
2371  let Inst{4-0} = II{4-0};
2372  bits <2> Pv4;
2373  let Inst{6-5} = Pv4{1-0};
2374  bits <5> Rs32;
2375  let Inst{20-16} = Rs32{4-0};
2376}
2377class Enc_f37377 : OpcodeHexagon {
2378  bits <8> Ii;
2379  let Inst{12-7} = Ii{7-2};
2380  bits <8> II;
2381  let Inst{13-13} = II{7-7};
2382  let Inst{6-0} = II{6-0};
2383  bits <5> Rs32;
2384  let Inst{20-16} = Rs32{4-0};
2385}
2386class Enc_5ccba9 : OpcodeHexagon {
2387  bits <8> Ii;
2388  let Inst{12-7} = Ii{7-2};
2389  bits <6> II;
2390  let Inst{13-13} = II{5-5};
2391  let Inst{4-0} = II{4-0};
2392  bits <2> Pv4;
2393  let Inst{6-5} = Pv4{1-0};
2394  bits <5> Rs32;
2395  let Inst{20-16} = Rs32{4-0};
2396}
2397class Enc_8bcba4 : OpcodeHexagon {
2398  bits <6> II;
2399  let Inst{5-0} = II{5-0};
2400  bits <5> Rt32;
2401  let Inst{12-8} = Rt32{4-0};
2402  bits <5> Re32;
2403  let Inst{20-16} = Re32{4-0};
2404}
2405class Enc_eca7c8 : OpcodeHexagon {
2406  bits <2> Ii;
2407  let Inst{13-13} = Ii{1-1};
2408  let Inst{7-7} = Ii{0-0};
2409  bits <5> Rs32;
2410  let Inst{20-16} = Rs32{4-0};
2411  bits <5> Ru32;
2412  let Inst{12-8} = Ru32{4-0};
2413  bits <5> Rt32;
2414  let Inst{4-0} = Rt32{4-0};
2415}
2416class Enc_9ea4cf : OpcodeHexagon {
2417  bits <2> Ii;
2418  let Inst{13-13} = Ii{1-1};
2419  let Inst{6-6} = Ii{0-0};
2420  bits <6> II;
2421  let Inst{5-0} = II{5-0};
2422  bits <5> Ru32;
2423  let Inst{20-16} = Ru32{4-0};
2424  bits <5> Rt32;
2425  let Inst{12-8} = Rt32{4-0};
2426}
2427class Enc_724154 : OpcodeHexagon {
2428  bits <6> II;
2429  let Inst{5-0} = II{5-0};
2430  bits <3> Nt8;
2431  let Inst{10-8} = Nt8{2-0};
2432  bits <5> Re32;
2433  let Inst{20-16} = Re32{4-0};
2434}
2435class Enc_c6220b : OpcodeHexagon {
2436  bits <2> Ii;
2437  let Inst{13-13} = Ii{1-1};
2438  let Inst{7-7} = Ii{0-0};
2439  bits <5> Rs32;
2440  let Inst{20-16} = Rs32{4-0};
2441  bits <5> Ru32;
2442  let Inst{12-8} = Ru32{4-0};
2443  bits <3> Nt8;
2444  let Inst{2-0} = Nt8{2-0};
2445}
2446class Enc_7eb485 : OpcodeHexagon {
2447  bits <2> Ii;
2448  let Inst{13-13} = Ii{1-1};
2449  let Inst{6-6} = Ii{0-0};
2450  bits <6> II;
2451  let Inst{5-0} = II{5-0};
2452  bits <5> Ru32;
2453  let Inst{20-16} = Ru32{4-0};
2454  bits <3> Nt8;
2455  let Inst{10-8} = Nt8{2-0};
2456}
2457class Enc_c7a204 : OpcodeHexagon {
2458  bits <6> II;
2459  let Inst{5-0} = II{5-0};
2460  bits <5> Rtt32;
2461  let Inst{12-8} = Rtt32{4-0};
2462  bits <5> Re32;
2463  let Inst{20-16} = Re32{4-0};
2464}
2465class Enc_55355c : OpcodeHexagon {
2466  bits <2> Ii;
2467  let Inst{13-13} = Ii{1-1};
2468  let Inst{7-7} = Ii{0-0};
2469  bits <5> Rs32;
2470  let Inst{20-16} = Rs32{4-0};
2471  bits <5> Ru32;
2472  let Inst{12-8} = Ru32{4-0};
2473  bits <5> Rtt32;
2474  let Inst{4-0} = Rtt32{4-0};
2475}
2476class Enc_f79415 : OpcodeHexagon {
2477  bits <2> Ii;
2478  let Inst{13-13} = Ii{1-1};
2479  let Inst{6-6} = Ii{0-0};
2480  bits <6> II;
2481  let Inst{5-0} = II{5-0};
2482  bits <5> Ru32;
2483  let Inst{20-16} = Ru32{4-0};
2484  bits <5> Rtt32;
2485  let Inst{12-8} = Rtt32{4-0};
2486}
2487class Enc_645d54 : OpcodeHexagon {
2488  bits <2> Ii;
2489  let Inst{13-13} = Ii{1-1};
2490  let Inst{5-5} = Ii{0-0};
2491  bits <5> Rss32;
2492  let Inst{20-16} = Rss32{4-0};
2493  bits <5> Rt32;
2494  let Inst{12-8} = Rt32{4-0};
2495  bits <5> Rdd32;
2496  let Inst{4-0} = Rdd32{4-0};
2497}
2498class Enc_b72622 : OpcodeHexagon {
2499  bits <2> Ii;
2500  let Inst{13-13} = Ii{1-1};
2501  let Inst{5-5} = Ii{0-0};
2502  bits <5> Rss32;
2503  let Inst{20-16} = Rss32{4-0};
2504  bits <5> Rt32;
2505  let Inst{12-8} = Rt32{4-0};
2506  bits <5> Rxx32;
2507  let Inst{4-0} = Rxx32{4-0};
2508}
2509class Enc_11a146 : OpcodeHexagon {
2510  bits <4> Ii;
2511  let Inst{11-8} = Ii{3-0};
2512  bits <5> Rss32;
2513  let Inst{20-16} = Rss32{4-0};
2514  bits <5> Rd32;
2515  let Inst{4-0} = Rd32{4-0};
2516}
2517class Enc_93af4c : OpcodeHexagon {
2518  bits <7> Ii;
2519  let Inst{10-4} = Ii{6-0};
2520  bits <4> Rx16;
2521  let Inst{3-0} = Rx16{3-0};
2522}
2523class Enc_0527db : OpcodeHexagon {
2524  bits <4> Rs16;
2525  let Inst{7-4} = Rs16{3-0};
2526  bits <4> Rx16;
2527  let Inst{3-0} = Rx16{3-0};
2528}
2529class Enc_2df31d : OpcodeHexagon {
2530  bits <8> Ii;
2531  let Inst{9-4} = Ii{7-2};
2532  bits <4> Rd16;
2533  let Inst{3-0} = Rd16{3-0};
2534}
2535class Enc_97d666 : OpcodeHexagon {
2536  bits <4> Rs16;
2537  let Inst{7-4} = Rs16{3-0};
2538  bits <4> Rd16;
2539  let Inst{3-0} = Rd16{3-0};
2540}
2541class Enc_1f5ba6 : OpcodeHexagon {
2542  bits <4> Rd16;
2543  let Inst{3-0} = Rd16{3-0};
2544}
2545class Enc_63eaeb : OpcodeHexagon {
2546  bits <2> Ii;
2547  let Inst{1-0} = Ii{1-0};
2548  bits <4> Rs16;
2549  let Inst{7-4} = Rs16{3-0};
2550}
2551class Enc_ed48be : OpcodeHexagon {
2552  bits <2> Ii;
2553  let Inst{6-5} = Ii{1-0};
2554  bits <3> Rdd8;
2555  let Inst{2-0} = Rdd8{2-0};
2556}
2557class Enc_399e12 : OpcodeHexagon {
2558  bits <4> Rs16;
2559  let Inst{7-4} = Rs16{3-0};
2560  bits <3> Rdd8;
2561  let Inst{2-0} = Rdd8{2-0};
2562}
2563class Enc_ee5ed0 : OpcodeHexagon {
2564  bits <4> Rs16;
2565  let Inst{7-4} = Rs16{3-0};
2566  bits <4> Rd16;
2567  let Inst{3-0} = Rd16{3-0};
2568  bits <2> n1;
2569  let Inst{9-8} = n1{1-0};
2570}
2571class Enc_e39bb2 : OpcodeHexagon {
2572  bits <6> Ii;
2573  let Inst{9-4} = Ii{5-0};
2574  bits <4> Rd16;
2575  let Inst{3-0} = Rd16{3-0};
2576}
2577class Enc_7a0ea6 : OpcodeHexagon {
2578  bits <4> Rd16;
2579  let Inst{3-0} = Rd16{3-0};
2580  bits <1> n1;
2581  let Inst{9-9} = n1{0-0};
2582}
2583class Enc_53dca9 : OpcodeHexagon {
2584  bits <6> Ii;
2585  let Inst{11-8} = Ii{5-2};
2586  bits <4> Rs16;
2587  let Inst{7-4} = Rs16{3-0};
2588  bits <4> Rd16;
2589  let Inst{3-0} = Rd16{3-0};
2590}
2591class Enc_c175d0 : OpcodeHexagon {
2592  bits <4> Ii;
2593  let Inst{11-8} = Ii{3-0};
2594  bits <4> Rs16;
2595  let Inst{7-4} = Rs16{3-0};
2596  bits <4> Rd16;
2597  let Inst{3-0} = Rd16{3-0};
2598}
2599class Enc_2fbf3c : OpcodeHexagon {
2600  bits <3> Ii;
2601  let Inst{10-8} = Ii{2-0};
2602  bits <4> Rs16;
2603  let Inst{7-4} = Rs16{3-0};
2604  bits <4> Rd16;
2605  let Inst{3-0} = Rd16{3-0};
2606}
2607class Enc_86a14b : OpcodeHexagon {
2608  bits <8> Ii;
2609  let Inst{7-3} = Ii{7-3};
2610  bits <3> Rdd8;
2611  let Inst{2-0} = Rdd8{2-0};
2612}
2613class Enc_2bae10 : OpcodeHexagon {
2614  bits <4> Ii;
2615  let Inst{10-8} = Ii{3-1};
2616  bits <4> Rs16;
2617  let Inst{7-4} = Rs16{3-0};
2618  bits <4> Rd16;
2619  let Inst{3-0} = Rd16{3-0};
2620}
2621class Enc_51635c : OpcodeHexagon {
2622  bits <7> Ii;
2623  let Inst{8-4} = Ii{6-2};
2624  bits <4> Rd16;
2625  let Inst{3-0} = Rd16{3-0};
2626}
2627class Enc_b38ffc : OpcodeHexagon {
2628  bits <4> Ii;
2629  let Inst{11-8} = Ii{3-0};
2630  bits <4> Rs16;
2631  let Inst{7-4} = Rs16{3-0};
2632  bits <4> Rt16;
2633  let Inst{3-0} = Rt16{3-0};
2634}
2635class Enc_f55a0c : OpcodeHexagon {
2636  bits <6> Ii;
2637  let Inst{11-8} = Ii{5-2};
2638  bits <4> Rs16;
2639  let Inst{7-4} = Rs16{3-0};
2640  bits <4> Rt16;
2641  let Inst{3-0} = Rt16{3-0};
2642}
2643class Enc_6f70ca : OpcodeHexagon {
2644  bits <8> Ii;
2645  let Inst{8-4} = Ii{7-3};
2646}
2647class Enc_84d359 : OpcodeHexagon {
2648  bits <4> Ii;
2649  let Inst{3-0} = Ii{3-0};
2650  bits <4> Rs16;
2651  let Inst{7-4} = Rs16{3-0};
2652}
2653class Enc_b8309d : OpcodeHexagon {
2654  bits <9> Ii;
2655  let Inst{8-3} = Ii{8-3};
2656  bits <3> Rtt8;
2657  let Inst{2-0} = Rtt8{2-0};
2658}
2659class Enc_625deb : OpcodeHexagon {
2660  bits <4> Ii;
2661  let Inst{10-8} = Ii{3-1};
2662  bits <4> Rs16;
2663  let Inst{7-4} = Rs16{3-0};
2664  bits <4> Rt16;
2665  let Inst{3-0} = Rt16{3-0};
2666}
2667class Enc_87c142 : OpcodeHexagon {
2668  bits <7> Ii;
2669  let Inst{8-4} = Ii{6-2};
2670  bits <4> Rt16;
2671  let Inst{3-0} = Rt16{3-0};
2672}
2673class Enc_a6ce9c : OpcodeHexagon {
2674  bits <6> Ii;
2675  let Inst{3-0} = Ii{5-2};
2676  bits <4> Rs16;
2677  let Inst{7-4} = Rs16{3-0};
2678}
2679class Enc_2146c1 : OpcodeHexagon {
2680  bits <5> Vuu32;
2681  let Inst{20-16} = Vuu32{4-0};
2682  bits <5> Vvv32;
2683  let Inst{12-8} = Vvv32{4-0};
2684  bits <3> Qss8;
2685  let Inst{2-0} = Qss8{2-0};
2686  bits <5> Vd32;
2687  let Inst{7-3} = Vd32{4-0};
2688}
2689class Enc_843e80 : OpcodeHexagon {
2690  bits <5> Vu32;
2691  let Inst{12-8} = Vu32{4-0};
2692  bits <5> Rt32;
2693  let Inst{20-16} = Rt32{4-0};
2694  bits <5> Vd32;
2695  let Inst{7-3} = Vd32{4-0};
2696  bits <3> Qxx8;
2697  let Inst{2-0} = Qxx8{2-0};
2698}
2699class Enc_1f3376 : OpcodeHexagon {
2700  bits <5> Vu32;
2701  let Inst{20-16} = Vu32{4-0};
2702  bits <5> Vv32;
2703  let Inst{12-8} = Vv32{4-0};
2704  bits <5> Vxx32;
2705  let Inst{7-3} = Vxx32{4-0};
2706}
2707class Enc_8e9fbd : OpcodeHexagon {
2708  bits <5> Vu32;
2709  let Inst{20-16} = Vu32{4-0};
2710  bits <3> Rt8;
2711  let Inst{2-0} = Rt8{2-0};
2712  bits <5> Vd32;
2713  let Inst{7-3} = Vd32{4-0};
2714  bits <5> Vy32;
2715  let Inst{12-8} = Vy32{4-0};
2716}
2717class Enc_57e245 : OpcodeHexagon {
2718  bits <5> Vu32;
2719  let Inst{20-16} = Vu32{4-0};
2720  bits <3> Rt8;
2721  let Inst{2-0} = Rt8{2-0};
2722  bits <5> Vdd32;
2723  let Inst{7-3} = Vdd32{4-0};
2724  bits <5> Vy32;
2725  let Inst{12-8} = Vy32{4-0};
2726}
2727class Enc_274a4c : OpcodeHexagon {
2728  bits <5> Vu32;
2729  let Inst{20-16} = Vu32{4-0};
2730  bits <3> Rt8;
2731  let Inst{2-0} = Rt8{2-0};
2732  bits <5> Vx32;
2733  let Inst{7-3} = Vx32{4-0};
2734  bits <5> Vy32;
2735  let Inst{12-8} = Vy32{4-0};
2736}
2737class Enc_fbacc2 : OpcodeHexagon {
2738  bits <5> Vu32;
2739  let Inst{20-16} = Vu32{4-0};
2740  bits <3> Rt8;
2741  let Inst{2-0} = Rt8{2-0};
2742  bits <5> Vxx32;
2743  let Inst{7-3} = Vxx32{4-0};
2744  bits <5> Vy32;
2745  let Inst{12-8} = Vy32{4-0};
2746}
2747class Enc_2a736a : OpcodeHexagon {
2748  bits <5> Vuu32;
2749  let Inst{20-16} = Vuu32{4-0};
2750  bits <5> Vdd32;
2751  let Inst{7-3} = Vdd32{4-0};
2752}
2753class Enc_b8513b : OpcodeHexagon {
2754  bits <5> Vuu32;
2755  let Inst{20-16} = Vuu32{4-0};
2756  bits <5> Vvv32;
2757  let Inst{12-8} = Vvv32{4-0};
2758  bits <5> Vdd32;
2759  let Inst{7-3} = Vdd32{4-0};
2760}
2761class Enc_b5e54d : OpcodeHexagon {
2762  bits <5> Vu32;
2763  let Inst{12-8} = Vu32{4-0};
2764  bits <5> Rs32;
2765  let Inst{20-16} = Rs32{4-0};
2766  bits <5> Rdd32;
2767  let Inst{4-0} = Rdd32{4-0};
2768}
2769class Enc_50e578 : OpcodeHexagon {
2770  bits <5> Vu32;
2771  let Inst{12-8} = Vu32{4-0};
2772  bits <5> Rs32;
2773  let Inst{20-16} = Rs32{4-0};
2774  bits <5> Rd32;
2775  let Inst{4-0} = Rd32{4-0};
2776}
2777class Enc_b5b643 : OpcodeHexagon {
2778  bits <5> Rtt32;
2779  let Inst{20-16} = Rtt32{4-0};
2780  bits <5> Vx32;
2781  let Inst{7-3} = Vx32{4-0};
2782}
2783class Enc_2516bf : OpcodeHexagon {
2784  bits <5> Vu32;
2785  let Inst{20-16} = Vu32{4-0};
2786  bits <5> Vd32;
2787  let Inst{7-3} = Vd32{4-0};
2788}
2789class Enc_8d04c3 : OpcodeHexagon {
2790  bits <5> Vu32;
2791  let Inst{20-16} = Vu32{4-0};
2792  bits <5> Vv32;
2793  let Inst{12-8} = Vv32{4-0};
2794  bits <5> Vd32;
2795  let Inst{7-3} = Vd32{4-0};
2796}
2797class Enc_2ad23d : OpcodeHexagon {
2798  bits <5> Vu32;
2799  let Inst{20-16} = Vu32{4-0};
2800  bits <5> Vv32;
2801  let Inst{12-8} = Vv32{4-0};
2802  bits <5> Vx32;
2803  let Inst{7-3} = Vx32{4-0};
2804}
2805class Enc_85daf5 : OpcodeHexagon {
2806  bits <5> Vu32;
2807  let Inst{12-8} = Vu32{4-0};
2808  bits <5> Rtt32;
2809  let Inst{20-16} = Rtt32{4-0};
2810  bits <5> Vx32;
2811  let Inst{7-3} = Vx32{4-0};
2812}
2813class Enc_e570b0 : OpcodeHexagon {
2814  bits <5> Rtt32;
2815  let Inst{20-16} = Rtt32{4-0};
2816  bits <5> Vdd32;
2817  let Inst{7-3} = Vdd32{4-0};
2818}
2819class Enc_41dcc3 : OpcodeHexagon {
2820  bits <5> Rt32;
2821  let Inst{20-16} = Rt32{4-0};
2822  bits <5> Vdd32;
2823  let Inst{7-3} = Vdd32{4-0};
2824}
2825class Enc_3126d7 : OpcodeHexagon {
2826  bits <5> Vu32;
2827  let Inst{20-16} = Vu32{4-0};
2828  bits <5> Vv32;
2829  let Inst{12-8} = Vv32{4-0};
2830  bits <5> Vdd32;
2831  let Inst{7-3} = Vdd32{4-0};
2832}
2833class Enc_1cd70f : OpcodeHexagon {
2834  bits <5> Vu32;
2835  let Inst{20-16} = Vu32{4-0};
2836  bits <5> Vv32;
2837  let Inst{12-8} = Vv32{4-0};
2838  bits <3> Rt8;
2839  let Inst{2-0} = Rt8{2-0};
2840  bits <5> Vd32;
2841  let Inst{7-3} = Vd32{4-0};
2842}
2843class Enc_12dd8f : OpcodeHexagon {
2844  bits <5> Vu32;
2845  let Inst{20-16} = Vu32{4-0};
2846  bits <5> Vv32;
2847  let Inst{12-8} = Vv32{4-0};
2848  bits <3> Rt8;
2849  let Inst{2-0} = Rt8{2-0};
2850  bits <5> Vx32;
2851  let Inst{7-3} = Vx32{4-0};
2852}
2853class Enc_8d5d98 : OpcodeHexagon {
2854  bits <5> Vu32;
2855  let Inst{20-16} = Vu32{4-0};
2856  bits <5> Vv32;
2857  let Inst{12-8} = Vv32{4-0};
2858  bits <3> Rt8;
2859  let Inst{2-0} = Rt8{2-0};
2860  bits <5> Vxx32;
2861  let Inst{7-3} = Vxx32{4-0};
2862}
2863class Enc_fc563d : OpcodeHexagon {
2864  bits <5> Vuu32;
2865  let Inst{20-16} = Vuu32{4-0};
2866  bits <5> Vv32;
2867  let Inst{12-8} = Vv32{4-0};
2868  bits <5> Vd32;
2869  let Inst{7-3} = Vd32{4-0};
2870}
2871class Enc_c84567 : OpcodeHexagon {
2872  bits <5> Vuu32;
2873  let Inst{20-16} = Vuu32{4-0};
2874  bits <5> Vv32;
2875  let Inst{12-8} = Vv32{4-0};
2876  bits <5> Vdd32;
2877  let Inst{7-3} = Vdd32{4-0};
2878}
2879class Enc_334c2b : OpcodeHexagon {
2880  bits <5> Vuu32;
2881  let Inst{12-8} = Vuu32{4-0};
2882  bits <5> Rt32;
2883  let Inst{20-16} = Rt32{4-0};
2884  bits <5> Vd32;
2885  let Inst{7-3} = Vd32{4-0};
2886}
2887class Enc_3c46e8 : OpcodeHexagon {
2888  bits <5> Vuu32;
2889  let Inst{12-8} = Vuu32{4-0};
2890  bits <5> Rt32;
2891  let Inst{20-16} = Rt32{4-0};
2892  bits <5> Vdd32;
2893  let Inst{7-3} = Vdd32{4-0};
2894}
2895class Enc_129701 : OpcodeHexagon {
2896  bits <5> Vuu32;
2897  let Inst{20-16} = Vuu32{4-0};
2898  bits <5> Vvv32;
2899  let Inst{12-8} = Vvv32{4-0};
2900  bits <5> Vd32;
2901  let Inst{7-3} = Vd32{4-0};
2902}
2903class Enc_790d6e : OpcodeHexagon {
2904  bits <5> Rt32;
2905  let Inst{20-16} = Rt32{4-0};
2906  bits <5> Vd32;
2907  let Inst{7-3} = Vd32{4-0};
2908}
2909class Enc_880793 : OpcodeHexagon {
2910  bits <3> Qt8;
2911  let Inst{2-0} = Qt8{2-0};
2912  bits <5> Vu32;
2913  let Inst{20-16} = Vu32{4-0};
2914  bits <5> Vv32;
2915  let Inst{12-8} = Vv32{4-0};
2916  bits <5> Vdd32;
2917  let Inst{7-3} = Vdd32{4-0};
2918}
2919class Enc_a265b7 : OpcodeHexagon {
2920  bits <5> Vuu32;
2921  let Inst{20-16} = Vuu32{4-0};
2922  bits <5> Vd32;
2923  let Inst{7-3} = Vd32{4-0};
2924}
2925class Enc_6b1bc4 : OpcodeHexagon {
2926  bits <5> Vuu32;
2927  let Inst{20-16} = Vuu32{4-0};
2928  bits <3> Qt8;
2929  let Inst{10-8} = Qt8{2-0};
2930  bits <5> Vdd32;
2931  let Inst{7-3} = Vdd32{4-0};
2932}
2933class Enc_b2ffce : OpcodeHexagon {
2934  bits <5> Vd32;
2935  let Inst{7-3} = Vd32{4-0};
2936}
2937class Enc_fde0e3 : OpcodeHexagon {
2938  bits <5> Rtt32;
2939  let Inst{20-16} = Rtt32{4-0};
2940  bits <5> Vd32;
2941  let Inst{7-3} = Vd32{4-0};
2942}
2943class Enc_b3bac4 : OpcodeHexagon {
2944  bits <5> Vu32;
2945  let Inst{12-8} = Vu32{4-0};
2946  bits <5> Rtt32;
2947  let Inst{20-16} = Rtt32{4-0};
2948  bits <5> Vd32;
2949  let Inst{7-3} = Vd32{4-0};
2950}
2951class Enc_e7c9de : OpcodeHexagon {
2952  bits <5> Vu32;
2953  let Inst{20-16} = Vu32{4-0};
2954}
2955class Enc_5c3a80 : OpcodeHexagon {
2956  bits <3> Qt8;
2957  let Inst{10-8} = Qt8{2-0};
2958  bits <3> Qd8;
2959  let Inst{5-3} = Qd8{2-0};
2960}
2961class Enc_8f7cc3 : OpcodeHexagon {
2962  bits <3> Qtt8;
2963  let Inst{10-8} = Qtt8{2-0};
2964  bits <3> Qdd8;
2965  let Inst{5-3} = Qdd8{2-0};
2966}
2967class Enc_f106e0 : OpcodeHexagon {
2968  bits <5> Vu32;
2969  let Inst{20-16} = Vu32{4-0};
2970  bits <5> Vv32;
2971  let Inst{8-4} = Vv32{4-0};
2972  bits <5> Vt32;
2973  let Inst{13-9} = Vt32{4-0};
2974  bits <4> Vdd16;
2975  let Inst{3-0} = Vdd16{3-0};
2976}
2977class Enc_7db2f8 : OpcodeHexagon {
2978  bits <5> Vu32;
2979  let Inst{13-9} = Vu32{4-0};
2980  bits <5> Vv32;
2981  let Inst{8-4} = Vv32{4-0};
2982  bits <4> Vdd16;
2983  let Inst{3-0} = Vdd16{3-0};
2984  bits <5> Rx32;
2985  let Inst{20-16} = Rx32{4-0};
2986}
2987class Enc_37c406 : OpcodeHexagon {
2988  bits <5> Vu32;
2989  let Inst{20-16} = Vu32{4-0};
2990  bits <5> Vv32;
2991  let Inst{12-8} = Vv32{4-0};
2992  bits <3> Rt8;
2993  let Inst{2-0} = Rt8{2-0};
2994  bits <4> Vdd16;
2995  let Inst{7-4} = Vdd16{3-0};
2996}
2997class Enc_72a92d : OpcodeHexagon {
2998  bits <5> Vuu32;
2999  let Inst{12-8} = Vuu32{4-0};
3000  bits <5> Rt32;
3001  let Inst{20-16} = Rt32{4-0};
3002  bits <5> Vxx32;
3003  let Inst{7-3} = Vxx32{4-0};
3004}
3005class Enc_d7e8ba : OpcodeHexagon {
3006  bits <5> Vu32;
3007  let Inst{20-16} = Vu32{4-0};
3008  bits <5> Vdd32;
3009  let Inst{7-3} = Vdd32{4-0};
3010}
3011class Enc_ce4c54 : OpcodeHexagon {
3012  bits <16> Ii;
3013  let Inst{21-21} = Ii{15-15};
3014  let Inst{13-8} = Ii{14-9};
3015  let Inst{2-0} = Ii{8-6};
3016  bits <5> Rt32;
3017  let Inst{20-16} = Rt32{4-0};
3018  bits <5> Vd32;
3019  let Inst{7-3} = Vd32{4-0};
3020}
3021class Enc_3a81ac : OpcodeHexagon {
3022  bits <1> Mu2;
3023  let Inst{13-13} = Mu2{0-0};
3024  bits <5> Vd32;
3025  let Inst{7-3} = Vd32{4-0};
3026  bits <5> Rx32;
3027  let Inst{20-16} = Rx32{4-0};
3028}
3029class Enc_6c4697 : OpcodeHexagon {
3030  bits <1> Mu2;
3031  let Inst{13-13} = Mu2{0-0};
3032  bits <5> Rt32;
3033  let Inst{12-8} = Rt32{4-0};
3034  bits <5> Vd32;
3035  let Inst{7-3} = Vd32{4-0};
3036  bits <5> Rx32;
3037  let Inst{20-16} = Rx32{4-0};
3038}
3039class Enc_b0e553 : OpcodeHexagon {
3040  bits <16> Ii;
3041  let Inst{21-21} = Ii{15-15};
3042  let Inst{13-8} = Ii{14-9};
3043  let Inst{2-0} = Ii{8-6};
3044  bits <5> Vd32;
3045  let Inst{7-3} = Vd32{4-0};
3046  bits <5> Rx32;
3047  let Inst{20-16} = Rx32{4-0};
3048}
3049class Enc_5883d0 : OpcodeHexagon {
3050  bits <16> Ii;
3051  let Inst{21-21} = Ii{15-15};
3052  let Inst{13-8} = Ii{14-9};
3053  let Inst{2-0} = Ii{8-6};
3054  bits <5> Rt32;
3055  let Inst{20-16} = Rt32{4-0};
3056  bits <5> Vdd32;
3057  let Inst{7-3} = Vdd32{4-0};
3058}
3059class Enc_9a895f : OpcodeHexagon {
3060  bits <1> Mu2;
3061  let Inst{13-13} = Mu2{0-0};
3062  bits <5> Vdd32;
3063  let Inst{7-3} = Vdd32{4-0};
3064  bits <5> Rx32;
3065  let Inst{20-16} = Rx32{4-0};
3066}
3067class Enc_f3adb6 : OpcodeHexagon {
3068  bits <16> Ii;
3069  let Inst{21-21} = Ii{15-15};
3070  let Inst{13-8} = Ii{14-9};
3071  let Inst{2-0} = Ii{8-6};
3072  bits <5> Vdd32;
3073  let Inst{7-3} = Vdd32{4-0};
3074  bits <5> Rx32;
3075  let Inst{20-16} = Rx32{4-0};
3076}
3077class Enc_b5d5a7 : OpcodeHexagon {
3078  bits <16> Ii;
3079  let Inst{21-21} = Ii{15-15};
3080  let Inst{13-8} = Ii{14-9};
3081  let Inst{2-0} = Ii{8-6};
3082  bits <5> Rt32;
3083  let Inst{20-16} = Rt32{4-0};
3084  bits <5> Vs32;
3085  let Inst{7-3} = Vs32{4-0};
3086}
3087class Enc_5b76ab : OpcodeHexagon {
3088  bits <10> Ii;
3089  let Inst{21-21} = Ii{9-9};
3090  let Inst{13-8} = Ii{8-3};
3091  let Inst{2-0} = Ii{2-0};
3092  bits <5> Vs32;
3093  let Inst{7-3} = Vs32{4-0};
3094  bits <5> Rx32;
3095  let Inst{20-16} = Rx32{4-0};
3096}
3097class Enc_17a474 : OpcodeHexagon {
3098  bits <1> Mu2;
3099  let Inst{13-13} = Mu2{0-0};
3100  bits <5> Vs32;
3101  let Inst{7-3} = Vs32{4-0};
3102  bits <5> Rx32;
3103  let Inst{20-16} = Rx32{4-0};
3104}
3105class Enc_9a9d62 : OpcodeHexagon {
3106  bits <1> Mu2;
3107  let Inst{13-13} = Mu2{0-0};
3108  bits <5> Rt32;
3109  let Inst{12-8} = Rt32{4-0};
3110  bits <5> Vs32;
3111  let Inst{7-3} = Vs32{4-0};
3112  bits <5> Rx32;
3113  let Inst{20-16} = Rx32{4-0};
3114}
3115class Enc_3a527f : OpcodeHexagon {
3116  bits <16> Ii;
3117  let Inst{21-21} = Ii{15-15};
3118  let Inst{13-8} = Ii{14-9};
3119  let Inst{2-0} = Ii{8-6};
3120  bits <5> Vs32;
3121  let Inst{7-3} = Vs32{4-0};
3122  bits <5> Rx32;
3123  let Inst{20-16} = Rx32{4-0};
3124}
3125class Enc_c39a8b : OpcodeHexagon {
3126  bits <16> Ii;
3127  let Inst{21-21} = Ii{15-15};
3128  let Inst{13-8} = Ii{14-9};
3129  let Inst{2-0} = Ii{8-6};
3130  bits <5> Rt32;
3131  let Inst{20-16} = Rt32{4-0};
3132  bits <5> Vss32;
3133  let Inst{7-3} = Vss32{4-0};
3134}
3135class Enc_908985 : OpcodeHexagon {
3136  bits <1> Mu2;
3137  let Inst{13-13} = Mu2{0-0};
3138  bits <5> Vss32;
3139  let Inst{7-3} = Vss32{4-0};
3140  bits <5> Rx32;
3141  let Inst{20-16} = Rx32{4-0};
3142}
3143class Enc_e8ddd5 : OpcodeHexagon {
3144  bits <16> Ii;
3145  let Inst{21-21} = Ii{15-15};
3146  let Inst{13-8} = Ii{14-9};
3147  let Inst{2-0} = Ii{8-6};
3148  bits <5> Vss32;
3149  let Inst{7-3} = Vss32{4-0};
3150  bits <5> Rx32;
3151  let Inst{20-16} = Rx32{4-0};
3152}
3153class Enc_6a4549 : OpcodeHexagon {
3154  bits <5> Vu32;
3155  let Inst{12-8} = Vu32{4-0};
3156  bits <5> Rt32;
3157  let Inst{20-16} = Rt32{4-0};
3158  bits <5> Vd32;
3159  let Inst{7-3} = Vd32{4-0};
3160}
3161class Enc_932b58 : OpcodeHexagon {
3162  bits <5> Vu32;
3163  let Inst{12-8} = Vu32{4-0};
3164  bits <5> Rt32;
3165  let Inst{20-16} = Rt32{4-0};
3166}
3167class Enc_124cac : OpcodeHexagon {
3168  bits <5> Vuu32;
3169  let Inst{20-16} = Vuu32{4-0};
3170  bits <5> Vxx32;
3171  let Inst{7-3} = Vxx32{4-0};
3172}
3173class Enc_aceeef : OpcodeHexagon {
3174  bits <5> Vu32;
3175  let Inst{12-8} = Vu32{4-0};
3176  bits <5> Rt32;
3177  let Inst{20-16} = Rt32{4-0};
3178  bits <5> Vdd32;
3179  let Inst{7-3} = Vdd32{4-0};
3180}
3181class Enc_2c3281 : OpcodeHexagon {
3182  bits <5> Vdd32;
3183  let Inst{7-3} = Vdd32{4-0};
3184}
3185class Enc_a4ae28 : OpcodeHexagon {
3186  bits <5> Vu32;
3187  let Inst{20-16} = Vu32{4-0};
3188  bits <5> Vv32;
3189  let Inst{12-8} = Vv32{4-0};
3190  bits <3> Qd8;
3191  let Inst{5-3} = Qd8{2-0};
3192}
3193class Enc_c1652e : OpcodeHexagon {
3194  bits <5> Vu32;
3195  let Inst{12-8} = Vu32{4-0};
3196  bits <5> Rt32;
3197  let Inst{20-16} = Rt32{4-0};
3198  bits <3> Qd8;
3199  let Inst{5-3} = Qd8{2-0};
3200}
3201class Enc_9aae4a : OpcodeHexagon {
3202  bits <5> Rt32;
3203  let Inst{20-16} = Rt32{4-0};
3204  bits <5> Vx32;
3205  let Inst{7-3} = Vx32{4-0};
3206  bits <3> Qd8;
3207  let Inst{2-0} = Qd8{2-0};
3208}
3209class Enc_dcfcbb : OpcodeHexagon {
3210  bits <5> Vu32;
3211  let Inst{20-16} = Vu32{4-0};
3212  bits <5> Vvv32;
3213  let Inst{12-8} = Vvv32{4-0};
3214  bits <5> Vd32;
3215  let Inst{7-3} = Vd32{4-0};
3216}
3217class Enc_a7ca29 : OpcodeHexagon {
3218  bits <3> Qt8;
3219  let Inst{2-0} = Qt8{2-0};
3220  bits <5> Vu32;
3221  let Inst{20-16} = Vu32{4-0};
3222  bits <5> Vv32;
3223  let Inst{12-8} = Vv32{4-0};
3224  bits <5> Vd32;
3225  let Inst{7-3} = Vd32{4-0};
3226}
3227class Enc_dd5f9f : OpcodeHexagon {
3228  bits <3> Qtt8;
3229  let Inst{2-0} = Qtt8{2-0};
3230  bits <5> Vuu32;
3231  let Inst{20-16} = Vuu32{4-0};
3232  bits <5> Vvv32;
3233  let Inst{12-8} = Vvv32{4-0};
3234  bits <5> Vdd32;
3235  let Inst{7-3} = Vdd32{4-0};
3236}
3237class Enc_7dc746 : OpcodeHexagon {
3238  bits <3> Quu8;
3239  let Inst{10-8} = Quu8{2-0};
3240  bits <5> Rt32;
3241  let Inst{20-16} = Rt32{4-0};
3242  bits <3> Qdd8;
3243  let Inst{5-3} = Qdd8{2-0};
3244}
3245class Enc_fa5efc : OpcodeHexagon {
3246  bits <5> Vuu32;
3247  let Inst{20-16} = Vuu32{4-0};
3248  bits <5> Vv32;
3249  let Inst{12-8} = Vv32{4-0};
3250  bits <3> Rt8;
3251  let Inst{2-0} = Rt8{2-0};
3252  bits <5> Vx32;
3253  let Inst{7-3} = Vx32{4-0};
3254}
3255class Enc_aac08c : OpcodeHexagon {
3256  bits <5> Vu32;
3257  let Inst{20-16} = Vu32{4-0};
3258  bits <5> Vx32;
3259  let Inst{7-3} = Vx32{4-0};
3260}
3261class Enc_9a8c1f : OpcodeHexagon {
3262  bits <5> Vu32;
3263  let Inst{12-8} = Vu32{4-0};
3264  bits <5> Rtt32;
3265  let Inst{20-16} = Rtt32{4-0};
3266  bits <5> Vdd32;
3267  let Inst{7-3} = Vdd32{4-0};
3268}
3269class Enc_a9eee0 : OpcodeHexagon {
3270  bits <5> Vu32;
3271  let Inst{20-16} = Vu32{4-0};
3272  bits <5> Vxx32;
3273  let Inst{7-3} = Vxx32{4-0};
3274}
3275class Enc_9ce456 : OpcodeHexagon {
3276  bits <10> Ii;
3277  let Inst{21-21} = Ii{9-9};
3278  let Inst{13-8} = Ii{8-3};
3279  let Inst{2-0} = Ii{2-0};
3280  bits <5> Vss32;
3281  let Inst{7-3} = Vss32{4-0};
3282  bits <5> Rx32;
3283  let Inst{20-16} = Rx32{4-0};
3284}
3285class Enc_96f0fd : OpcodeHexagon {
3286  bits <5> Rt32;
3287  let Inst{20-16} = Rt32{4-0};
3288  bits <5> Vx32;
3289  let Inst{7-3} = Vx32{4-0};
3290  bits <3> Qdd8;
3291  let Inst{2-0} = Qdd8{2-0};
3292}
3293class Enc_a662ae : OpcodeHexagon {
3294  bits <5> Vuu32;
3295  let Inst{20-16} = Vuu32{4-0};
3296  bits <5> Vvv32;
3297  let Inst{12-8} = Vvv32{4-0};
3298  bits <3> Rt8;
3299  let Inst{2-0} = Rt8{2-0};
3300  bits <5> Vdd32;
3301  let Inst{7-3} = Vdd32{4-0};
3302}
3303class Enc_ec09c9 : OpcodeHexagon {
3304  bits <5> Vuu32;
3305  let Inst{20-16} = Vuu32{4-0};
3306  bits <5> Vvv32;
3307  let Inst{12-8} = Vvv32{4-0};
3308  bits <3> Qdd8;
3309  let Inst{5-3} = Qdd8{2-0};
3310}
3311class Enc_400b42 : OpcodeHexagon {
3312  bits <5> Vuu32;
3313  let Inst{12-8} = Vuu32{4-0};
3314  bits <5> Rt32;
3315  let Inst{20-16} = Rt32{4-0};
3316  bits <3> Qdd8;
3317  let Inst{5-3} = Qdd8{2-0};
3318}
3319class Enc_a5ed8a : OpcodeHexagon {
3320  bits <5> Rt32;
3321  let Inst{20-16} = Rt32{4-0};
3322  bits <5> Vd32;
3323  let Inst{4-0} = Vd32{4-0};
3324}
3325class Enc_134437 : OpcodeHexagon {
3326  bits <2> Qs4;
3327  let Inst{9-8} = Qs4{1-0};
3328  bits <2> Qt4;
3329  let Inst{23-22} = Qt4{1-0};
3330  bits <2> Qd4;
3331  let Inst{1-0} = Qd4{1-0};
3332}
3333class Enc_bfbf03 : OpcodeHexagon {
3334  bits <2> Qs4;
3335  let Inst{9-8} = Qs4{1-0};
3336  bits <2> Qd4;
3337  let Inst{1-0} = Qd4{1-0};
3338}
3339class Enc_7222b7 : OpcodeHexagon {
3340  bits <5> Rt32;
3341  let Inst{20-16} = Rt32{4-0};
3342  bits <2> Qd4;
3343  let Inst{1-0} = Qd4{1-0};
3344}
3345class Enc_f3f408 : OpcodeHexagon {
3346  bits <4> Ii;
3347  let Inst{13-13} = Ii{3-3};
3348  let Inst{10-8} = Ii{2-0};
3349  bits <5> Rt32;
3350  let Inst{20-16} = Rt32{4-0};
3351  bits <5> Vd32;
3352  let Inst{4-0} = Vd32{4-0};
3353}
3354class Enc_a255dc : OpcodeHexagon {
3355  bits <3> Ii;
3356  let Inst{10-8} = Ii{2-0};
3357  bits <5> Vd32;
3358  let Inst{4-0} = Vd32{4-0};
3359  bits <5> Rx32;
3360  let Inst{20-16} = Rx32{4-0};
3361}
3362class Enc_2ebe3b : OpcodeHexagon {
3363  bits <1> Mu2;
3364  let Inst{13-13} = Mu2{0-0};
3365  bits <5> Vd32;
3366  let Inst{4-0} = Vd32{4-0};
3367  bits <5> Rx32;
3368  let Inst{20-16} = Rx32{4-0};
3369}
3370class Enc_8d8a30 : OpcodeHexagon {
3371  bits <4> Ii;
3372  let Inst{13-13} = Ii{3-3};
3373  let Inst{10-8} = Ii{2-0};
3374  bits <2> Pv4;
3375  let Inst{12-11} = Pv4{1-0};
3376  bits <5> Rt32;
3377  let Inst{20-16} = Rt32{4-0};
3378  bits <5> Vd32;
3379  let Inst{4-0} = Vd32{4-0};
3380}
3381class Enc_58a8bf : OpcodeHexagon {
3382  bits <3> Ii;
3383  let Inst{10-8} = Ii{2-0};
3384  bits <2> Pv4;
3385  let Inst{12-11} = Pv4{1-0};
3386  bits <5> Vd32;
3387  let Inst{4-0} = Vd32{4-0};
3388  bits <5> Rx32;
3389  let Inst{20-16} = Rx32{4-0};
3390}
3391class Enc_f8c1c4 : OpcodeHexagon {
3392  bits <2> Pv4;
3393  let Inst{12-11} = Pv4{1-0};
3394  bits <1> Mu2;
3395  let Inst{13-13} = Mu2{0-0};
3396  bits <5> Vd32;
3397  let Inst{4-0} = Vd32{4-0};
3398  bits <5> Rx32;
3399  let Inst{20-16} = Rx32{4-0};
3400}
3401class Enc_c9e3bc : OpcodeHexagon {
3402  bits <4> Ii;
3403  let Inst{13-13} = Ii{3-3};
3404  let Inst{10-8} = Ii{2-0};
3405  bits <5> Rt32;
3406  let Inst{20-16} = Rt32{4-0};
3407  bits <5> Vs32;
3408  let Inst{4-0} = Vs32{4-0};
3409}
3410class Enc_27b757 : OpcodeHexagon {
3411  bits <4> Ii;
3412  let Inst{13-13} = Ii{3-3};
3413  let Inst{10-8} = Ii{2-0};
3414  bits <2> Pv4;
3415  let Inst{12-11} = Pv4{1-0};
3416  bits <5> Rt32;
3417  let Inst{20-16} = Rt32{4-0};
3418  bits <5> Vs32;
3419  let Inst{4-0} = Vs32{4-0};
3420}
3421class Enc_865390 : OpcodeHexagon {
3422  bits <3> Ii;
3423  let Inst{10-8} = Ii{2-0};
3424  bits <2> Pv4;
3425  let Inst{12-11} = Pv4{1-0};
3426  bits <5> Vs32;
3427  let Inst{4-0} = Vs32{4-0};
3428  bits <5> Rx32;
3429  let Inst{20-16} = Rx32{4-0};
3430}
3431class Enc_1ef990 : OpcodeHexagon {
3432  bits <2> Pv4;
3433  let Inst{12-11} = Pv4{1-0};
3434  bits <1> Mu2;
3435  let Inst{13-13} = Mu2{0-0};
3436  bits <5> Vs32;
3437  let Inst{4-0} = Vs32{4-0};
3438  bits <5> Rx32;
3439  let Inst{20-16} = Rx32{4-0};
3440}
3441class Enc_b62ef7 : OpcodeHexagon {
3442  bits <3> Ii;
3443  let Inst{10-8} = Ii{2-0};
3444  bits <5> Vs32;
3445  let Inst{4-0} = Vs32{4-0};
3446  bits <5> Rx32;
3447  let Inst{20-16} = Rx32{4-0};
3448}
3449class Enc_d15d19 : OpcodeHexagon {
3450  bits <1> Mu2;
3451  let Inst{13-13} = Mu2{0-0};
3452  bits <5> Vs32;
3453  let Inst{4-0} = Vs32{4-0};
3454  bits <5> Rx32;
3455  let Inst{20-16} = Rx32{4-0};
3456}
3457class Enc_f77fbc : OpcodeHexagon {
3458  bits <4> Ii;
3459  let Inst{13-13} = Ii{3-3};
3460  let Inst{10-8} = Ii{2-0};
3461  bits <5> Rt32;
3462  let Inst{20-16} = Rt32{4-0};
3463  bits <3> Os8;
3464  let Inst{2-0} = Os8{2-0};
3465}
3466class Enc_f7430e : OpcodeHexagon {
3467  bits <4> Ii;
3468  let Inst{13-13} = Ii{3-3};
3469  let Inst{10-8} = Ii{2-0};
3470  bits <2> Pv4;
3471  let Inst{12-11} = Pv4{1-0};
3472  bits <5> Rt32;
3473  let Inst{20-16} = Rt32{4-0};
3474  bits <3> Os8;
3475  let Inst{2-0} = Os8{2-0};
3476}
3477class Enc_784502 : OpcodeHexagon {
3478  bits <3> Ii;
3479  let Inst{10-8} = Ii{2-0};
3480  bits <2> Pv4;
3481  let Inst{12-11} = Pv4{1-0};
3482  bits <3> Os8;
3483  let Inst{2-0} = Os8{2-0};
3484  bits <5> Rx32;
3485  let Inst{20-16} = Rx32{4-0};
3486}
3487class Enc_372c9d : OpcodeHexagon {
3488  bits <2> Pv4;
3489  let Inst{12-11} = Pv4{1-0};
3490  bits <1> Mu2;
3491  let Inst{13-13} = Mu2{0-0};
3492  bits <3> Os8;
3493  let Inst{2-0} = Os8{2-0};
3494  bits <5> Rx32;
3495  let Inst{20-16} = Rx32{4-0};
3496}
3497class Enc_1aaec1 : OpcodeHexagon {
3498  bits <3> Ii;
3499  let Inst{10-8} = Ii{2-0};
3500  bits <3> Os8;
3501  let Inst{2-0} = Os8{2-0};
3502  bits <5> Rx32;
3503  let Inst{20-16} = Rx32{4-0};
3504}
3505class Enc_cf1927 : OpcodeHexagon {
3506  bits <1> Mu2;
3507  let Inst{13-13} = Mu2{0-0};
3508  bits <3> Os8;
3509  let Inst{2-0} = Os8{2-0};
3510  bits <5> Rx32;
3511  let Inst{20-16} = Rx32{4-0};
3512}
3513class Enc_2ea740 : OpcodeHexagon {
3514  bits <4> Ii;
3515  let Inst{13-13} = Ii{3-3};
3516  let Inst{10-8} = Ii{2-0};
3517  bits <2> Qv4;
3518  let Inst{12-11} = Qv4{1-0};
3519  bits <5> Rt32;
3520  let Inst{20-16} = Rt32{4-0};
3521  bits <5> Vs32;
3522  let Inst{4-0} = Vs32{4-0};
3523}
3524class Enc_0b51ce : OpcodeHexagon {
3525  bits <3> Ii;
3526  let Inst{10-8} = Ii{2-0};
3527  bits <2> Qv4;
3528  let Inst{12-11} = Qv4{1-0};
3529  bits <5> Vs32;
3530  let Inst{4-0} = Vs32{4-0};
3531  bits <5> Rx32;
3532  let Inst{20-16} = Rx32{4-0};
3533}
3534class Enc_4dff07 : OpcodeHexagon {
3535  bits <2> Qv4;
3536  let Inst{12-11} = Qv4{1-0};
3537  bits <1> Mu2;
3538  let Inst{13-13} = Mu2{0-0};
3539  bits <5> Vs32;
3540  let Inst{4-0} = Vs32{4-0};
3541  bits <5> Rx32;
3542  let Inst{20-16} = Rx32{4-0};
3543}
3544class Enc_ff3442 : OpcodeHexagon {
3545  bits <4> Ii;
3546  let Inst{13-13} = Ii{3-3};
3547  let Inst{10-8} = Ii{2-0};
3548  bits <5> Rt32;
3549  let Inst{20-16} = Rt32{4-0};
3550}
3551class Enc_6c9ee0 : OpcodeHexagon {
3552  bits <3> Ii;
3553  let Inst{10-8} = Ii{2-0};
3554  bits <5> Rx32;
3555  let Inst{20-16} = Rx32{4-0};
3556}
3557class Enc_44661f : OpcodeHexagon {
3558  bits <1> Mu2;
3559  let Inst{13-13} = Mu2{0-0};
3560  bits <5> Rx32;
3561  let Inst{20-16} = Rx32{4-0};
3562}
3563class Enc_e7581c : OpcodeHexagon {
3564  bits <5> Vu32;
3565  let Inst{12-8} = Vu32{4-0};
3566  bits <5> Vd32;
3567  let Inst{4-0} = Vd32{4-0};
3568}
3569class Enc_45364e : OpcodeHexagon {
3570  bits <5> Vu32;
3571  let Inst{12-8} = Vu32{4-0};
3572  bits <5> Vv32;
3573  let Inst{20-16} = Vv32{4-0};
3574  bits <5> Vd32;
3575  let Inst{4-0} = Vd32{4-0};
3576}
3577class Enc_f8ecf9 : OpcodeHexagon {
3578  bits <5> Vuu32;
3579  let Inst{12-8} = Vuu32{4-0};
3580  bits <5> Vvv32;
3581  let Inst{20-16} = Vvv32{4-0};
3582  bits <5> Vdd32;
3583  let Inst{4-0} = Vdd32{4-0};
3584}
3585class Enc_a90628 : OpcodeHexagon {
3586  bits <2> Qv4;
3587  let Inst{23-22} = Qv4{1-0};
3588  bits <5> Vu32;
3589  let Inst{12-8} = Vu32{4-0};
3590  bits <5> Vx32;
3591  let Inst{4-0} = Vx32{4-0};
3592}
3593class Enc_b43b67 : OpcodeHexagon {
3594  bits <5> Vu32;
3595  let Inst{12-8} = Vu32{4-0};
3596  bits <5> Vv32;
3597  let Inst{20-16} = Vv32{4-0};
3598  bits <5> Vd32;
3599  let Inst{4-0} = Vd32{4-0};
3600  bits <2> Qx4;
3601  let Inst{6-5} = Qx4{1-0};
3602}
3603class Enc_c1d806 : OpcodeHexagon {
3604  bits <5> Vu32;
3605  let Inst{12-8} = Vu32{4-0};
3606  bits <5> Vv32;
3607  let Inst{20-16} = Vv32{4-0};
3608  bits <5> Vd32;
3609  let Inst{4-0} = Vd32{4-0};
3610  bits <2> Qe4;
3611  let Inst{6-5} = Qe4{1-0};
3612}
3613class Enc_e0820b : OpcodeHexagon {
3614  bits <5> Vu32;
3615  let Inst{12-8} = Vu32{4-0};
3616  bits <5> Vv32;
3617  let Inst{20-16} = Vv32{4-0};
3618  bits <2> Qs4;
3619  let Inst{6-5} = Qs4{1-0};
3620  bits <5> Vd32;
3621  let Inst{4-0} = Vd32{4-0};
3622}
3623class Enc_71bb9b : OpcodeHexagon {
3624  bits <5> Vu32;
3625  let Inst{12-8} = Vu32{4-0};
3626  bits <5> Vv32;
3627  let Inst{20-16} = Vv32{4-0};
3628  bits <5> Vdd32;
3629  let Inst{4-0} = Vdd32{4-0};
3630}
3631class Enc_3fc427 : OpcodeHexagon {
3632  bits <5> Vu32;
3633  let Inst{12-8} = Vu32{4-0};
3634  bits <5> Vv32;
3635  let Inst{20-16} = Vv32{4-0};
3636  bits <5> Vxx32;
3637  let Inst{4-0} = Vxx32{4-0};
3638}
3639class Enc_a30110 : OpcodeHexagon {
3640  bits <5> Vu32;
3641  let Inst{12-8} = Vu32{4-0};
3642  bits <5> Vv32;
3643  let Inst{23-19} = Vv32{4-0};
3644  bits <3> Rt8;
3645  let Inst{18-16} = Rt8{2-0};
3646  bits <5> Vd32;
3647  let Inst{4-0} = Vd32{4-0};
3648}
3649class Enc_0b2e5b : OpcodeHexagon {
3650  bits <3> Ii;
3651  let Inst{7-5} = Ii{2-0};
3652  bits <5> Vu32;
3653  let Inst{12-8} = Vu32{4-0};
3654  bits <5> Vv32;
3655  let Inst{20-16} = Vv32{4-0};
3656  bits <5> Vd32;
3657  let Inst{4-0} = Vd32{4-0};
3658}
3659class Enc_7b7ba8 : OpcodeHexagon {
3660  bits <2> Qu4;
3661  let Inst{9-8} = Qu4{1-0};
3662  bits <5> Rt32;
3663  let Inst{20-16} = Rt32{4-0};
3664  bits <5> Vd32;
3665  let Inst{4-0} = Vd32{4-0};
3666}
3667class Enc_895bd9 : OpcodeHexagon {
3668  bits <2> Qu4;
3669  let Inst{9-8} = Qu4{1-0};
3670  bits <5> Rt32;
3671  let Inst{20-16} = Rt32{4-0};
3672  bits <5> Vx32;
3673  let Inst{4-0} = Vx32{4-0};
3674}
3675class Enc_c4dc92 : OpcodeHexagon {
3676  bits <2> Qv4;
3677  let Inst{23-22} = Qv4{1-0};
3678  bits <5> Vu32;
3679  let Inst{12-8} = Vu32{4-0};
3680  bits <5> Vd32;
3681  let Inst{4-0} = Vd32{4-0};
3682}
3683class Enc_0f8bab : OpcodeHexagon {
3684  bits <5> Vu32;
3685  let Inst{12-8} = Vu32{4-0};
3686  bits <5> Rt32;
3687  let Inst{20-16} = Rt32{4-0};
3688  bits <2> Qd4;
3689  let Inst{1-0} = Qd4{1-0};
3690}
3691class Enc_adf111 : OpcodeHexagon {
3692  bits <5> Vu32;
3693  let Inst{12-8} = Vu32{4-0};
3694  bits <5> Rt32;
3695  let Inst{20-16} = Rt32{4-0};
3696  bits <2> Qx4;
3697  let Inst{1-0} = Qx4{1-0};
3698}
3699class Enc_b087ac : OpcodeHexagon {
3700  bits <5> Vu32;
3701  let Inst{12-8} = Vu32{4-0};
3702  bits <5> Rt32;
3703  let Inst{20-16} = Rt32{4-0};
3704  bits <5> Vd32;
3705  let Inst{4-0} = Vd32{4-0};
3706}
3707class Enc_5138b3 : OpcodeHexagon {
3708  bits <5> Vu32;
3709  let Inst{12-8} = Vu32{4-0};
3710  bits <5> Rt32;
3711  let Inst{20-16} = Rt32{4-0};
3712  bits <5> Vx32;
3713  let Inst{4-0} = Vx32{4-0};
3714}
3715class Enc_8c2412 : OpcodeHexagon {
3716  bits <2> Ps4;
3717  let Inst{6-5} = Ps4{1-0};
3718  bits <5> Vu32;
3719  let Inst{12-8} = Vu32{4-0};
3720  bits <5> Vv32;
3721  let Inst{20-16} = Vv32{4-0};
3722  bits <5> Vdd32;
3723  let Inst{4-0} = Vdd32{4-0};
3724}
3725class Enc_770858 : OpcodeHexagon {
3726  bits <2> Ps4;
3727  let Inst{6-5} = Ps4{1-0};
3728  bits <5> Vu32;
3729  let Inst{12-8} = Vu32{4-0};
3730  bits <5> Vd32;
3731  let Inst{4-0} = Vd32{4-0};
3732}
3733class Enc_989021 : OpcodeHexagon {
3734  bits <5> Rt32;
3735  let Inst{20-16} = Rt32{4-0};
3736  bits <5> Vy32;
3737  let Inst{12-8} = Vy32{4-0};
3738  bits <5> Vx32;
3739  let Inst{4-0} = Vx32{4-0};
3740}
3741class Enc_24a7dc : OpcodeHexagon {
3742  bits <5> Vu32;
3743  let Inst{12-8} = Vu32{4-0};
3744  bits <5> Vv32;
3745  let Inst{23-19} = Vv32{4-0};
3746  bits <3> Rt8;
3747  let Inst{18-16} = Rt8{2-0};
3748  bits <5> Vdd32;
3749  let Inst{4-0} = Vdd32{4-0};
3750}
3751class Enc_aad80c : OpcodeHexagon {
3752  bits <5> Vuu32;
3753  let Inst{12-8} = Vuu32{4-0};
3754  bits <5> Rt32;
3755  let Inst{20-16} = Rt32{4-0};
3756  bits <5> Vdd32;
3757  let Inst{4-0} = Vdd32{4-0};
3758}
3759class Enc_d6990d : OpcodeHexagon {
3760  bits <5> Vuu32;
3761  let Inst{12-8} = Vuu32{4-0};
3762  bits <5> Rt32;
3763  let Inst{20-16} = Rt32{4-0};
3764  bits <5> Vxx32;
3765  let Inst{4-0} = Vxx32{4-0};
3766}
3767class Enc_0e41fa : OpcodeHexagon {
3768  bits <5> Vuu32;
3769  let Inst{12-8} = Vuu32{4-0};
3770  bits <5> Rt32;
3771  let Inst{20-16} = Rt32{4-0};
3772  bits <5> Vd32;
3773  let Inst{4-0} = Vd32{4-0};
3774}
3775class Enc_cc857d : OpcodeHexagon {
3776  bits <5> Vuu32;
3777  let Inst{12-8} = Vuu32{4-0};
3778  bits <5> Rt32;
3779  let Inst{20-16} = Rt32{4-0};
3780  bits <5> Vx32;
3781  let Inst{4-0} = Vx32{4-0};
3782}
3783class Enc_a7341a : OpcodeHexagon {
3784  bits <5> Vu32;
3785  let Inst{12-8} = Vu32{4-0};
3786  bits <5> Vv32;
3787  let Inst{20-16} = Vv32{4-0};
3788  bits <5> Vx32;
3789  let Inst{4-0} = Vx32{4-0};
3790}
3791class Enc_95441f : OpcodeHexagon {
3792  bits <5> Vu32;
3793  let Inst{12-8} = Vu32{4-0};
3794  bits <5> Vv32;
3795  let Inst{20-16} = Vv32{4-0};
3796  bits <2> Qd4;
3797  let Inst{1-0} = Qd4{1-0};
3798}
3799class Enc_eaa9f8 : OpcodeHexagon {
3800  bits <5> Vu32;
3801  let Inst{12-8} = Vu32{4-0};
3802  bits <5> Vv32;
3803  let Inst{20-16} = Vv32{4-0};
3804  bits <2> Qx4;
3805  let Inst{1-0} = Qx4{1-0};
3806}
3807class Enc_8b8927 : OpcodeHexagon {
3808  bits <5> Rt32;
3809  let Inst{20-16} = Rt32{4-0};
3810  bits <1> Mu2;
3811  let Inst{13-13} = Mu2{0-0};
3812  bits <5> Vv32;
3813  let Inst{4-0} = Vv32{4-0};
3814}
3815class Enc_158beb : OpcodeHexagon {
3816  bits <2> Qs4;
3817  let Inst{6-5} = Qs4{1-0};
3818  bits <5> Rt32;
3819  let Inst{20-16} = Rt32{4-0};
3820  bits <1> Mu2;
3821  let Inst{13-13} = Mu2{0-0};
3822  bits <5> Vv32;
3823  let Inst{4-0} = Vv32{4-0};
3824}
3825class Enc_28dcbb : OpcodeHexagon {
3826  bits <5> Rt32;
3827  let Inst{20-16} = Rt32{4-0};
3828  bits <1> Mu2;
3829  let Inst{13-13} = Mu2{0-0};
3830  bits <5> Vvv32;
3831  let Inst{4-0} = Vvv32{4-0};
3832}
3833class Enc_4e4a80 : OpcodeHexagon {
3834  bits <2> Qs4;
3835  let Inst{6-5} = Qs4{1-0};
3836  bits <5> Rt32;
3837  let Inst{20-16} = Rt32{4-0};
3838  bits <1> Mu2;
3839  let Inst{13-13} = Mu2{0-0};
3840  bits <5> Vvv32;
3841  let Inst{4-0} = Vvv32{4-0};
3842}
3843class Enc_217147 : OpcodeHexagon {
3844  bits <2> Qv4;
3845  let Inst{23-22} = Qv4{1-0};
3846}
3847class Enc_569cfe : OpcodeHexagon {
3848  bits <5> Rt32;
3849  let Inst{20-16} = Rt32{4-0};
3850  bits <5> Vx32;
3851  let Inst{4-0} = Vx32{4-0};
3852}
3853class Enc_263841 : OpcodeHexagon {
3854  bits <5> Vu32;
3855  let Inst{12-8} = Vu32{4-0};
3856  bits <5> Rtt32;
3857  let Inst{20-16} = Rtt32{4-0};
3858  bits <5> Vd32;
3859  let Inst{4-0} = Vd32{4-0};
3860}
3861class Enc_245865 : OpcodeHexagon {
3862  bits <5> Vu32;
3863  let Inst{12-8} = Vu32{4-0};
3864  bits <5> Vv32;
3865  let Inst{23-19} = Vv32{4-0};
3866  bits <3> Rt8;
3867  let Inst{18-16} = Rt8{2-0};
3868  bits <5> Vx32;
3869  let Inst{4-0} = Vx32{4-0};
3870}
3871class Enc_cd4705 : OpcodeHexagon {
3872  bits <3> Ii;
3873  let Inst{7-5} = Ii{2-0};
3874  bits <5> Vu32;
3875  let Inst{12-8} = Vu32{4-0};
3876  bits <5> Vv32;
3877  let Inst{20-16} = Vv32{4-0};
3878  bits <5> Vx32;
3879  let Inst{4-0} = Vx32{4-0};
3880}
3881class Enc_7b523d : OpcodeHexagon {
3882  bits <5> Vu32;
3883  let Inst{12-8} = Vu32{4-0};
3884  bits <5> Vv32;
3885  let Inst{23-19} = Vv32{4-0};
3886  bits <3> Rt8;
3887  let Inst{18-16} = Rt8{2-0};
3888  bits <5> Vxx32;
3889  let Inst{4-0} = Vxx32{4-0};
3890}
3891class Enc_1178da : OpcodeHexagon {
3892  bits <3> Ii;
3893  let Inst{7-5} = Ii{2-0};
3894  bits <5> Vu32;
3895  let Inst{12-8} = Vu32{4-0};
3896  bits <5> Vv32;
3897  let Inst{20-16} = Vv32{4-0};
3898  bits <5> Vxx32;
3899  let Inst{4-0} = Vxx32{4-0};
3900}
3901class Enc_4b39e4 : OpcodeHexagon {
3902  bits <3> Ii;
3903  let Inst{7-5} = Ii{2-0};
3904  bits <5> Vu32;
3905  let Inst{12-8} = Vu32{4-0};
3906  bits <5> Vv32;
3907  let Inst{20-16} = Vv32{4-0};
3908  bits <5> Vdd32;
3909  let Inst{4-0} = Vdd32{4-0};
3910}
3911class Enc_310ba1 : OpcodeHexagon {
3912  bits <5> Vu32;
3913  let Inst{12-8} = Vu32{4-0};
3914  bits <5> Rtt32;
3915  let Inst{20-16} = Rtt32{4-0};
3916  bits <5> Vx32;
3917  let Inst{4-0} = Vx32{4-0};
3918}
3919class Enc_01d3d0 : OpcodeHexagon {
3920  bits <5> Vu32;
3921  let Inst{12-8} = Vu32{4-0};
3922  bits <5> Rt32;
3923  let Inst{20-16} = Rt32{4-0};
3924  bits <5> Vdd32;
3925  let Inst{4-0} = Vdd32{4-0};
3926}
3927class Enc_5e8512 : OpcodeHexagon {
3928  bits <5> Vu32;
3929  let Inst{12-8} = Vu32{4-0};
3930  bits <5> Rt32;
3931  let Inst{20-16} = Rt32{4-0};
3932  bits <5> Vxx32;
3933  let Inst{4-0} = Vxx32{4-0};
3934}
3935class Enc_31db33 : OpcodeHexagon {
3936  bits <2> Qt4;
3937  let Inst{6-5} = Qt4{1-0};
3938  bits <5> Vu32;
3939  let Inst{12-8} = Vu32{4-0};
3940  bits <5> Vv32;
3941  let Inst{20-16} = Vv32{4-0};
3942  bits <5> Vd32;
3943  let Inst{4-0} = Vd32{4-0};
3944}
3945class Enc_6f83e7 : OpcodeHexagon {
3946  bits <2> Qv4;
3947  let Inst{23-22} = Qv4{1-0};
3948  bits <5> Vd32;
3949  let Inst{4-0} = Vd32{4-0};
3950}
3951class Enc_cb785b : OpcodeHexagon {
3952  bits <5> Vu32;
3953  let Inst{12-8} = Vu32{4-0};
3954  bits <5> Rtt32;
3955  let Inst{20-16} = Rtt32{4-0};
3956  bits <5> Vdd32;
3957  let Inst{4-0} = Vdd32{4-0};
3958}
3959class Enc_ad9bef : OpcodeHexagon {
3960  bits <5> Vu32;
3961  let Inst{12-8} = Vu32{4-0};
3962  bits <5> Rtt32;
3963  let Inst{20-16} = Rtt32{4-0};
3964  bits <5> Vxx32;
3965  let Inst{4-0} = Vxx32{4-0};
3966}
3967class Enc_2f2f04 : OpcodeHexagon {
3968  bits <1> Ii;
3969  let Inst{5-5} = Ii{0-0};
3970  bits <5> Vuu32;
3971  let Inst{12-8} = Vuu32{4-0};
3972  bits <5> Rt32;
3973  let Inst{20-16} = Rt32{4-0};
3974  bits <5> Vdd32;
3975  let Inst{4-0} = Vdd32{4-0};
3976}
3977class Enc_d483b9 : OpcodeHexagon {
3978  bits <1> Ii;
3979  let Inst{5-5} = Ii{0-0};
3980  bits <5> Vuu32;
3981  let Inst{12-8} = Vuu32{4-0};
3982  bits <5> Rt32;
3983  let Inst{20-16} = Rt32{4-0};
3984  bits <5> Vxx32;
3985  let Inst{4-0} = Vxx32{4-0};
3986}
3987class Enc_1bd127 : OpcodeHexagon {
3988  bits <5> Vu32;
3989  let Inst{12-8} = Vu32{4-0};
3990  bits <3> Rt8;
3991  let Inst{18-16} = Rt8{2-0};
3992  bits <5> Vdddd32;
3993  let Inst{4-0} = Vdddd32{4-0};
3994}
3995class Enc_d7bc34 : OpcodeHexagon {
3996  bits <5> Vu32;
3997  let Inst{12-8} = Vu32{4-0};
3998  bits <3> Rt8;
3999  let Inst{18-16} = Rt8{2-0};
4000  bits <5> Vyyyy32;
4001  let Inst{4-0} = Vyyyy32{4-0};
4002}
4003class Enc_3b7631 : OpcodeHexagon {
4004  bits <5> Vu32;
4005  let Inst{12-8} = Vu32{4-0};
4006  bits <5> Vdddd32;
4007  let Inst{4-0} = Vdddd32{4-0};
4008  bits <3> Rx8;
4009  let Inst{18-16} = Rx8{2-0};
4010}
4011class Enc_bddee3 : OpcodeHexagon {
4012  bits <5> Vu32;
4013  let Inst{12-8} = Vu32{4-0};
4014  bits <5> Vyyyy32;
4015  let Inst{4-0} = Vyyyy32{4-0};
4016  bits <3> Rx8;
4017  let Inst{18-16} = Rx8{2-0};
4018}
4019class Enc_dd766a : OpcodeHexagon {
4020  bits <5> Vu32;
4021  let Inst{12-8} = Vu32{4-0};
4022  bits <5> Vdd32;
4023  let Inst{4-0} = Vdd32{4-0};
4024}
4025class Enc_16c48b : OpcodeHexagon {
4026  bits <5> Rt32;
4027  let Inst{20-16} = Rt32{4-0};
4028  bits <1> Mu2;
4029  let Inst{13-13} = Mu2{0-0};
4030  bits <5> Vv32;
4031  let Inst{12-8} = Vv32{4-0};
4032  bits <5> Vw32;
4033  let Inst{4-0} = Vw32{4-0};
4034}
4035class Enc_9be1de : OpcodeHexagon {
4036  bits <2> Qs4;
4037  let Inst{6-5} = Qs4{1-0};
4038  bits <5> Rt32;
4039  let Inst{20-16} = Rt32{4-0};
4040  bits <1> Mu2;
4041  let Inst{13-13} = Mu2{0-0};
4042  bits <5> Vv32;
4043  let Inst{12-8} = Vv32{4-0};
4044  bits <5> Vw32;
4045  let Inst{4-0} = Vw32{4-0};
4046}
4047class Enc_a641d0 : OpcodeHexagon {
4048  bits <5> Rt32;
4049  let Inst{20-16} = Rt32{4-0};
4050  bits <1> Mu2;
4051  let Inst{13-13} = Mu2{0-0};
4052  bits <5> Vvv32;
4053  let Inst{12-8} = Vvv32{4-0};
4054  bits <5> Vw32;
4055  let Inst{4-0} = Vw32{4-0};
4056}
4057class Enc_3d6d37 : OpcodeHexagon {
4058  bits <2> Qs4;
4059  let Inst{6-5} = Qs4{1-0};
4060  bits <5> Rt32;
4061  let Inst{20-16} = Rt32{4-0};
4062  bits <1> Mu2;
4063  let Inst{13-13} = Mu2{0-0};
4064  bits <5> Vvv32;
4065  let Inst{12-8} = Vvv32{4-0};
4066  bits <5> Vw32;
4067  let Inst{4-0} = Vw32{4-0};
4068}
4069class Enc_3dac0b : OpcodeHexagon {
4070  bits <2> Qt4;
4071  let Inst{6-5} = Qt4{1-0};
4072  bits <5> Vu32;
4073  let Inst{12-8} = Vu32{4-0};
4074  bits <5> Vv32;
4075  let Inst{20-16} = Vv32{4-0};
4076  bits <5> Vdd32;
4077  let Inst{4-0} = Vdd32{4-0};
4078}
4079class Enc_500cb0 : OpcodeHexagon {
4080  bits <5> Vu32;
4081  let Inst{12-8} = Vu32{4-0};
4082  bits <5> Vxx32;
4083  let Inst{4-0} = Vxx32{4-0};
4084}
4085class Enc_efaed8 : OpcodeHexagon {
4086  bits <1> Ii;
4087  let Inst{8-8} = Ii{0-0};
4088}
4089class Enc_802dc0 : OpcodeHexagon {
4090  bits <1> Ii;
4091  let Inst{8-8} = Ii{0-0};
4092  bits <2> Qv4;
4093  let Inst{23-22} = Qv4{1-0};
4094}
4095class Enc_ef601b : OpcodeHexagon {
4096  bits <4> Ii;
4097  let Inst{13-13} = Ii{3-3};
4098  let Inst{10-8} = Ii{2-0};
4099  bits <2> Pv4;
4100  let Inst{12-11} = Pv4{1-0};
4101  bits <5> Rt32;
4102  let Inst{20-16} = Rt32{4-0};
4103}
4104class Enc_6baed4 : OpcodeHexagon {
4105  bits <3> Ii;
4106  let Inst{10-8} = Ii{2-0};
4107  bits <2> Pv4;
4108  let Inst{12-11} = Pv4{1-0};
4109  bits <5> Rx32;
4110  let Inst{20-16} = Rx32{4-0};
4111}
4112class Enc_691712 : OpcodeHexagon {
4113  bits <2> Pv4;
4114  let Inst{12-11} = Pv4{1-0};
4115  bits <1> Mu2;
4116  let Inst{13-13} = Mu2{0-0};
4117  bits <5> Rx32;
4118  let Inst{20-16} = Rx32{4-0};
4119}
4120class Enc_403871 : OpcodeHexagon {
4121  bits <5> Rx32;
4122  let Inst{20-16} = Rx32{4-0};
4123}
4124class Enc_2d829e : OpcodeHexagon {
4125  bits <14> Ii;
4126  let Inst{10-0} = Ii{13-3};
4127  bits <5> Rs32;
4128  let Inst{20-16} = Rs32{4-0};
4129}
4130class Enc_ca3887 : OpcodeHexagon {
4131  bits <5> Rs32;
4132  let Inst{20-16} = Rs32{4-0};
4133  bits <5> Rt32;
4134  let Inst{12-8} = Rt32{4-0};
4135}
4136class Enc_9e9047 : OpcodeHexagon {
4137  bits <2> Pt4;
4138  let Inst{9-8} = Pt4{1-0};
4139  bits <5> Rs32;
4140  let Inst{20-16} = Rs32{4-0};
4141}
4142class Enc_7d1542 : OpcodeHexagon {
4143  bits <7> Ss128;
4144  let Inst{22-16} = Ss128{6-0};
4145  bits <5> Rd32;
4146  let Inst{4-0} = Rd32{4-0};
4147}
4148class Enc_8f7633 : OpcodeHexagon {
4149  bits <5> Rs32;
4150  let Inst{20-16} = Rs32{4-0};
4151  bits <7> Sd128;
4152  let Inst{6-0} = Sd128{6-0};
4153}
4154class Enc_46f33d : OpcodeHexagon {
4155  bits <5> Rss32;
4156  let Inst{20-16} = Rss32{4-0};
4157  bits <5> Rt32;
4158  let Inst{12-8} = Rt32{4-0};
4159}
4160class Enc_d0fe02 : OpcodeHexagon {
4161  bits <5> Rxx32;
4162  let Inst{20-16} = Rxx32{4-0};
4163  bits <0> sgp10;
4164}
4165class Enc_e32517 : OpcodeHexagon {
4166  bits <7> Sss128;
4167  let Inst{22-16} = Sss128{6-0};
4168  bits <5> Rdd32;
4169  let Inst{4-0} = Rdd32{4-0};
4170}
4171class Enc_a705fc : OpcodeHexagon {
4172  bits <5> Rss32;
4173  let Inst{20-16} = Rss32{4-0};
4174  bits <7> Sdd128;
4175  let Inst{6-0} = Sdd128{6-0};
4176}
4177class Enc_e6abcf : OpcodeHexagon {
4178  bits <5> Rs32;
4179  let Inst{20-16} = Rs32{4-0};
4180  bits <5> Rtt32;
4181  let Inst{12-8} = Rtt32{4-0};
4182}
4183class Enc_b00112 : OpcodeHexagon {
4184  bits <5> Rss32;
4185  let Inst{20-16} = Rss32{4-0};
4186  bits <5> Rtt32;
4187  let Inst{12-8} = Rtt32{4-0};
4188}
4189class Enc_598f6c : OpcodeHexagon {
4190  bits <5> Rtt32;
4191  let Inst{12-8} = Rtt32{4-0};
4192}
4193