xref: /freebsd/contrib/llvm-project/llvm/lib/Target/CSKY/CSKYInstrInfo16Instr.td (revision 7ef62cebc2f965b0f640263e179276928885e33d) 
1//===-- CSKYInstrInfo16Instr.td - CSKY 16-bit Instruction --*- tablegen -*-===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This file describes the CSKY 16-bit instructions in TableGen format.
10//
11//===----------------------------------------------------------------------===//
12
13//===----------------------------------------------------------------------===//
14// CSKY specific DAG Nodes.
15//===----------------------------------------------------------------------===//
16
17// Target-dependent nodes.
18def CSKY_NIE : SDNode<"CSKYISD::NIE", SDTNone,
19    [SDNPHasChain, SDNPOptInGlue]>;
20def CSKY_NIR : SDNode<"CSKYISD::NIR", SDTNone,
21    [SDNPHasChain, SDNPOptInGlue]>;
22
23//===----------------------------------------------------------------------===//
24// Operand and SDNode transformation definitions.
25//===----------------------------------------------------------------------===//
26
27def br_symbol_16bit : Operand<OtherVT> {
28  let EncoderMethod =
29    "getBranchSymbolOpValue<CSKY::fixup_csky_pcrel_imm10_scale2>";
30  let ParserMatchClass = CSKYSymbol;
31  let DecoderMethod = "decodeSImmOperand<10, 1>";
32  let PrintMethod = "printCSKYSymbolOperand";
33  let OperandType = "OPERAND_PCREL";
34}
35
36def constpool_symbol_16bit : Operand<iPTR> {
37  let ParserMatchClass = Constpool;
38  let EncoderMethod =
39    "getConstpoolSymbolOpValue<CSKY::fixup_csky_pcrel_uimm7_scale4>";
40  let DecoderMethod = "decodeLRW16Imm8";
41  let PrintMethod = "printConstpool";
42  let OperandType = "OPERAND_PCREL";
43}
44
45//===----------------------------------------------------------------------===//
46// Instruction Formats
47//===----------------------------------------------------------------------===//
48
49include "CSKYInstrFormats16Instr.td"
50
51//===----------------------------------------------------------------------===//
52// Instruction definitions.
53//===----------------------------------------------------------------------===//
54
55//===----------------------------------------------------------------------===//
56// Basic ALU instructions.
57//===----------------------------------------------------------------------===//
58
59let isCommutable = 1, isAdd = 1 in
60  def ADDU16 : R16_XYZ<0, "addu16", add>;
61let Pattern = [(set mGPR:$rz, (sub mGPR:$rx, mGPR:$ry))] in
62  def SUBU16 : R16_XYZ<1, "subu16", sub>;
63
64let isCommutable = 1, isAdd = 1 in
65  def ADDC16 : R16_XZ_BINOP_C<0b1000, 0b01, "addc16">;
66def SUBC16 : R16_XZ_BINOP_C<0b1000, 0b11, "subc16">;
67
68let isCommutable = 1 in {
69  let isAdd = 1 in
70  def ADDU16XZ : R16_XZ_BINOP<0b1000, 0b00, "addu16", BinOpFrag<(add node:$LHS, node:$RHS)>>;
71  def AND16 : R16_XZ_BINOP<0b1010, 0b00, "and16", BinOpFrag<(and node:$LHS, node:$RHS)>>;
72  def OR16 : R16_XZ_BINOP<0b1011, 0b00, "or16", BinOpFrag<(or node:$LHS, node:$RHS)>>;
73  def XOR16 : R16_XZ_BINOP<0b1011, 0b01, "xor16", BinOpFrag<(xor node:$LHS, node:$RHS)>>;
74  def NOR16 : R16_XZ_BINOP<0b1011, 0b10, "nor16", BinOpFrag<(not (or node:$LHS, node:$RHS))>>;
75  let isCodeGenOnly = 1 in
76  def NOT16 : R16_Z_UNOP<0b1011, 0b10, "not16">;
77  def MULT16 :  R16_XZ_BINOP<0b1111, 0b00, "mult16", BinOpFrag<(mul node:$LHS, node:$RHS)>>;
78}
79def SUBU16XZ : R16_XZ_BINOP<0b1000, 0b10, "subu16", BinOpFrag<(sub node:$LHS, node:$RHS)>>;
80def ANDN16 : R16_XZ_BINOP<0b1010, 0b01, "andn16", BinOpFrag<(and node:$LHS, (not node:$RHS))>>;
81def LSL16 : R16_XZ_BINOP<0b1100, 0b00, "lsl16", BinOpFrag<(shl node:$LHS, node:$RHS)>>;
82def LSR16 : R16_XZ_BINOP<0b1100, 0b01, "lsr16", BinOpFrag<(srl node:$LHS, node:$RHS)>>;
83def ASR16 : R16_XZ_BINOP<0b1100, 0b10, "asr16", BinOpFrag<(sra node:$LHS, node:$RHS)>>;
84def ROTL16 : R16_XZ_BINOP<0b1100, 0b11, "rotl16", BinOpFrag<(rotl node:$LHS, (and node:$RHS, 0x1f))>>;
85
86def MULSH16 : R16_XZ_BINOP_NOPat<0b1111, 0b01, "mulsh16">;
87
88def ZEXTB16 : R16_XZ_UNOP<0b1101, 0b00, "zextb16">;
89def ZEXTH16 : R16_XZ_UNOP<0b1101, 0b01, "zexth16">;
90def SEXTB16 : R16_XZ_UNOP<0b1101, 0b10, "sextb16">;
91def SEXTH16 : R16_XZ_UNOP<0b1101, 0b11, "sexth16">;
92
93let Constraints = "$rZ = $rz", isReMaterializable = 1, isAsCheapAsAMove = 1 in {
94  let isAdd = 1, Pattern = [(set mGPR:$rz, (add mGPR:$rZ, oimm8:$imm8))] in
95  def ADDI16 : I16_Z_8<0b100, (ins mGPR:$rZ, oimm8:$imm8), "addi16\t$rz, $imm8">;
96  let Pattern = [(set mGPR:$rz, (sub mGPR:$rZ, oimm8:$imm8))] in
97  def SUBI16 : I16_Z_8<0b101, (ins mGPR:$rZ, oimm8:$imm8), "subi16\t$rz, $imm8">;
98}
99
100let isAdd = 1 in
101def ADDI16ZSP : I16_Z_8<0b011, (ins GPRSP:$sp, uimm8_2:$imm8),
102                        "addi16\t$rz, $sp, $imm8">;
103
104let isAdd = 1 in
105def ADDI16SPSP : I16_SP_IMM7<0b000,"addi16">;
106def SUBI16SPSP : I16_SP_IMM7<0b001,"subi16">;
107
108let isReMaterializable = 1, isAsCheapAsAMove = 1 in {
109  def LSLI16 : I16_XZ_IMM5<0, "lsli16", shl>;
110  def LSRI16 : I16_XZ_IMM5<1, "lsri16", srl>;
111  def ASRI16 : I16_XZ_IMM5<2, "asri16", sra>;
112}
113
114let isAdd = 1 in
115def ADDI16XZ : I16_XZ_IMM3<0b10, "addi16", add>;
116def SUBI16XZ : I16_XZ_IMM3<0b11, "subi16", sub>;
117
118let Size = 4 in
119def NEG16 : CSKYPseudo<(outs mGPR:$rd), (ins mGPR:$rx), "neg16 $rd, $rx", []>;
120
121let Size = 4 in
122def RSUBI16 : CSKYPseudo<(outs mGPR:$rd),
123  (ins mGPR:$rx, uimm8:$imm8), "rsubi16 $rd, $rx, $imm8", []>;
124
125//===----------------------------------------------------------------------===//
126// Load & Store instructions.
127//===----------------------------------------------------------------------===//
128
129def LD16B : I16_XZ_LDST<AddrMode16B, 0b000, "ld16.b",
130  (outs mGPR:$rz), (ins mGPR:$rx, uimm5:$imm)>;
131def LD16H : I16_XZ_LDST<AddrMode16H, 0b001, "ld16.h",
132  (outs mGPR:$rz), (ins mGPR:$rx, uimm5_1:$imm)>;
133def LD16W : I16_XZ_LDST<AddrMode16W, 0b010, "ld16.w",
134  (outs mGPR:$rz), (ins mGPR:$rx, uimm5_2:$imm)>;
135def ST16B : I16_XZ_LDST<AddrMode16B, 0b100, "st16.b",
136  (outs), (ins mGPR:$rz, mGPR:$rx, uimm5:$imm)>;
137def ST16H : I16_XZ_LDST<AddrMode16H, 0b101, "st16.h",
138  (outs), (ins mGPR:$rz, mGPR:$rx, uimm5_1:$imm)>;
139def ST16W : I16_XZ_LDST<AddrMode16W, 0b110, "st16.w",
140  (outs), (ins mGPR:$rz, mGPR:$rx, uimm5_2:$imm)>;
141
142def LD16WSP : I16_ZSP_LDST<AddrMode16W, 0b011, "ld16.w",
143  (outs mGPR:$rz), (ins GPRSP:$sp, uimm8_2:$addr)>;
144def ST16WSP : I16_ZSP_LDST<AddrMode16W, 0b111, "st16.w",
145  (outs), (ins mGPR:$rz, GPRSP:$sp, uimm8_2:$addr)>;
146
147//===----------------------------------------------------------------------===//
148// Compare instructions.
149//===----------------------------------------------------------------------===//
150
151def CMPHS16 : R16_XY_CMP<0, "cmphs16">;
152def CMPLT16 : R16_XY_CMP<1, "cmplt16">;
153let isCommutable = 1 in
154def CMPNE16 : R16_XY_CMP<2, "cmpne16">;
155
156
157def CMPHSI16 : I16_X_CMP<0, "cmphsi16", oimm5>;
158def CMPLTI16 : I16_X_CMP<1, "cmplti16", oimm5>;
159def CMPLEI16 : CSKYPseudo<(outs CARRY:$ca), (ins mGPR:$rx, uimm5:$imm5),
160    "cmplei16\t$rx, $imm5", []>;
161def CMPNEI16 : I16_X_CMP<2, "cmpnei16", uimm5>;
162
163//===----------------------------------------------------------------------===//
164// Data move instructions.
165//===----------------------------------------------------------------------===//
166
167
168def MOVI16 : I16_Z_8<0b110, (ins uimm8:$imm8), "movi16\t$rz, $imm8"> {
169  let isReMaterializable = 1;
170  let isAsCheapAsAMove = 1;
171  let isMoveImm = 1;
172  let Pattern = [(set mGPR:$rz, uimm8:$imm8)];
173}
174
175def MOV16 : CSKY16Inst<AddrModeNone, (outs sGPR:$rz), (ins sGPR:$rx),
176                       "mov16\t$rz, $rx", []> {
177  bits<4> rz;
178  bits<4> rx;
179  let Inst{15,14} = 0b01;
180  let Inst{13 - 10} = 0b1011;
181  let Inst{9 - 6} = rz;
182  let Inst{5 - 2} = rx;
183  let Inst{1,0} = 0b11;
184}
185
186// MVC16 is not in "cskyv2 instructions reference manul"
187def MVCV16 : CSKY16Inst<AddrModeNone,
188  (outs sGPR:$rz), (ins CARRY:$ca), "mvcv16\t$rz", []> {
189  bits<4> rz;
190  let Inst{15,14} = 0b01;
191  let Inst{13 - 10} = 0b1001;
192  let Inst{9 - 6} = rz;
193  let Inst{5 - 2} = 0;
194  let Inst{1,0} = 0b11;
195}
196
197
198//===----------------------------------------------------------------------===//
199// Branch and call instructions.
200//===----------------------------------------------------------------------===//
201
202let isBranch = 1, isTerminator = 1 in {
203  let isBarrier = 1, isPredicable = 1 in
204    def BR16 : J16<1, "br16", (ins br_symbol_16bit:$offset)>;
205
206  def BT16 : J16_B<2, "bt16">;
207  def BF16 : J16_B<3, "bf16">;
208}
209
210def JMP16 : R16_X_J<0b11100000, 0b00, "jmp16"> {
211  let isBranch = 1;
212  let isTerminator = 1;
213  let isBarrier = 1;
214  let isIndirectBranch = 1;
215  let Pattern = [(brind sGPR:$rx)];
216}
217
218def JSR16 : R16_X_J<0b11101111, 0b01, "jsr16"> {
219  let isCall = 1;
220  let Defs = [ R15 ];
221}
222
223def RTS16 : CSKY16Inst<AddrModeNone, (outs), (ins), "rts16", [(CSKY_RET)]> {
224  let isTerminator = 1;
225  let isReturn = 1;
226  let isBarrier = 1;
227  let Inst = 0b0111100000111100;
228  let Uses = [R15];
229  let isCodeGenOnly = 1;
230}
231
232def JMPIX16 :  CSKY16Inst<AddrModeNone, (outs),
233  (ins mGPR:$rx, uimm2_jmpix:$indeximm2), "jmpix16\t$rx, $indeximm2", []> {
234  bits<3> rx;
235  bits<2> indeximm2;
236  let Inst{15,14} = 0b00;
237  let Inst{13 - 11} = 0b111;
238  let Inst{10 - 8} = rx;
239  let Inst{7 - 2} = 0b111000;
240  let Inst{1,0} = indeximm2;
241  let Predicates = [HasJAVA];
242  let Uses = [R30];
243}
244
245//===----------------------------------------------------------------------===//
246// Symbol address instructions.
247//===----------------------------------------------------------------------===//
248
249def LRW16 : CSKY16Inst<AddrModeNone, (outs mGPR:$rz),
250  (ins constpool_symbol_16bit:$label), "lrw16\t$rz, $label", []> {
251  bits<3> rz;
252  bits<8> label;
253  let Inst{15 - 13} = 0b000;
254  let Inst{12} = label{7};
255  let Inst{11,10} = 0b00;
256  let Inst{9,8} = label{6,5};
257  let Inst{7 - 5} = rz;
258  let Inst{4 - 0} = label{4-0};
259  let mayLoad = 1;
260  let mayStore = 0;
261}
262
263def LRW16_Gen : CSKY16Inst<AddrModeNone, (outs mGPR:$rz),
264  (ins bare_symbol:$src, constpool_symbol_16bit:$label),
265  "lrw16\t$rz, $label", []> {
266  bits<3> rz;
267  bits<8> label;
268  let Inst{15 - 13} = 0b000;
269  let Inst{12} = label{7};
270  let Inst{11,10} = 0b00;
271  let Inst{9,8} = label{6,5};
272  let Inst{7 - 5} = rz;
273  let Inst{4 - 0} = label{4-0};
274  let mayLoad = 1;
275  let mayStore = 0;
276  let isCodeGenOnly = 1;
277}
278
279
280//===----------------------------------------------------------------------===//
281// Other operation instructions.
282//===----------------------------------------------------------------------===//
283
284def REVB16 :  R16_XZ_UNOP<0b1110, 0b10, "revb16">;
285def REVH16 :  R16_XZ_UNOP<0b1110, 0b11, "revh16">;
286
287let isCodeGenOnly = 1 in
288def SETC16 : CSKY16Inst<AddrModeNone,
289  (outs CARRY:$ca), (ins), "setc16", []> {
290  let Inst{15, 14} = 0b01;
291  let Inst{13 - 10} = 0b1001;
292  let Inst{9 - 6} = 0;
293  let Inst{5 - 2} = 0;
294  let Inst{1, 0} = 0;
295  let isCompare = 1;
296}
297
298let isCodeGenOnly = 1 in
299def CLRC16 : CSKY16Inst<AddrModeNone,
300  (outs CARRY:$ca), (ins), "clrc16", []> {
301  let Inst{15, 14} = 0b01;
302  let Inst{13 - 10} = 0b1001;
303  let Inst{9 - 6} = 0;
304  let Inst{5 - 2} = 0;
305  let Inst{1, 0} = 2;
306  let isCompare = 1;
307}
308
309let Constraints = "$rZ = $rz" in {
310  def BCLRI16 : I16_Z_5<0b100, (outs mGPR:$rz), (ins mGPR:$rZ, uimm5:$imm5),
311                        "bclri16">;
312  def BSETI16 : I16_Z_5<0b101, (outs mGPR:$rz), (ins mGPR:$rZ, uimm5:$imm5),
313                        "bseti16">;
314}
315
316let Predicates = [HasBTST16] in
317  def BTSTI16 : I16_Z_5<0b110, (outs CARRY:$ca), (ins mGPR:$rz, uimm5:$imm5),
318                        "btsti16">;
319
320def TST16 : CSKY16Inst<AddrModeNone, (outs CARRY:$ca), (ins sGPR:$rx, sGPR:$ry),
321                        "tst16\t$rx, $ry", []> {
322  bits<4> ry;
323  bits<4> rx;
324  let Inst{15,14} = 0b01;
325  let Inst{13 - 10} = 0b1010;
326  let Inst{9 - 6} = ry;
327  let Inst{5 - 2} = rx;
328  let Inst{1,0} = 0b10;
329  let isCompare = 1;
330}
331
332def TSTNBZ16 : CSKY16Inst<AddrModeNone, (outs CARRY:$ca), (ins sGPR:$rx),
333                          "tstnbz16\t$rx", []> {
334  bits<4> rx;
335  let Inst{15,14} = 0b01;
336  let Inst{13 - 10} = 0b1010;
337  let Inst{9 - 6} = 0b0000;
338  let Inst{5 - 2} = rx;
339  let Inst{1,0} = 0b11;
340  let isCompare = 1;
341}
342
343//===----------------------------------------------------------------------===//
344// Special instructions.
345//===----------------------------------------------------------------------===//
346
347def BKPT : CSKY16Inst<AddrModeNone, (outs), (ins), "bkpt", []> {
348  let Inst = 0;
349}
350
351let mayStore = 1 in {
352def BPUSHH : I16_BPushPop<0b00010100111, 0, (outs), (ins mGPR:$rz), "bpush.h $rz">;
353def BPUSHW : I16_BPushPop<0b00010100111, 0b10, (outs), (ins mGPR:$rz), "bpush.w $rz">;
354}
355
356let mayLoad = 1 in {
357def BPOPH : I16_BPushPop<0b00010100101, 0, (outs mGPR:$rz), (ins),  "bpop.h $rz">;
358def BPOPW : I16_BPushPop<0b00010100101, 0b10, (outs mGPR:$rz), (ins), "bpop.w $rz">;
359}
360
361def NIE : CSKY16Inst<AddrModeNone, (outs), (ins), "nie", [(CSKY_NIE)]> {
362  let Inst = 0b0001010001100000;
363}
364
365let isBarrier = 1, isReturn = 1, isTerminator = 1 in
366def NIR : CSKY16Inst<AddrModeNone, (outs), (ins), "nir", [(CSKY_NIR)]> {
367  let Inst = 0b0001010001100001;
368}
369
370def IPUSH16 : CSKY16Inst<AddrModeNone, (outs), (ins), "ipush16", []> {
371  let Inst{15- 5} = 0b00010100011;
372  let Inst{4-0} = 0b00010;
373  let Predicates = [iHasE1];
374  let Defs  = [R14];
375  let Uses  = [R14, R0, R1, R2, R3, R12, R13];
376  let mayStore = 1;
377}
378
379def IPOP16 : CSKY16Inst<AddrModeNone, (outs), (ins), "ipop16", []> {
380  let Inst{15- 5} = 0b00010100011;
381  let Inst{4-0} = 0b00011;
382  let Predicates = [iHasE1];
383  let Defs  = [R14, R0, R1, R2, R3, R12, R13];
384  let Uses  = [R14];
385  let mayLoad = 1;
386}
387
388def PUSH16 : CSKY16Inst<AddrModeNone, (outs),
389  (ins reglist:$regs, variable_ops), "push16 $regs", []> {
390  bits<5> regs;
391
392  let Inst{15- 5} = 0b00010100110;
393  let Inst{4-0} = regs;
394  let Predicates = [iHasE1];
395  let Defs  = [R14];
396  let Uses  = [R14];
397  let mayStore = 1;
398}
399
400def POP16 : CSKY16Inst<AddrModeNone, (outs),
401  (ins reglist:$regs, variable_ops), "pop16 $regs", []> {
402  bits<5> regs;
403
404  let Inst{15- 5} = 0b00010100100;
405  let Inst{4-0} = regs;
406  let Predicates = [iHasE1];
407  let Defs  = [R14];
408  let Uses  = [R14];
409  let mayLoad = 1;
410}
411
412//===----------------------------------------------------------------------===//
413// CSKYPseudo
414//===----------------------------------------------------------------------===//
415
416let usesCustomInserter = 1 in  {
417  def ISEL16 : CSKYPseudo<(outs sGPR:$dst),
418    (ins CARRY:$cond, sGPR:$src1, sGPR:$src2),
419    "!isel16\t$dst, $src1, src2",
420    [(set sGPR:$dst, (select CARRY:$cond, sGPR:$src1, sGPR:$src2))]>;
421}
422
423class JBranchPseudo<dag out, dag ins, string opstr> :
424  CSKYPseudo<out, ins, opstr, []> {
425  let isBranch = 1;
426  let isTerminator = 1;
427  let isIndirectBranch = 1;
428  let mayLoad = 1;
429  let Size = 2;
430}
431
432let isBarrier = 1 in
433def JBR16 : JBranchPseudo<(outs),
434  (ins br_symbol_16bit:$src1), "jbr16\t$src1">;
435def JBT16 : JBranchPseudo<(outs),
436  (ins CARRY:$ca, br_symbol_16bit:$src1), "jbt16\t$src1">;
437def JBF16 : JBranchPseudo<(outs),
438  (ins CARRY:$ca, br_symbol_16bit:$src1), "jbf16\t$src1">;
439
440let mayLoad = 1, Size = 2, isCodeGenOnly = 0 in
441def PseudoLRW16 : CSKYPseudo<(outs mGPR:$rz),
442  (ins bare_symbol:$src), "lrw16 $rz, $src", []>;
443
444//===----------------------------------------------------------------------===//
445// Instruction Patterns.
446//===----------------------------------------------------------------------===//
447
448def : Pat<(sext_inreg mGPR:$src, i1), (ASRI16 (LSLI16 mGPR:$src, 7), 7)>;
449def : Pat<(sext_inreg sGPR:$src, i8), (SEXTB16 sGPR:$src)>;
450def : Pat<(sext_inreg sGPR:$src, i16), (SEXTH16 sGPR:$src)>;
451
452// Load & Store Patterns
453
454defm : LdPat<extloadi8, uimm5, LD16B, i32>;
455defm : LdPat<zextloadi8, uimm5, LD16B, i32>;
456
457defm : LdPat<extloadi16, uimm5_1, LD16H, i32>;
458defm : LdPat<zextloadi16, uimm5_1, LD16H, i32>;
459
460defm : LdPat<load, uimm5_2, LD16W, i32>;
461
462
463defm : StPat<truncstorei8, i32, uimm5, ST16B>;
464defm : StPat<truncstorei16, i32, uimm5_1, ST16H>;
465defm : StPat<store, i32, uimm5_2, ST16W>;
466
467def : Pat<(CSKY_CALLReg sGPR:$src), (JSR16 sGPR:$src)>;
468def : Pat<(CSKY_TAILReg sGPR:$src), (JMP16 sGPR:$src)>;
469
470// Symbol address Patterns
471def : Pat<(CSKY_LOAD_ADDR tglobaladdr, tconstpool:$src2), (LRW16 tconstpool:$src2)>;
472def : Pat<(CSKY_LOAD_ADDR tblockaddress, tconstpool:$src2), (LRW16 tconstpool:$src2)>;
473def : Pat<(CSKY_LOAD_ADDR tjumptable:$src1, tconstpool:$src2), (LRW16_Gen tjumptable:$src1, tconstpool:$src2)>;
474def : Pat<(CSKY_LOAD_ADDR texternalsym, tconstpool:$src2), (LRW16 tconstpool:$src2)>;
475def : Pat<(CSKY_LOAD_ADDR tconstpool:$src1, tconstpool:$src2), (LRW16_Gen tconstpool:$src1, tconstpool:$src2)>;
476
477def : Pat<(i32 (load constpool:$src)), (LRW16 (to_tconstpool tconstpool:$src))>;
478
479// Branch Patterns.
480
481def : Pat<(brcond CARRY:$ca, bb:$offset),
482          (BT16 CARRY:$ca, bb:$offset)>;
483
484def : Pat<(br bb:$offset), (BR16 bb:$offset)>;
485
486def : Pat<(brcond (i32 (setne mGPR:$rs1, uimm5:$rs2)), bb:$offset),
487          (BT16 (CMPNEI16 mGPR:$rs1, uimm5:$rs2), bb:$offset)>;
488def : Pat<(brcond (i32 (seteq mGPR:$rs1, uimm5:$rs2)), bb:$offset),
489          (BF16 (CMPNEI16 mGPR:$rs1, uimm5:$rs2), bb:$offset)>;
490def : Pat<(brcond (i32 (setuge mGPR:$rs1, oimm5:$rs2)), bb:$offset),
491          (BT16 (CMPHSI16 mGPR:$rs1, oimm5:$rs2), bb:$offset)>;
492def : Pat<(brcond (i32 (setult mGPR:$rs1, oimm5:$rs2)), bb:$offset),
493          (BF16 (CMPHSI16 mGPR:$rs1, oimm5:$rs2), bb:$offset)>;
494def : Pat<(brcond (i32 (setlt mGPR:$rs1, oimm5:$rs2)), bb:$offset),
495          (BT16 (CMPLTI16 mGPR:$rs1, oimm5:$rs2), bb:$offset)>;
496def : Pat<(brcond (i32 (setge mGPR:$rs1, oimm5:$rs2)), bb:$offset),
497          (BF16 (CMPLTI16 mGPR:$rs1, oimm5:$rs2), bb:$offset)>;
498
499def : Pat<(brcond (i32 (setne sGPR:$rs1, sGPR:$rs2)), bb:$offset),
500          (BT16 (CMPNE16 sGPR:$rs1, sGPR:$rs2), bb:$offset)>;
501def : Pat<(brcond (i32 (seteq sGPR:$rs1, sGPR:$rs2)), bb:$offset),
502          (BF16 (CMPNE16 sGPR:$rs1, sGPR:$rs2), bb:$offset)>;
503def : Pat<(brcond (i32 (setuge sGPR:$rs1, sGPR:$rs2)), bb:$offset),
504          (BT16 (CMPHS16 sGPR:$rs1, sGPR:$rs2), bb:$offset)>;
505def : Pat<(brcond (i32 (setule sGPR:$rs1, sGPR:$rs2)), bb:$offset),
506          (BT16 (CMPHS16 sGPR:$rs2, sGPR:$rs1), bb:$offset)>;
507def : Pat<(brcond (i32 (setult sGPR:$rs1, sGPR:$rs2)), bb:$offset),
508          (BF16 (CMPHS16 sGPR:$rs1, sGPR:$rs2), bb:$offset)>;
509def : Pat<(brcond (i32 (setugt sGPR:$rs1, sGPR:$rs2)), bb:$offset),
510          (BF16 (CMPHS16 sGPR:$rs2, sGPR:$rs1), bb:$offset)>;
511def : Pat<(brcond (i32 (setlt sGPR:$rs1, sGPR:$rs2)), bb:$offset),
512          (BT16 (CMPLT16 sGPR:$rs1, sGPR:$rs2), bb:$offset)>;
513def : Pat<(brcond (i32 (setgt sGPR:$rs1, sGPR:$rs2)), bb:$offset),
514          (BT16 (CMPLT16 sGPR:$rs2, sGPR:$rs1), bb:$offset)>;
515def : Pat<(brcond (i32 (setge sGPR:$rs1, sGPR:$rs2)), bb:$offset),
516          (BF16 (CMPLT16 sGPR:$rs1, sGPR:$rs2), bb:$offset)>;
517def : Pat<(brcond (i32 (setle sGPR:$rs1, sGPR:$rs2)), bb:$offset),
518          (BF16 (CMPLT16 sGPR:$rs2, sGPR:$rs1), bb:$offset)>;
519
520// Compare Patterns.
521def : Pat<(setne sGPR:$rs1, sGPR:$rs2),
522          (SUBU16XZ (MOVI16 1), (MVCV16 (CMPNE16 sGPR:$rs1, sGPR:$rs2)))>;
523def : Pat<(seteq sGPR:$rs1, sGPR:$rs2),
524          (MVCV16 (CMPNE16 sGPR:$rs1, sGPR:$rs2))>;
525def : Pat<(setuge sGPR:$rs1, sGPR:$rs2),
526          (SUBU16XZ (MOVI16 1), (MVCV16 (CMPHS16 sGPR:$rs1, sGPR:$rs2)))>;
527def : Pat<(setule sGPR:$rs1, sGPR:$rs2),
528          (SUBU16XZ (MOVI16 1), (MVCV16 (CMPHS16 sGPR:$rs2, sGPR:$rs1)))>;
529def : Pat<(setult sGPR:$rs1, sGPR:$rs2),
530          (MVCV16 (CMPHS16 sGPR:$rs1, sGPR:$rs2))>;
531def : Pat<(setugt sGPR:$rs1, sGPR:$rs2),
532          (MVCV16 (CMPHS16 sGPR:$rs2, sGPR:$rs1))>;
533def : Pat<(setlt sGPR:$rs1, sGPR:$rs2),
534          (SUBU16XZ (MOVI16 1), (MVCV16 (CMPLT16 sGPR:$rs1, sGPR:$rs2)))>;
535def : Pat<(setgt sGPR:$rs1, sGPR:$rs2),
536          (SUBU16XZ (MOVI16 1), (MVCV16 (CMPLT16 sGPR:$rs2, sGPR:$rs1)))>;
537def : Pat<(setge sGPR:$rs1, sGPR:$rs2),
538          (MVCV16 (CMPLT16 sGPR:$rs1, sGPR:$rs2))>;
539def : Pat<(setle sGPR:$rs1, sGPR:$rs2),
540          (MVCV16 (CMPLT16 sGPR:$rs2, sGPR:$rs1))>;
541
542
543def : Pat<(setne mGPR:$rs1, uimm5:$rs2),
544          (SUBU16XZ (MOVI16 1), (MVCV16 (CMPNEI16 mGPR:$rs1, uimm5:$rs2)))>;
545def : Pat<(seteq mGPR:$rs1, uimm5:$rs2),
546          (MVCV16 (CMPNEI16 mGPR:$rs1, uimm5:$rs2))>;
547def : Pat<(setuge mGPR:$rs1, oimm5:$rs2),
548          (SUBU16XZ (MOVI16 1), (MVCV16 (CMPHSI16 mGPR:$rs1, oimm5:$rs2)))>;
549def : Pat<(setult mGPR:$rs1, oimm5:$rs2),
550          (MVCV16 (CMPHSI16 mGPR:$rs1, oimm5:$rs2))>;
551def : Pat<(setlt mGPR:$rs1, oimm5:$rs2),
552          (SUBU16XZ (MOVI16 1), (MVCV16 (CMPLTI16 mGPR:$rs1, oimm5:$rs2)))>;
553def : Pat<(setge mGPR:$rs1, oimm5:$rs2),
554          (MVCV16 (CMPLTI16 mGPR:$rs1, oimm5:$rs2))>;
555
556def : Pat<(select CARRY:$ca, sGPR:$rx, sGPR:$false),
557          (ISEL16 CARRY:$ca, sGPR:$rx, sGPR:$false)>;
558def : Pat<(select (and CARRY:$ca, 1), sGPR:$rx, sGPR:$false),
559          (ISEL16 CARRY:$ca, sGPR:$rx, sGPR:$false)>;
560
561def : Pat<(rotl sGPR:$rs1, sGPR:$rs2),
562          (ROTL16 sGPR:$rs1, (AND16 sGPR:$rs2, (MOVI16 0x1f)))>;
563
564
565// FIXME: This is a temporary treatment for the e801.
566def : Pat<(i32 imm:$imm),
567          (OR16 (MOVI16 (uimm8SRL_0 imm:$imm)),
568	              (OR16 (LSLI16 (MOVI16 (uimm8SRL_8 imm:$imm)), 8),
569	                    (OR16 (LSLI16 (MOVI16 (uimm8SRL_16 imm:$imm)), 16),
570                            (LSLI16 (MOVI16 (uimm8SRL_24 imm:$imm)), 24))))>;
571
572// Other operations.
573let Predicates = [iHasE2] in {
574  def : Pat<(bswap sGPR:$rx), (REVB16 sGPR:$rx)>;
575}
576
577//===----------------------------------------------------------------------===//
578// Compress Instruction tablegen backend.
579//===----------------------------------------------------------------------===//
580
581def : CompressPat<(ADDU32 sGPR:$rd, sGPR:$rd, sGPR:$rs2),
582                  (ADDU16XZ sGPR:$rd, sGPR:$rs2)>;
583def : CompressPat<(ADDU32 sGPR:$rd, sGPR:$rs1, sGPR:$rd),
584                  (ADDU16XZ sGPR:$rd, sGPR:$rs1)>;
585def : CompressPat<(ADDU32 mGPR:$rd, mGPR:$rs1, mGPR:$rs2),
586                  (ADDU16 mGPR:$rd, mGPR:$rs1, mGPR:$rs2)>;
587def : CompressPat<(SUBU32 sGPR:$rd, sGPR:$rd, sGPR:$rs2),
588                  (SUBU16XZ sGPR:$rd, sGPR:$rs2)>;
589def : CompressPat<(SUBU32 mGPR:$rd, mGPR:$rs1, mGPR:$rs2),
590                  (SUBU16 mGPR:$rd, mGPR:$rs1, mGPR:$rs2)>;
591
592def : CompressPat<
593  (ADDC32 sGPR:$rd, CARRY:$cout, sGPR:$rd, sGPR:$rs2, CARRY:$cout),
594  (ADDC16 sGPR:$rd, CARRY:$cout, sGPR:$rs2, CARRY:$cout)
595  >;
596def : CompressPat<
597  (SUBC32 sGPR:$rd, CARRY:$cout, sGPR:$rd, sGPR:$rs2, CARRY:$cout),
598  (SUBC16 sGPR:$rd, CARRY:$cout, sGPR:$rs2, CARRY:$cout)
599  >;
600
601def : CompressPat<(ADDI32 mGPR:$rd, mGPR:$rs, oimm3:$imm),
602                  (ADDI16XZ mGPR:$rd, mGPR:$rs, oimm3:$imm)>;
603def : CompressPat<(SUBI32 mGPR:$rd, mGPR:$rs, oimm3:$imm),
604                  (SUBI16XZ mGPR:$rd, mGPR:$rs, oimm3:$imm)>;
605
606def : CompressPat<(ADDI32 mGPR:$rd, mGPR:$rd, oimm8:$imm),
607                  (ADDI16 mGPR:$rd, oimm8:$imm)>;
608def : CompressPat<(SUBI32 mGPR:$rd, mGPR:$rd, oimm8:$imm),
609                  (SUBI16 mGPR:$rd, oimm8:$imm)>;
610
611def : CompressPat<(ADDI32 GPRSP:$sp, GPRSP:$sp, uimm7_2:$imm),
612                  (ADDI16SPSP GPRSP:$sp, GPRSP:$sp, uimm7_2:$imm)>;
613def : CompressPat<(SUBI32 GPRSP:$sp, GPRSP:$sp, uimm7_2:$imm),
614                  (SUBI16SPSP GPRSP:$sp, GPRSP:$sp, uimm7_2:$imm)>;
615
616def : CompressPat<(ADDI32 mGPR:$rd, GPRSP:$sp, uimm8_2:$imm),
617                  (ADDI16ZSP mGPR:$rd, GPRSP:$sp, uimm8_2:$imm)>;
618
619def : CompressPat<(MULT32 sGPR:$rd, sGPR:$rd, sGPR:$rs2),
620                  (MULT16 sGPR:$rd, sGPR:$rs2)>;
621def : CompressPat<(MULT32 sGPR:$rd, sGPR:$rs1, sGPR:$rd),
622                  (MULT16 sGPR:$rd, sGPR:$rs1)>;
623def : CompressPat<(AND32 sGPR:$rd, sGPR:$rd, sGPR:$rs2),
624                  (AND16 sGPR:$rd, sGPR:$rs2)>;
625def : CompressPat<(AND32 sGPR:$rd, sGPR:$rs1, sGPR:$rd),
626                  (AND16 sGPR:$rd, sGPR:$rs1)>;
627def : CompressPat<(OR32 sGPR:$rd, sGPR:$rd, sGPR:$rs2),
628                  (OR16 sGPR:$rd, sGPR:$rs2)>;
629def : CompressPat<(OR32 sGPR:$rd, sGPR:$rs1, sGPR:$rd),
630                  (OR16 sGPR:$rd, sGPR:$rs1)>;
631def : CompressPat<(XOR32 sGPR:$rd, sGPR:$rd, sGPR:$rs2),
632                  (XOR16 sGPR:$rd, sGPR:$rs2)>;
633def : CompressPat<(XOR32 sGPR:$rd, sGPR:$rs1, sGPR:$rd),
634                  (XOR16 sGPR:$rd, sGPR:$rs1)>;
635
636def : CompressPat<(ANDN32 sGPR:$rd, sGPR:$rd, sGPR:$rs2),
637                  (ANDN16 sGPR:$rd, sGPR:$rs2)>;
638def : CompressPat<(NOR32 sGPR:$rd, sGPR:$rd, sGPR:$rs2),
639                  (NOR16 sGPR:$rd, sGPR:$rs2)>;
640def : CompressPat<(LSL32 sGPR:$rd, sGPR:$rd, sGPR:$rs2),
641                  (LSL16 sGPR:$rd, sGPR:$rs2)>;
642def : CompressPat<(LSR32 sGPR:$rd, sGPR:$rd, sGPR:$rs2),
643                  (LSR16 sGPR:$rd, sGPR:$rs2)>;
644def : CompressPat<(ASR32 sGPR:$rd, sGPR:$rd, sGPR:$rs2),
645                  (ASR16 sGPR:$rd, sGPR:$rs2)>;
646def : CompressPat<(ROTL32 sGPR:$rd, sGPR:$rd, sGPR:$rs2),
647                  (ROTL16 sGPR:$rd, sGPR:$rs2)>;
648
649def : CompressPat<(NOT32 sGPR:$rd, sGPR:$rd),
650                  (NOT16 sGPR:$rd)>;
651
652let Predicates = [iHas2E3] in
653def : CompressPat<(REVB32 sGPR:$rd, sGPR:$rs),
654                  (REVB16 sGPR:$rd, sGPR:$rs)>;
655
656def : CompressPat<(LSLI32 mGPR:$rd, mGPR:$rs, uimm5:$imm),
657                  (LSLI16 mGPR:$rd, mGPR:$rs, uimm5:$imm)>;
658def : CompressPat<(LSRI32 mGPR:$rd, mGPR:$rs, uimm5:$imm),
659                  (LSRI16 mGPR:$rd, mGPR:$rs, uimm5:$imm)>;
660def : CompressPat<(ASRI32 mGPR:$rd, mGPR:$rs, uimm5:$imm),
661                  (ASRI16 mGPR:$rd, mGPR:$rs, uimm5:$imm)>;
662
663def : CompressPat<(CMPHS32 CARRY:$ca, sGPR:$rs1, sGPR:$rs2),
664                  (CMPHS16 CARRY:$ca, sGPR:$rs1, sGPR:$rs2)>;
665def : CompressPat<(CMPLT32 CARRY:$ca, sGPR:$rs1, sGPR:$rs2),
666                  (CMPLT16 CARRY:$ca, sGPR:$rs1, sGPR:$rs2)>;
667def : CompressPat<(CMPNE32 CARRY:$ca, sGPR:$rs1, sGPR:$rs2),
668                  (CMPNE16 CARRY:$ca, sGPR:$rs1, sGPR:$rs2)>;
669
670def : CompressPat<(CMPHSI32 CARRY:$ca, mGPR:$rs, oimm5:$imm),
671                  (CMPHSI16 CARRY:$ca, mGPR:$rs, oimm5:$imm)>;
672def : CompressPat<(CMPLTI32 CARRY:$ca, mGPR:$rs, oimm5:$imm),
673                  (CMPLTI16 CARRY:$ca, mGPR:$rs, oimm5:$imm)>;
674def : CompressPat<(CMPNEI32 CARRY:$ca, mGPR:$rs, uimm5:$imm),
675                  (CMPNEI16 CARRY:$ca, mGPR:$rs, uimm5:$imm)>;
676
677def : CompressPat<(JSR32 sGPR:$rd),
678                  (JSR16 sGPR:$rd)>;
679
680
681def : CompressPat<(MVCV32 sGPR:$rd, CARRY:$ca),
682                  (MVCV16 sGPR:$rd, CARRY:$ca)>;
683def : CompressPat<(MOV32 sGPR:$rd, sGPR:$ca),
684                  (MOV16 sGPR:$rd, sGPR:$ca)>;
685def : CompressPat<(MOVI32 mGPR:$rd, uimm8:$imm),
686                  (MOVI16 mGPR:$rd, uimm8:$imm)>;
687
688def : CompressPat<(LD32B mGPR:$rd, mGPR:$rs, uimm5:$imm),
689                  (LD16B mGPR:$rd, mGPR:$rs, uimm5:$imm)>;
690def : CompressPat<(LD32H mGPR:$rd, mGPR:$rs, uimm5_1:$imm),
691                  (LD16H mGPR:$rd, mGPR:$rs, uimm5_1:$imm)>;
692def : CompressPat<(LD32W mGPR:$rd, mGPR:$rs, uimm5_2:$imm),
693                  (LD16W mGPR:$rd, mGPR:$rs, uimm5_2:$imm)>;
694def : CompressPat<(LD32W mGPR:$rd, GPRSP:$sp, uimm8_2:$imm),
695                  (LD16WSP mGPR:$rd, GPRSP:$sp, uimm8_2:$imm)>;
696
697def : CompressPat<(ST32B mGPR:$rd, mGPR:$rs, uimm5:$imm),
698                  (ST16B mGPR:$rd, mGPR:$rs, uimm5:$imm)>;
699def : CompressPat<(ST32H mGPR:$rd, mGPR:$rs, uimm5_1:$imm),
700                  (ST16H mGPR:$rd, mGPR:$rs, uimm5_1:$imm)>;
701def : CompressPat<(ST32W mGPR:$rd, mGPR:$rs, uimm5_2:$imm),
702                  (ST16W mGPR:$rd, mGPR:$rs, uimm5_2:$imm)>;
703def : CompressPat<(ST32W mGPR:$rd, GPRSP:$sp, uimm8_2:$imm),
704                  (ST16WSP mGPR:$rd, GPRSP:$sp, uimm8_2:$imm)>;
705
706let Predicates = [HasBTST16] in
707def : CompressPat<(BTSTI32 CARRY:$ca, mGPR:$rs, uimm5:$imm),
708                  (BTSTI16 CARRY:$ca, mGPR:$rs, uimm5:$imm)>;
709def : CompressPat<(BCLRI32 mGPR:$rd, mGPR:$rd, uimm5:$imm),
710                  (BCLRI16 mGPR:$rd, uimm5:$imm)>;
711def : CompressPat<(BSETI32 mGPR:$rd, mGPR:$rd, uimm5:$imm),
712                  (BSETI16 mGPR:$rd, uimm5:$imm)>;
713
714def : CompressPat<(ZEXTB32 sGPR:$rd, sGPR:$rs),
715                  (ZEXTB16 sGPR:$rd, sGPR:$rs)>;
716def : CompressPat<(ZEXTH32 sGPR:$rd, sGPR:$rs),
717                  (ZEXTH16 sGPR:$rd, sGPR:$rs)>;
718def : CompressPat<(SEXTB32 sGPR:$rd, sGPR:$rs),
719                  (SEXTB16 sGPR:$rd, sGPR:$rs)>;
720def : CompressPat<(SEXTH32 sGPR:$rd, sGPR:$rs),
721                  (SEXTH16 sGPR:$rd, sGPR:$rs)>;
722