xref: /freebsd/contrib/llvm-project/llvm/lib/Target/CSKY/CSKYInstrInfo16Instr.td (revision 725a9f47324d42037db93c27ceb40d4956872f3e) 
1//===-- CSKYInstrInfo16Instr.td - CSKY 16-bit Instruction --*- tablegen -*-===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This file describes the CSKY 16-bit instructions in TableGen format.
10//
11//===----------------------------------------------------------------------===//
12
13//===----------------------------------------------------------------------===//
14// CSKY specific DAG Nodes.
15//===----------------------------------------------------------------------===//
16
17// Target-dependent nodes.
18def CSKY_NIE : SDNode<"CSKYISD::NIE", SDTNone,
19    [SDNPHasChain, SDNPOptInGlue]>;
20def CSKY_NIR : SDNode<"CSKYISD::NIR", SDTNone,
21    [SDNPHasChain, SDNPOptInGlue]>;
22
23//===----------------------------------------------------------------------===//
24// Operand and SDNode transformation definitions.
25//===----------------------------------------------------------------------===//
26
27def br_symbol_16bit : Operand<OtherVT> {
28  let EncoderMethod =
29    "getBranchSymbolOpValue<CSKY::fixup_csky_pcrel_imm10_scale2>";
30  let ParserMatchClass = CSKYSymbol;
31  let DecoderMethod = "decodeSImmOperand<10, 1>";
32  let PrintMethod = "printCSKYSymbolOperand";
33  let OperandType = "OPERAND_PCREL";
34}
35
36def constpool_symbol_16bit : Operand<iPTR> {
37  let ParserMatchClass = Constpool;
38  let EncoderMethod =
39    "getConstpoolSymbolOpValue<CSKY::fixup_csky_pcrel_uimm7_scale4>";
40  let DecoderMethod = "decodeLRW16Imm8";
41  let PrintMethod = "printConstpool";
42  let OperandType = "OPERAND_PCREL";
43}
44
45//===----------------------------------------------------------------------===//
46// Instruction Formats
47//===----------------------------------------------------------------------===//
48
49include "CSKYInstrFormats16Instr.td"
50
51//===----------------------------------------------------------------------===//
52// Instruction definitions.
53//===----------------------------------------------------------------------===//
54
55//===----------------------------------------------------------------------===//
56// Basic ALU instructions.
57//===----------------------------------------------------------------------===//
58
59let isCommutable = 1, isAdd = 1 in
60  def ADDU16 : R16_XYZ<0, "addu16", add>;
61let Pattern = [(set mGPR:$rz, (sub mGPR:$rx, mGPR:$ry))] in
62  def SUBU16 : R16_XYZ<1, "subu16", sub>;
63
64let isCommutable = 1, isAdd = 1 in
65  def ADDC16 : R16_XZ_BINOP_C<0b1000, 0b01, "addc16">;
66def SUBC16 : R16_XZ_BINOP_C<0b1000, 0b11, "subc16">;
67
68let isCommutable = 1 in {
69  let isAdd = 1 in
70  def ADDU16XZ : R16_XZ_BINOP<0b1000, 0b00, "addu16", BinOpFrag<(add node:$LHS, node:$RHS)>>;
71  def AND16 : R16_XZ_BINOP<0b1010, 0b00, "and16", BinOpFrag<(and node:$LHS, node:$RHS)>>;
72  def OR16 : R16_XZ_BINOP<0b1011, 0b00, "or16", BinOpFrag<(or node:$LHS, node:$RHS)>>;
73  def XOR16 : R16_XZ_BINOP<0b1011, 0b01, "xor16", BinOpFrag<(xor node:$LHS, node:$RHS)>>;
74  def NOR16 : R16_XZ_BINOP<0b1011, 0b10, "nor16", BinOpFrag<(not (or node:$LHS, node:$RHS))>>;
75  let isCodeGenOnly = 1 in
76  def NOT16 : R16_Z_UNOP<0b1011, 0b10, "not16">;
77  def MULT16 :  R16_XZ_BINOP<0b1111, 0b00, "mult16", BinOpFrag<(mul node:$LHS, node:$RHS)>>;
78}
79def SUBU16XZ : R16_XZ_BINOP<0b1000, 0b10, "subu16", BinOpFrag<(sub node:$LHS, node:$RHS)>>;
80def ANDN16 : R16_XZ_BINOP<0b1010, 0b01, "andn16", BinOpFrag<(and node:$LHS, (not node:$RHS))>>;
81def LSL16 : R16_XZ_BINOP<0b1100, 0b00, "lsl16", BinOpFrag<(shl node:$LHS, node:$RHS)>>;
82def LSR16 : R16_XZ_BINOP<0b1100, 0b01, "lsr16", BinOpFrag<(srl node:$LHS, node:$RHS)>>;
83def ASR16 : R16_XZ_BINOP<0b1100, 0b10, "asr16", BinOpFrag<(sra node:$LHS, node:$RHS)>>;
84def ROTL16 : R16_XZ_BINOP<0b1100, 0b11, "rotl16", BinOpFrag<(rotl node:$LHS, (and node:$RHS, 0x1f))>>;
85
86def MULSH16 : R16_XZ_BINOP_NOPat<0b1111, 0b01, "mulsh16">;
87
88def ZEXTB16 : R16_XZ_UNOP<0b1101, 0b00, "zextb16">;
89def ZEXTH16 : R16_XZ_UNOP<0b1101, 0b01, "zexth16">;
90def SEXTB16 : R16_XZ_UNOP<0b1101, 0b10, "sextb16">;
91def SEXTH16 : R16_XZ_UNOP<0b1101, 0b11, "sexth16">;
92
93let Constraints = "$rZ = $rz", isReMaterializable = 1, isAsCheapAsAMove = 1 in {
94  let isAdd = 1, Pattern = [(set mGPR:$rz, (add mGPR:$rZ, oimm8:$imm8))] in
95  def ADDI16 : I16_Z_8<0b100, (ins mGPR:$rZ, oimm8:$imm8), "addi16\t$rz, $imm8">;
96  let Pattern = [(set mGPR:$rz, (sub mGPR:$rZ, oimm8:$imm8))] in
97  def SUBI16 : I16_Z_8<0b101, (ins mGPR:$rZ, oimm8:$imm8), "subi16\t$rz, $imm8">;
98}
99
100def : Pat<(add GPR:$rs1, (oimm8_neg:$im)),
101          (SUBI16 GPR:$rs1, (imm_neg_XFORM oimm8_neg:$im))>;
102
103let isAdd = 1 in
104def ADDI16ZSP : I16_Z_8<0b011, (ins GPRSP:$sp, uimm8_2:$imm8),
105                        "addi16\t$rz, $sp, $imm8">;
106
107let isAdd = 1 in
108def ADDI16SPSP : I16_SP_IMM7<0b000,"addi16">;
109def SUBI16SPSP : I16_SP_IMM7<0b001,"subi16">;
110
111let isReMaterializable = 1, isAsCheapAsAMove = 1 in {
112  def LSLI16 : I16_XZ_IMM5<0, "lsli16", shl>;
113  def LSRI16 : I16_XZ_IMM5<1, "lsri16", srl>;
114  def ASRI16 : I16_XZ_IMM5<2, "asri16", sra>;
115}
116
117let isAdd = 1 in
118def ADDI16XZ : I16_XZ_IMM3<0b10, "addi16", add>;
119def SUBI16XZ : I16_XZ_IMM3<0b11, "subi16", sub>;
120
121let Size = 4 in
122def NEG16 : CSKYPseudo<(outs mGPR:$rd), (ins mGPR:$rx), "neg16 $rd, $rx", []>;
123
124let Size = 4 in
125def RSUBI16 : CSKYPseudo<(outs mGPR:$rd),
126  (ins mGPR:$rx, uimm8:$imm8), "rsubi16 $rd, $rx, $imm8", []>;
127
128//===----------------------------------------------------------------------===//
129// Load & Store instructions.
130//===----------------------------------------------------------------------===//
131
132def LD16B : I16_XZ_LDST<AddrMode16B, 0b000, "ld16.b",
133  (outs mGPR:$rz), (ins mGPR:$rx, uimm5:$imm)>;
134def LD16H : I16_XZ_LDST<AddrMode16H, 0b001, "ld16.h",
135  (outs mGPR:$rz), (ins mGPR:$rx, uimm5_1:$imm)>;
136def LD16W : I16_XZ_LDST<AddrMode16W, 0b010, "ld16.w",
137  (outs mGPR:$rz), (ins mGPR:$rx, uimm5_2:$imm)>;
138def ST16B : I16_XZ_LDST<AddrMode16B, 0b100, "st16.b",
139  (outs), (ins mGPR:$rz, mGPR:$rx, uimm5:$imm)>;
140def ST16H : I16_XZ_LDST<AddrMode16H, 0b101, "st16.h",
141  (outs), (ins mGPR:$rz, mGPR:$rx, uimm5_1:$imm)>;
142def ST16W : I16_XZ_LDST<AddrMode16W, 0b110, "st16.w",
143  (outs), (ins mGPR:$rz, mGPR:$rx, uimm5_2:$imm)>;
144
145def LD16WSP : I16_ZSP_LDST<AddrMode16W, 0b011, "ld16.w",
146  (outs mGPR:$rz), (ins GPRSP:$sp, uimm8_2:$addr)>;
147def ST16WSP : I16_ZSP_LDST<AddrMode16W, 0b111, "st16.w",
148  (outs), (ins mGPR:$rz, GPRSP:$sp, uimm8_2:$addr)>;
149
150//===----------------------------------------------------------------------===//
151// Compare instructions.
152//===----------------------------------------------------------------------===//
153
154def CMPHS16 : R16_XY_CMP<0, "cmphs16">;
155def CMPLT16 : R16_XY_CMP<1, "cmplt16">;
156let isCommutable = 1 in
157def CMPNE16 : R16_XY_CMP<2, "cmpne16">;
158
159
160def CMPHSI16 : I16_X_CMP<0, "cmphsi16", oimm5>;
161def CMPLTI16 : I16_X_CMP<1, "cmplti16", oimm5>;
162def CMPLEI16 : CSKYPseudo<(outs CARRY:$ca), (ins mGPR:$rx, uimm5:$imm5),
163    "cmplei16\t$rx, $imm5", []>;
164def CMPNEI16 : I16_X_CMP<2, "cmpnei16", uimm5>;
165
166//===----------------------------------------------------------------------===//
167// Data move instructions.
168//===----------------------------------------------------------------------===//
169
170
171def MOVI16 : I16_Z_8<0b110, (ins uimm8:$imm8), "movi16\t$rz, $imm8"> {
172  let isReMaterializable = 1;
173  let isAsCheapAsAMove = 1;
174  let isMoveImm = 1;
175  let Pattern = [(set mGPR:$rz, uimm8:$imm8)];
176}
177
178def MOV16 : CSKY16Inst<AddrModeNone, (outs sGPR:$rz), (ins sGPR:$rx),
179                       "mov16\t$rz, $rx", []> {
180  bits<4> rz;
181  bits<4> rx;
182  let Inst{15,14} = 0b01;
183  let Inst{13 - 10} = 0b1011;
184  let Inst{9 - 6} = rz;
185  let Inst{5 - 2} = rx;
186  let Inst{1,0} = 0b11;
187}
188
189// MVC16 is not in "cskyv2 instructions reference manul"
190def MVCV16 : CSKY16Inst<AddrModeNone,
191  (outs sGPR:$rz), (ins CARRY:$ca), "mvcv16\t$rz", []> {
192  bits<4> rz;
193  let Inst{15,14} = 0b01;
194  let Inst{13 - 10} = 0b1001;
195  let Inst{9 - 6} = rz;
196  let Inst{5 - 2} = 0;
197  let Inst{1,0} = 0b11;
198}
199
200
201//===----------------------------------------------------------------------===//
202// Branch and call instructions.
203//===----------------------------------------------------------------------===//
204
205let isBranch = 1, isTerminator = 1 in {
206  let isBarrier = 1, isPredicable = 1 in
207    def BR16 : J16<1, "br16", (ins br_symbol_16bit:$offset)>;
208
209  def BT16 : J16_B<2, "bt16">;
210  def BF16 : J16_B<3, "bf16">;
211}
212
213def JMP16 : R16_X_J<0b11100000, 0b00, "jmp16"> {
214  let isBranch = 1;
215  let isTerminator = 1;
216  let isBarrier = 1;
217  let isIndirectBranch = 1;
218  let Pattern = [(brind sGPR:$rx)];
219}
220
221def JSR16 : R16_X_J<0b11101111, 0b01, "jsr16"> {
222  let isCall = 1;
223  let Defs = [ R15 ];
224}
225
226def RTS16 : CSKY16Inst<AddrModeNone, (outs), (ins), "rts16", [(CSKY_RET)]> {
227  let isTerminator = 1;
228  let isReturn = 1;
229  let isBarrier = 1;
230  let Inst = 0b0111100000111100;
231  let Uses = [R15];
232  let isCodeGenOnly = 1;
233}
234
235def JMPIX16 :  CSKY16Inst<AddrModeNone, (outs),
236  (ins mGPR:$rx, uimm2_jmpix:$indeximm2), "jmpix16\t$rx, $indeximm2", []> {
237  bits<3> rx;
238  bits<2> indeximm2;
239  let Inst{15,14} = 0b00;
240  let Inst{13 - 11} = 0b111;
241  let Inst{10 - 8} = rx;
242  let Inst{7 - 2} = 0b111000;
243  let Inst{1,0} = indeximm2;
244  let Predicates = [HasJAVA];
245  let Uses = [R30];
246}
247
248//===----------------------------------------------------------------------===//
249// Symbol address instructions.
250//===----------------------------------------------------------------------===//
251
252def LRW16 : CSKY16Inst<AddrModeNone, (outs mGPR:$rz),
253  (ins constpool_symbol_16bit:$label), "lrw16\t$rz, $label", []> {
254  bits<3> rz;
255  bits<8> label;
256  let Inst{15 - 13} = 0b000;
257  let Inst{12} = label{7};
258  let Inst{11,10} = 0b00;
259  let Inst{9,8} = label{6,5};
260  let Inst{7 - 5} = rz;
261  let Inst{4 - 0} = label{4-0};
262  let mayLoad = 1;
263  let mayStore = 0;
264}
265
266def LRW16_Gen : CSKY16Inst<AddrModeNone, (outs mGPR:$rz),
267  (ins bare_symbol:$src, constpool_symbol_16bit:$label),
268  "lrw16\t$rz, $label", []> {
269  bits<3> rz;
270  bits<8> label;
271  let Inst{15 - 13} = 0b000;
272  let Inst{12} = label{7};
273  let Inst{11,10} = 0b00;
274  let Inst{9,8} = label{6,5};
275  let Inst{7 - 5} = rz;
276  let Inst{4 - 0} = label{4-0};
277  let mayLoad = 1;
278  let mayStore = 0;
279  let isCodeGenOnly = 1;
280}
281
282
283//===----------------------------------------------------------------------===//
284// Other operation instructions.
285//===----------------------------------------------------------------------===//
286
287def REVB16 :  R16_XZ_UNOP<0b1110, 0b10, "revb16">;
288def REVH16 :  R16_XZ_UNOP<0b1110, 0b11, "revh16">;
289
290let isCodeGenOnly = 1 in
291def SETC16 : CSKY16Inst<AddrModeNone,
292  (outs CARRY:$ca), (ins), "setc16", []> {
293  let Inst{15, 14} = 0b01;
294  let Inst{13 - 10} = 0b1001;
295  let Inst{9 - 6} = 0;
296  let Inst{5 - 2} = 0;
297  let Inst{1, 0} = 0;
298  let isCompare = 1;
299}
300
301let isCodeGenOnly = 1 in
302def CLRC16 : CSKY16Inst<AddrModeNone,
303  (outs CARRY:$ca), (ins), "clrc16", []> {
304  let Inst{15, 14} = 0b01;
305  let Inst{13 - 10} = 0b1001;
306  let Inst{9 - 6} = 0;
307  let Inst{5 - 2} = 0;
308  let Inst{1, 0} = 2;
309  let isCompare = 1;
310}
311
312let Constraints = "$rZ = $rz" in {
313  def BCLRI16 : I16_Z_5<0b100, (outs mGPR:$rz), (ins mGPR:$rZ, uimm5:$imm5),
314                        "bclri16">;
315  def BSETI16 : I16_Z_5<0b101, (outs mGPR:$rz), (ins mGPR:$rZ, uimm5:$imm5),
316                        "bseti16">;
317}
318
319let Predicates = [HasBTST16] in
320  def BTSTI16 : I16_Z_5<0b110, (outs CARRY:$ca), (ins mGPR:$rz, uimm5:$imm5),
321                        "btsti16">;
322
323def TST16 : CSKY16Inst<AddrModeNone, (outs CARRY:$ca), (ins sGPR:$rx, sGPR:$ry),
324                        "tst16\t$rx, $ry", []> {
325  bits<4> ry;
326  bits<4> rx;
327  let Inst{15,14} = 0b01;
328  let Inst{13 - 10} = 0b1010;
329  let Inst{9 - 6} = ry;
330  let Inst{5 - 2} = rx;
331  let Inst{1,0} = 0b10;
332  let isCompare = 1;
333}
334
335def TSTNBZ16 : CSKY16Inst<AddrModeNone, (outs CARRY:$ca), (ins sGPR:$rx),
336                          "tstnbz16\t$rx", []> {
337  bits<4> rx;
338  let Inst{15,14} = 0b01;
339  let Inst{13 - 10} = 0b1010;
340  let Inst{9 - 6} = 0b0000;
341  let Inst{5 - 2} = rx;
342  let Inst{1,0} = 0b11;
343  let isCompare = 1;
344}
345
346//===----------------------------------------------------------------------===//
347// Special instructions.
348//===----------------------------------------------------------------------===//
349
350def BKPT : CSKY16Inst<AddrModeNone, (outs), (ins), "bkpt", []> {
351  let Inst = 0;
352}
353
354let mayStore = 1 in {
355def BPUSHH : I16_BPushPop<0b00010100111, 0, (outs), (ins mGPR:$rz), "bpush.h $rz">;
356def BPUSHW : I16_BPushPop<0b00010100111, 0b10, (outs), (ins mGPR:$rz), "bpush.w $rz">;
357}
358
359let mayLoad = 1 in {
360def BPOPH : I16_BPushPop<0b00010100101, 0, (outs mGPR:$rz), (ins),  "bpop.h $rz">;
361def BPOPW : I16_BPushPop<0b00010100101, 0b10, (outs mGPR:$rz), (ins), "bpop.w $rz">;
362}
363
364def NIE : CSKY16Inst<AddrModeNone, (outs), (ins), "nie", [(CSKY_NIE)]> {
365  let Inst = 0b0001010001100000;
366}
367
368let isBarrier = 1, isReturn = 1, isTerminator = 1 in
369def NIR : CSKY16Inst<AddrModeNone, (outs), (ins), "nir", [(CSKY_NIR)]> {
370  let Inst = 0b0001010001100001;
371}
372
373def IPUSH16 : CSKY16Inst<AddrModeNone, (outs), (ins), "ipush16", []> {
374  let Inst{15- 5} = 0b00010100011;
375  let Inst{4-0} = 0b00010;
376  let Predicates = [iHasE1];
377  let Defs  = [R14];
378  let Uses  = [R14, R0, R1, R2, R3, R12, R13];
379  let mayStore = 1;
380}
381
382def IPOP16 : CSKY16Inst<AddrModeNone, (outs), (ins), "ipop16", []> {
383  let Inst{15- 5} = 0b00010100011;
384  let Inst{4-0} = 0b00011;
385  let Predicates = [iHasE1];
386  let Defs  = [R14, R0, R1, R2, R3, R12, R13];
387  let Uses  = [R14];
388  let mayLoad = 1;
389}
390
391def PUSH16 : CSKY16Inst<AddrModeNone, (outs),
392  (ins reglist:$regs, variable_ops), "push16 $regs", []> {
393  bits<5> regs;
394
395  let Inst{15- 5} = 0b00010100110;
396  let Inst{4-0} = regs;
397  let Predicates = [iHasE1];
398  let Defs  = [R14];
399  let Uses  = [R14];
400  let mayStore = 1;
401}
402
403def POP16 : CSKY16Inst<AddrModeNone, (outs),
404  (ins reglist:$regs, variable_ops), "pop16 $regs", []> {
405  bits<5> regs;
406
407  let Inst{15- 5} = 0b00010100100;
408  let Inst{4-0} = regs;
409  let Predicates = [iHasE1];
410  let Defs  = [R14];
411  let Uses  = [R14];
412  let mayLoad = 1;
413}
414
415//===----------------------------------------------------------------------===//
416// CSKYPseudo
417//===----------------------------------------------------------------------===//
418
419let usesCustomInserter = 1 in  {
420  def ISEL16 : CSKYPseudo<(outs sGPR:$dst),
421    (ins CARRY:$cond, sGPR:$src1, sGPR:$src2),
422    "!isel16\t$dst, $src1, src2",
423    [(set sGPR:$dst, (select CARRY:$cond, sGPR:$src1, sGPR:$src2))]>;
424}
425
426class JBranchPseudo<dag out, dag ins, string opstr> :
427  CSKYPseudo<out, ins, opstr, []> {
428  let isBranch = 1;
429  let isTerminator = 1;
430  let isIndirectBranch = 1;
431  let mayLoad = 1;
432  let Size = 2;
433}
434
435let isBarrier = 1 in
436def JBR16 : JBranchPseudo<(outs),
437  (ins br_symbol_16bit:$src1), "jbr16\t$src1">;
438def JBT16 : JBranchPseudo<(outs),
439  (ins CARRY:$ca, br_symbol_16bit:$src1), "jbt16\t$src1">;
440def JBF16 : JBranchPseudo<(outs),
441  (ins CARRY:$ca, br_symbol_16bit:$src1), "jbf16\t$src1">;
442
443let mayLoad = 1, Size = 2, isCodeGenOnly = 0 in
444def PseudoLRW16 : CSKYPseudo<(outs mGPR:$rz),
445  (ins bare_symbol:$src), "lrw16 $rz, $src", []>;
446
447//===----------------------------------------------------------------------===//
448// Instruction Patterns.
449//===----------------------------------------------------------------------===//
450
451def : Pat<(sext_inreg mGPR:$src, i1), (ASRI16 (LSLI16 mGPR:$src, 7), 7)>;
452def : Pat<(sext_inreg sGPR:$src, i8), (SEXTB16 sGPR:$src)>;
453def : Pat<(sext_inreg sGPR:$src, i16), (SEXTH16 sGPR:$src)>;
454
455// Load & Store Patterns
456
457defm : LdPat<extloadi8, uimm5, LD16B, i32>;
458defm : LdPat<zextloadi8, uimm5, LD16B, i32>;
459
460defm : LdPat<extloadi16, uimm5_1, LD16H, i32>;
461defm : LdPat<zextloadi16, uimm5_1, LD16H, i32>;
462
463defm : LdPat<load, uimm5_2, LD16W, i32>;
464
465
466defm : StPat<truncstorei8, i32, uimm5, ST16B>;
467defm : StPat<truncstorei16, i32, uimm5_1, ST16H>;
468defm : StPat<store, i32, uimm5_2, ST16W>;
469
470def : Pat<(CSKY_CALLReg sGPR:$src), (JSR16 sGPR:$src)>;
471def : Pat<(CSKY_TAILReg sGPR:$src), (JMP16 sGPR:$src)>;
472
473// Symbol address Patterns
474def : Pat<(CSKY_LOAD_ADDR tglobaladdr, tconstpool:$src2), (LRW16 tconstpool:$src2)>;
475def : Pat<(CSKY_LOAD_ADDR tblockaddress, tconstpool:$src2), (LRW16 tconstpool:$src2)>;
476def : Pat<(CSKY_LOAD_ADDR tjumptable:$src1, tconstpool:$src2), (LRW16_Gen tjumptable:$src1, tconstpool:$src2)>;
477def : Pat<(CSKY_LOAD_ADDR texternalsym, tconstpool:$src2), (LRW16 tconstpool:$src2)>;
478def : Pat<(CSKY_LOAD_ADDR tconstpool:$src1, tconstpool:$src2), (LRW16_Gen tconstpool:$src1, tconstpool:$src2)>;
479
480def : Pat<(i32 (load constpool:$src)), (LRW16 (to_tconstpool tconstpool:$src))>;
481
482// Branch Patterns.
483
484def : Pat<(brcond CARRY:$ca, bb:$offset),
485          (BT16 CARRY:$ca, bb:$offset)>;
486
487def : Pat<(br bb:$offset), (BR16 bb:$offset)>;
488
489multiclass BTF16Pat0<PatFrag cond0, PatFrag cond1, ImmLeaf imm_ty, Instruction inst> {
490  def : Pat<(brcond (i32 (cond0 mGPR:$rs1, imm_ty:$rs2)), bb:$offset),
491            (BT16 (inst mGPR:$rs1, imm_ty:$rs2), bb:$offset)>;
492  def : Pat<(brcond (i32 (cond1 mGPR:$rs1, imm_ty:$rs2)), bb:$offset),
493            (BF16 (inst mGPR:$rs1, imm_ty:$rs2), bb:$offset)>;
494}
495
496defm : BTF16Pat0<setne, seteq, uimm5, CMPNEI16>;
497defm : BTF16Pat0<setuge, setult, oimm5, CMPHSI16>;
498defm : BTF16Pat0<setlt, setge, oimm5, CMPLTI16>;
499
500def : Pat<(brcond (i32 (setne sGPR:$rs1, sGPR:$rs2)), bb:$offset),
501          (BT16 (CMPNE16 sGPR:$rs1, sGPR:$rs2), bb:$offset)>;
502def : Pat<(brcond (i32 (seteq sGPR:$rs1, sGPR:$rs2)), bb:$offset),
503          (BF16 (CMPNE16 sGPR:$rs1, sGPR:$rs2), bb:$offset)>;
504
505multiclass BTF16Pat1<PatFrag cond0, PatFrag cond1, Instruction cmp,
506                     Instruction br>  {
507  def : Pat<(brcond (i32 (cond0 sGPR:$rs1, sGPR:$rs2)), bb:$offset),
508            (br (cmp sGPR:$rs1, sGPR:$rs2), bb:$offset)>;
509  def : Pat<(brcond (i32 (cond1 sGPR:$rs1, sGPR:$rs2)), bb:$offset),
510            (br (cmp sGPR:$rs2, sGPR:$rs1), bb:$offset)>;
511}
512
513defm : BTF16Pat1<setuge, setule, CMPHS16, BT16>;
514defm : BTF16Pat1<setult, setugt, CMPHS16, BF16>;
515defm : BTF16Pat1<setlt, setgt, CMPLT16, BT16>;
516defm : BTF16Pat1<setge, setle, CMPLT16, BF16>;
517
518// Compare Patterns.
519def : Pat<(setne sGPR:$rs1, sGPR:$rs2),
520          (SUBU16XZ (MOVI16 1), (MVCV16 (CMPNE16 sGPR:$rs1, sGPR:$rs2)))>;
521def : Pat<(seteq sGPR:$rs1, sGPR:$rs2),
522          (MVCV16 (CMPNE16 sGPR:$rs1, sGPR:$rs2))>;
523def : Pat<(setuge sGPR:$rs1, sGPR:$rs2),
524          (SUBU16XZ (MOVI16 1), (MVCV16 (CMPHS16 sGPR:$rs1, sGPR:$rs2)))>;
525def : Pat<(setule sGPR:$rs1, sGPR:$rs2),
526          (SUBU16XZ (MOVI16 1), (MVCV16 (CMPHS16 sGPR:$rs2, sGPR:$rs1)))>;
527def : Pat<(setult sGPR:$rs1, sGPR:$rs2),
528          (MVCV16 (CMPHS16 sGPR:$rs1, sGPR:$rs2))>;
529def : Pat<(setugt sGPR:$rs1, sGPR:$rs2),
530          (MVCV16 (CMPHS16 sGPR:$rs2, sGPR:$rs1))>;
531def : Pat<(setlt sGPR:$rs1, sGPR:$rs2),
532          (SUBU16XZ (MOVI16 1), (MVCV16 (CMPLT16 sGPR:$rs1, sGPR:$rs2)))>;
533def : Pat<(setgt sGPR:$rs1, sGPR:$rs2),
534          (SUBU16XZ (MOVI16 1), (MVCV16 (CMPLT16 sGPR:$rs2, sGPR:$rs1)))>;
535def : Pat<(setge sGPR:$rs1, sGPR:$rs2),
536          (MVCV16 (CMPLT16 sGPR:$rs1, sGPR:$rs2))>;
537def : Pat<(setle sGPR:$rs1, sGPR:$rs2),
538          (MVCV16 (CMPLT16 sGPR:$rs2, sGPR:$rs1))>;
539
540
541def : Pat<(setne mGPR:$rs1, uimm5:$rs2),
542          (SUBU16XZ (MOVI16 1), (MVCV16 (CMPNEI16 mGPR:$rs1, uimm5:$rs2)))>;
543def : Pat<(seteq mGPR:$rs1, uimm5:$rs2),
544          (MVCV16 (CMPNEI16 mGPR:$rs1, uimm5:$rs2))>;
545def : Pat<(setuge mGPR:$rs1, oimm5:$rs2),
546          (SUBU16XZ (MOVI16 1), (MVCV16 (CMPHSI16 mGPR:$rs1, oimm5:$rs2)))>;
547def : Pat<(setult mGPR:$rs1, oimm5:$rs2),
548          (MVCV16 (CMPHSI16 mGPR:$rs1, oimm5:$rs2))>;
549def : Pat<(setlt mGPR:$rs1, oimm5:$rs2),
550          (SUBU16XZ (MOVI16 1), (MVCV16 (CMPLTI16 mGPR:$rs1, oimm5:$rs2)))>;
551def : Pat<(setge mGPR:$rs1, oimm5:$rs2),
552          (MVCV16 (CMPLTI16 mGPR:$rs1, oimm5:$rs2))>;
553
554def : Pat<(select CARRY:$ca, sGPR:$rx, sGPR:$false),
555          (ISEL16 CARRY:$ca, sGPR:$rx, sGPR:$false)>;
556def : Pat<(select (and CARRY:$ca, 1), sGPR:$rx, sGPR:$false),
557          (ISEL16 CARRY:$ca, sGPR:$rx, sGPR:$false)>;
558
559def : Pat<(rotl sGPR:$rs1, sGPR:$rs2),
560          (ROTL16 sGPR:$rs1, (AND16 sGPR:$rs2, (MOVI16 0x1f)))>;
561
562
563// FIXME: This is a temporary treatment for the e801.
564def : Pat<(i32 imm:$imm),
565          (OR16 (MOVI16 (uimm8SRL_0 imm:$imm)),
566	              (OR16 (LSLI16 (MOVI16 (uimm8SRL_8 imm:$imm)), 8),
567	                    (OR16 (LSLI16 (MOVI16 (uimm8SRL_16 imm:$imm)), 16),
568                            (LSLI16 (MOVI16 (uimm8SRL_24 imm:$imm)), 24))))>;
569
570// Other operations.
571let Predicates = [iHasE2] in {
572  def : Pat<(bswap sGPR:$rx), (REVB16 sGPR:$rx)>;
573}
574
575//===----------------------------------------------------------------------===//
576// Compress Instruction tablegen backend.
577//===----------------------------------------------------------------------===//
578
579def : CompressPat<(ADDU32 sGPR:$rd, sGPR:$rd, sGPR:$rs2),
580                  (ADDU16XZ sGPR:$rd, sGPR:$rs2)>;
581def : CompressPat<(ADDU32 sGPR:$rd, sGPR:$rs1, sGPR:$rd),
582                  (ADDU16XZ sGPR:$rd, sGPR:$rs1)>;
583def : CompressPat<(ADDU32 mGPR:$rd, mGPR:$rs1, mGPR:$rs2),
584                  (ADDU16 mGPR:$rd, mGPR:$rs1, mGPR:$rs2)>;
585def : CompressPat<(SUBU32 sGPR:$rd, sGPR:$rd, sGPR:$rs2),
586                  (SUBU16XZ sGPR:$rd, sGPR:$rs2)>;
587def : CompressPat<(SUBU32 mGPR:$rd, mGPR:$rs1, mGPR:$rs2),
588                  (SUBU16 mGPR:$rd, mGPR:$rs1, mGPR:$rs2)>;
589
590def : CompressPat<
591  (ADDC32 sGPR:$rd, CARRY:$cout, sGPR:$rd, sGPR:$rs2, CARRY:$cout),
592  (ADDC16 sGPR:$rd, CARRY:$cout, sGPR:$rs2, CARRY:$cout)
593  >;
594def : CompressPat<
595  (SUBC32 sGPR:$rd, CARRY:$cout, sGPR:$rd, sGPR:$rs2, CARRY:$cout),
596  (SUBC16 sGPR:$rd, CARRY:$cout, sGPR:$rs2, CARRY:$cout)
597  >;
598
599def : CompressPat<(ADDI32 mGPR:$rd, mGPR:$rs, oimm3:$imm),
600                  (ADDI16XZ mGPR:$rd, mGPR:$rs, oimm3:$imm)>;
601def : CompressPat<(SUBI32 mGPR:$rd, mGPR:$rs, oimm3:$imm),
602                  (SUBI16XZ mGPR:$rd, mGPR:$rs, oimm3:$imm)>;
603
604def : CompressPat<(ADDI32 mGPR:$rd, mGPR:$rd, oimm8:$imm),
605                  (ADDI16 mGPR:$rd, oimm8:$imm)>;
606def : CompressPat<(SUBI32 mGPR:$rd, mGPR:$rd, oimm8:$imm),
607                  (SUBI16 mGPR:$rd, oimm8:$imm)>;
608
609def : CompressPat<(ADDI32 GPRSP:$sp, GPRSP:$sp, uimm7_2:$imm),
610                  (ADDI16SPSP GPRSP:$sp, GPRSP:$sp, uimm7_2:$imm)>;
611def : CompressPat<(SUBI32 GPRSP:$sp, GPRSP:$sp, uimm7_2:$imm),
612                  (SUBI16SPSP GPRSP:$sp, GPRSP:$sp, uimm7_2:$imm)>;
613
614def : CompressPat<(ADDI32 mGPR:$rd, GPRSP:$sp, uimm8_2:$imm),
615                  (ADDI16ZSP mGPR:$rd, GPRSP:$sp, uimm8_2:$imm)>;
616
617def : CompressPat<(MULT32 sGPR:$rd, sGPR:$rd, sGPR:$rs2),
618                  (MULT16 sGPR:$rd, sGPR:$rs2)>;
619def : CompressPat<(MULT32 sGPR:$rd, sGPR:$rs1, sGPR:$rd),
620                  (MULT16 sGPR:$rd, sGPR:$rs1)>;
621def : CompressPat<(AND32 sGPR:$rd, sGPR:$rd, sGPR:$rs2),
622                  (AND16 sGPR:$rd, sGPR:$rs2)>;
623def : CompressPat<(AND32 sGPR:$rd, sGPR:$rs1, sGPR:$rd),
624                  (AND16 sGPR:$rd, sGPR:$rs1)>;
625def : CompressPat<(OR32 sGPR:$rd, sGPR:$rd, sGPR:$rs2),
626                  (OR16 sGPR:$rd, sGPR:$rs2)>;
627def : CompressPat<(OR32 sGPR:$rd, sGPR:$rs1, sGPR:$rd),
628                  (OR16 sGPR:$rd, sGPR:$rs1)>;
629def : CompressPat<(XOR32 sGPR:$rd, sGPR:$rd, sGPR:$rs2),
630                  (XOR16 sGPR:$rd, sGPR:$rs2)>;
631def : CompressPat<(XOR32 sGPR:$rd, sGPR:$rs1, sGPR:$rd),
632                  (XOR16 sGPR:$rd, sGPR:$rs1)>;
633
634def : CompressPat<(ANDN32 sGPR:$rd, sGPR:$rd, sGPR:$rs2),
635                  (ANDN16 sGPR:$rd, sGPR:$rs2)>;
636def : CompressPat<(NOR32 sGPR:$rd, sGPR:$rd, sGPR:$rs2),
637                  (NOR16 sGPR:$rd, sGPR:$rs2)>;
638def : CompressPat<(LSL32 sGPR:$rd, sGPR:$rd, sGPR:$rs2),
639                  (LSL16 sGPR:$rd, sGPR:$rs2)>;
640def : CompressPat<(LSR32 sGPR:$rd, sGPR:$rd, sGPR:$rs2),
641                  (LSR16 sGPR:$rd, sGPR:$rs2)>;
642def : CompressPat<(ASR32 sGPR:$rd, sGPR:$rd, sGPR:$rs2),
643                  (ASR16 sGPR:$rd, sGPR:$rs2)>;
644def : CompressPat<(ROTL32 sGPR:$rd, sGPR:$rd, sGPR:$rs2),
645                  (ROTL16 sGPR:$rd, sGPR:$rs2)>;
646
647def : CompressPat<(NOT32 sGPR:$rd, sGPR:$rd),
648                  (NOT16 sGPR:$rd)>;
649
650let Predicates = [iHas2E3] in
651def : CompressPat<(REVB32 sGPR:$rd, sGPR:$rs),
652                  (REVB16 sGPR:$rd, sGPR:$rs)>;
653
654def : CompressPat<(LSLI32 mGPR:$rd, mGPR:$rs, uimm5:$imm),
655                  (LSLI16 mGPR:$rd, mGPR:$rs, uimm5:$imm)>;
656def : CompressPat<(LSRI32 mGPR:$rd, mGPR:$rs, uimm5:$imm),
657                  (LSRI16 mGPR:$rd, mGPR:$rs, uimm5:$imm)>;
658def : CompressPat<(ASRI32 mGPR:$rd, mGPR:$rs, uimm5:$imm),
659                  (ASRI16 mGPR:$rd, mGPR:$rs, uimm5:$imm)>;
660
661def : CompressPat<(CMPHS32 CARRY:$ca, sGPR:$rs1, sGPR:$rs2),
662                  (CMPHS16 CARRY:$ca, sGPR:$rs1, sGPR:$rs2)>;
663def : CompressPat<(CMPLT32 CARRY:$ca, sGPR:$rs1, sGPR:$rs2),
664                  (CMPLT16 CARRY:$ca, sGPR:$rs1, sGPR:$rs2)>;
665def : CompressPat<(CMPNE32 CARRY:$ca, sGPR:$rs1, sGPR:$rs2),
666                  (CMPNE16 CARRY:$ca, sGPR:$rs1, sGPR:$rs2)>;
667
668def : CompressPat<(CMPHSI32 CARRY:$ca, mGPR:$rs, oimm5:$imm),
669                  (CMPHSI16 CARRY:$ca, mGPR:$rs, oimm5:$imm)>;
670def : CompressPat<(CMPLTI32 CARRY:$ca, mGPR:$rs, oimm5:$imm),
671                  (CMPLTI16 CARRY:$ca, mGPR:$rs, oimm5:$imm)>;
672def : CompressPat<(CMPNEI32 CARRY:$ca, mGPR:$rs, uimm5:$imm),
673                  (CMPNEI16 CARRY:$ca, mGPR:$rs, uimm5:$imm)>;
674
675def : CompressPat<(JSR32 sGPR:$rd),
676                  (JSR16 sGPR:$rd)>;
677
678
679def : CompressPat<(MVCV32 sGPR:$rd, CARRY:$ca),
680                  (MVCV16 sGPR:$rd, CARRY:$ca)>;
681def : CompressPat<(MOV32 sGPR:$rd, sGPR:$ca),
682                  (MOV16 sGPR:$rd, sGPR:$ca)>;
683def : CompressPat<(MOVI32 mGPR:$rd, uimm8:$imm),
684                  (MOVI16 mGPR:$rd, uimm8:$imm)>;
685
686def : CompressPat<(LD32B mGPR:$rd, mGPR:$rs, uimm5:$imm),
687                  (LD16B mGPR:$rd, mGPR:$rs, uimm5:$imm)>;
688def : CompressPat<(LD32H mGPR:$rd, mGPR:$rs, uimm5_1:$imm),
689                  (LD16H mGPR:$rd, mGPR:$rs, uimm5_1:$imm)>;
690def : CompressPat<(LD32W mGPR:$rd, mGPR:$rs, uimm5_2:$imm),
691                  (LD16W mGPR:$rd, mGPR:$rs, uimm5_2:$imm)>;
692def : CompressPat<(LD32W mGPR:$rd, GPRSP:$sp, uimm8_2:$imm),
693                  (LD16WSP mGPR:$rd, GPRSP:$sp, uimm8_2:$imm)>;
694
695def : CompressPat<(ST32B mGPR:$rd, mGPR:$rs, uimm5:$imm),
696                  (ST16B mGPR:$rd, mGPR:$rs, uimm5:$imm)>;
697def : CompressPat<(ST32H mGPR:$rd, mGPR:$rs, uimm5_1:$imm),
698                  (ST16H mGPR:$rd, mGPR:$rs, uimm5_1:$imm)>;
699def : CompressPat<(ST32W mGPR:$rd, mGPR:$rs, uimm5_2:$imm),
700                  (ST16W mGPR:$rd, mGPR:$rs, uimm5_2:$imm)>;
701def : CompressPat<(ST32W mGPR:$rd, GPRSP:$sp, uimm8_2:$imm),
702                  (ST16WSP mGPR:$rd, GPRSP:$sp, uimm8_2:$imm)>;
703
704let Predicates = [HasBTST16] in
705def : CompressPat<(BTSTI32 CARRY:$ca, mGPR:$rs, uimm5:$imm),
706                  (BTSTI16 CARRY:$ca, mGPR:$rs, uimm5:$imm)>;
707def : CompressPat<(BCLRI32 mGPR:$rd, mGPR:$rd, uimm5:$imm),
708                  (BCLRI16 mGPR:$rd, uimm5:$imm)>;
709def : CompressPat<(BSETI32 mGPR:$rd, mGPR:$rd, uimm5:$imm),
710                  (BSETI16 mGPR:$rd, uimm5:$imm)>;
711
712def : CompressPat<(ZEXTB32 sGPR:$rd, sGPR:$rs),
713                  (ZEXTB16 sGPR:$rd, sGPR:$rs)>;
714def : CompressPat<(ZEXTH32 sGPR:$rd, sGPR:$rs),
715                  (ZEXTH16 sGPR:$rd, sGPR:$rs)>;
716def : CompressPat<(SEXTB32 sGPR:$rd, sGPR:$rs),
717                  (SEXTB16 sGPR:$rd, sGPR:$rs)>;
718def : CompressPat<(SEXTH32 sGPR:$rd, sGPR:$rs),
719                  (SEXTH16 sGPR:$rd, sGPR:$rs)>;
720