1 //===-- BPFMCCodeEmitter.cpp - Convert BPF code to machine code -----------===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 // 9 // This file implements the BPFMCCodeEmitter class. 10 // 11 //===----------------------------------------------------------------------===// 12 13 #include "MCTargetDesc/BPFMCTargetDesc.h" 14 #include "llvm/ADT/SmallVector.h" 15 #include "llvm/MC/MCCodeEmitter.h" 16 #include "llvm/MC/MCFixup.h" 17 #include "llvm/MC/MCInst.h" 18 #include "llvm/MC/MCInstrInfo.h" 19 #include "llvm/MC/MCRegisterInfo.h" 20 #include "llvm/MC/MCSubtargetInfo.h" 21 #include "llvm/Support/Endian.h" 22 #include "llvm/Support/EndianStream.h" 23 #include <cassert> 24 #include <cstdint> 25 26 using namespace llvm; 27 28 #define DEBUG_TYPE "mccodeemitter" 29 30 namespace { 31 32 class BPFMCCodeEmitter : public MCCodeEmitter { 33 const MCInstrInfo &MCII; 34 const MCRegisterInfo &MRI; 35 bool IsLittleEndian; 36 37 public: 38 BPFMCCodeEmitter(const MCInstrInfo &mcii, const MCRegisterInfo &mri, 39 bool IsLittleEndian) 40 : MCII(mcii), MRI(mri), IsLittleEndian(IsLittleEndian) {} 41 BPFMCCodeEmitter(const BPFMCCodeEmitter &) = delete; 42 void operator=(const BPFMCCodeEmitter &) = delete; 43 ~BPFMCCodeEmitter() override = default; 44 45 // getBinaryCodeForInstr - TableGen'erated function for getting the 46 // binary encoding for an instruction. 47 uint64_t getBinaryCodeForInstr(const MCInst &MI, 48 SmallVectorImpl<MCFixup> &Fixups, 49 const MCSubtargetInfo &STI) const; 50 51 // getMachineOpValue - Return binary encoding of operand. If the machin 52 // operand requires relocation, record the relocation and return zero. 53 unsigned getMachineOpValue(const MCInst &MI, const MCOperand &MO, 54 SmallVectorImpl<MCFixup> &Fixups, 55 const MCSubtargetInfo &STI) const; 56 57 uint64_t getMemoryOpValue(const MCInst &MI, unsigned Op, 58 SmallVectorImpl<MCFixup> &Fixups, 59 const MCSubtargetInfo &STI) const; 60 61 void encodeInstruction(const MCInst &MI, raw_ostream &OS, 62 SmallVectorImpl<MCFixup> &Fixups, 63 const MCSubtargetInfo &STI) const override; 64 65 private: 66 FeatureBitset computeAvailableFeatures(const FeatureBitset &FB) const; 67 void 68 verifyInstructionPredicates(const MCInst &MI, 69 const FeatureBitset &AvailableFeatures) const; 70 }; 71 72 } // end anonymous namespace 73 74 MCCodeEmitter *llvm::createBPFMCCodeEmitter(const MCInstrInfo &MCII, 75 const MCRegisterInfo &MRI, 76 MCContext &Ctx) { 77 return new BPFMCCodeEmitter(MCII, MRI, true); 78 } 79 80 MCCodeEmitter *llvm::createBPFbeMCCodeEmitter(const MCInstrInfo &MCII, 81 const MCRegisterInfo &MRI, 82 MCContext &Ctx) { 83 return new BPFMCCodeEmitter(MCII, MRI, false); 84 } 85 86 unsigned BPFMCCodeEmitter::getMachineOpValue(const MCInst &MI, 87 const MCOperand &MO, 88 SmallVectorImpl<MCFixup> &Fixups, 89 const MCSubtargetInfo &STI) const { 90 if (MO.isReg()) 91 return MRI.getEncodingValue(MO.getReg()); 92 if (MO.isImm()) 93 return static_cast<unsigned>(MO.getImm()); 94 95 assert(MO.isExpr()); 96 97 const MCExpr *Expr = MO.getExpr(); 98 99 assert(Expr->getKind() == MCExpr::SymbolRef); 100 101 if (MI.getOpcode() == BPF::JAL) 102 // func call name 103 Fixups.push_back(MCFixup::create(0, Expr, FK_PCRel_4)); 104 else if (MI.getOpcode() == BPF::LD_imm64) 105 Fixups.push_back(MCFixup::create(0, Expr, FK_SecRel_8)); 106 else 107 // bb label 108 Fixups.push_back(MCFixup::create(0, Expr, FK_PCRel_2)); 109 110 return 0; 111 } 112 113 static uint8_t SwapBits(uint8_t Val) 114 { 115 return (Val & 0x0F) << 4 | (Val & 0xF0) >> 4; 116 } 117 118 void BPFMCCodeEmitter::encodeInstruction(const MCInst &MI, raw_ostream &OS, 119 SmallVectorImpl<MCFixup> &Fixups, 120 const MCSubtargetInfo &STI) const { 121 verifyInstructionPredicates(MI, 122 computeAvailableFeatures(STI.getFeatureBits())); 123 124 unsigned Opcode = MI.getOpcode(); 125 support::endian::Writer OSE(OS, 126 IsLittleEndian ? support::little : support::big); 127 128 if (Opcode == BPF::LD_imm64 || Opcode == BPF::LD_pseudo) { 129 uint64_t Value = getBinaryCodeForInstr(MI, Fixups, STI); 130 OS << char(Value >> 56); 131 if (IsLittleEndian) 132 OS << char((Value >> 48) & 0xff); 133 else 134 OS << char(SwapBits((Value >> 48) & 0xff)); 135 OSE.write<uint16_t>(0); 136 OSE.write<uint32_t>(Value & 0xffffFFFF); 137 138 const MCOperand &MO = MI.getOperand(1); 139 uint64_t Imm = MO.isImm() ? MO.getImm() : 0; 140 OSE.write<uint8_t>(0); 141 OSE.write<uint8_t>(0); 142 OSE.write<uint16_t>(0); 143 OSE.write<uint32_t>(Imm >> 32); 144 } else { 145 // Get instruction encoding and emit it 146 uint64_t Value = getBinaryCodeForInstr(MI, Fixups, STI); 147 OS << char(Value >> 56); 148 if (IsLittleEndian) 149 OS << char((Value >> 48) & 0xff); 150 else 151 OS << char(SwapBits((Value >> 48) & 0xff)); 152 OSE.write<uint16_t>((Value >> 32) & 0xffff); 153 OSE.write<uint32_t>(Value & 0xffffFFFF); 154 } 155 } 156 157 // Encode BPF Memory Operand 158 uint64_t BPFMCCodeEmitter::getMemoryOpValue(const MCInst &MI, unsigned Op, 159 SmallVectorImpl<MCFixup> &Fixups, 160 const MCSubtargetInfo &STI) const { 161 uint64_t Encoding; 162 const MCOperand Op1 = MI.getOperand(1); 163 assert(Op1.isReg() && "First operand is not register."); 164 Encoding = MRI.getEncodingValue(Op1.getReg()); 165 Encoding <<= 16; 166 MCOperand Op2 = MI.getOperand(2); 167 assert(Op2.isImm() && "Second operand is not immediate."); 168 Encoding |= Op2.getImm() & 0xffff; 169 return Encoding; 170 } 171 172 #define ENABLE_INSTR_PREDICATE_VERIFIER 173 #include "BPFGenMCCodeEmitter.inc" 174