10b57cec5SDimitry Andric //===-- AVRAsmPrinter.cpp - AVR LLVM assembly writer ----------------------===// 20b57cec5SDimitry Andric // 30b57cec5SDimitry Andric // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 40b57cec5SDimitry Andric // See https://llvm.org/LICENSE.txt for license information. 50b57cec5SDimitry Andric // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 60b57cec5SDimitry Andric // 70b57cec5SDimitry Andric //===----------------------------------------------------------------------===// 80b57cec5SDimitry Andric // 90b57cec5SDimitry Andric // This file contains a printer that converts from our internal representation 100b57cec5SDimitry Andric // of machine-dependent LLVM code to GAS-format AVR assembly language. 110b57cec5SDimitry Andric // 120b57cec5SDimitry Andric //===----------------------------------------------------------------------===// 130b57cec5SDimitry Andric 140b57cec5SDimitry Andric #include "AVR.h" 150b57cec5SDimitry Andric #include "AVRMCInstLower.h" 160b57cec5SDimitry Andric #include "AVRSubtarget.h" 170b57cec5SDimitry Andric #include "MCTargetDesc/AVRInstPrinter.h" 180b57cec5SDimitry Andric #include "TargetInfo/AVRTargetInfo.h" 190b57cec5SDimitry Andric 200b57cec5SDimitry Andric #include "llvm/CodeGen/AsmPrinter.h" 210b57cec5SDimitry Andric #include "llvm/CodeGen/MachineFunction.h" 220b57cec5SDimitry Andric #include "llvm/CodeGen/MachineInstr.h" 230b57cec5SDimitry Andric #include "llvm/CodeGen/TargetRegisterInfo.h" 240b57cec5SDimitry Andric #include "llvm/CodeGen/TargetSubtargetInfo.h" 250b57cec5SDimitry Andric #include "llvm/IR/Mangler.h" 260b57cec5SDimitry Andric #include "llvm/MC/MCInst.h" 270b57cec5SDimitry Andric #include "llvm/MC/MCStreamer.h" 280b57cec5SDimitry Andric #include "llvm/MC/MCSymbol.h" 290b57cec5SDimitry Andric #include "llvm/Support/ErrorHandling.h" 300b57cec5SDimitry Andric #include "llvm/Support/TargetRegistry.h" 310b57cec5SDimitry Andric #include "llvm/Support/raw_ostream.h" 320b57cec5SDimitry Andric 330b57cec5SDimitry Andric #define DEBUG_TYPE "avr-asm-printer" 340b57cec5SDimitry Andric 350b57cec5SDimitry Andric namespace llvm { 360b57cec5SDimitry Andric 370b57cec5SDimitry Andric /// An AVR assembly code printer. 380b57cec5SDimitry Andric class AVRAsmPrinter : public AsmPrinter { 390b57cec5SDimitry Andric public: 400b57cec5SDimitry Andric AVRAsmPrinter(TargetMachine &TM, 410b57cec5SDimitry Andric std::unique_ptr<MCStreamer> Streamer) 420b57cec5SDimitry Andric : AsmPrinter(TM, std::move(Streamer)), MRI(*TM.getMCRegisterInfo()) { } 430b57cec5SDimitry Andric 440b57cec5SDimitry Andric StringRef getPassName() const override { return "AVR Assembly Printer"; } 450b57cec5SDimitry Andric 460b57cec5SDimitry Andric void printOperand(const MachineInstr *MI, unsigned OpNo, raw_ostream &O); 470b57cec5SDimitry Andric 480b57cec5SDimitry Andric bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNum, 490b57cec5SDimitry Andric const char *ExtraCode, raw_ostream &O) override; 500b57cec5SDimitry Andric 510b57cec5SDimitry Andric bool PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNum, 520b57cec5SDimitry Andric const char *ExtraCode, raw_ostream &O) override; 530b57cec5SDimitry Andric 54*5ffd83dbSDimitry Andric void emitInstruction(const MachineInstr *MI) override; 550b57cec5SDimitry Andric 560b57cec5SDimitry Andric private: 570b57cec5SDimitry Andric const MCRegisterInfo &MRI; 580b57cec5SDimitry Andric }; 590b57cec5SDimitry Andric 600b57cec5SDimitry Andric void AVRAsmPrinter::printOperand(const MachineInstr *MI, unsigned OpNo, 610b57cec5SDimitry Andric raw_ostream &O) { 620b57cec5SDimitry Andric const MachineOperand &MO = MI->getOperand(OpNo); 630b57cec5SDimitry Andric 640b57cec5SDimitry Andric switch (MO.getType()) { 650b57cec5SDimitry Andric case MachineOperand::MO_Register: 660b57cec5SDimitry Andric O << AVRInstPrinter::getPrettyRegisterName(MO.getReg(), MRI); 670b57cec5SDimitry Andric break; 680b57cec5SDimitry Andric case MachineOperand::MO_Immediate: 690b57cec5SDimitry Andric O << MO.getImm(); 700b57cec5SDimitry Andric break; 710b57cec5SDimitry Andric case MachineOperand::MO_GlobalAddress: 720b57cec5SDimitry Andric O << getSymbol(MO.getGlobal()); 730b57cec5SDimitry Andric break; 740b57cec5SDimitry Andric case MachineOperand::MO_ExternalSymbol: 750b57cec5SDimitry Andric O << *GetExternalSymbolSymbol(MO.getSymbolName()); 760b57cec5SDimitry Andric break; 770b57cec5SDimitry Andric case MachineOperand::MO_MachineBasicBlock: 780b57cec5SDimitry Andric O << *MO.getMBB()->getSymbol(); 790b57cec5SDimitry Andric break; 800b57cec5SDimitry Andric default: 810b57cec5SDimitry Andric llvm_unreachable("Not implemented yet!"); 820b57cec5SDimitry Andric } 830b57cec5SDimitry Andric } 840b57cec5SDimitry Andric 850b57cec5SDimitry Andric bool AVRAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNum, 860b57cec5SDimitry Andric const char *ExtraCode, raw_ostream &O) { 870b57cec5SDimitry Andric // Default asm printer can only deal with some extra codes, 880b57cec5SDimitry Andric // so try it first. 890b57cec5SDimitry Andric bool Error = AsmPrinter::PrintAsmOperand(MI, OpNum, ExtraCode, O); 900b57cec5SDimitry Andric 910b57cec5SDimitry Andric if (Error && ExtraCode && ExtraCode[0]) { 920b57cec5SDimitry Andric if (ExtraCode[1] != 0) 930b57cec5SDimitry Andric return true; // Unknown modifier. 940b57cec5SDimitry Andric 950b57cec5SDimitry Andric if (ExtraCode[0] >= 'A' && ExtraCode[0] <= 'Z') { 960b57cec5SDimitry Andric const MachineOperand &RegOp = MI->getOperand(OpNum); 970b57cec5SDimitry Andric 980b57cec5SDimitry Andric assert(RegOp.isReg() && "Operand must be a register when you're" 990b57cec5SDimitry Andric "using 'A'..'Z' operand extracodes."); 1008bcb0991SDimitry Andric Register Reg = RegOp.getReg(); 1010b57cec5SDimitry Andric 1020b57cec5SDimitry Andric unsigned ByteNumber = ExtraCode[0] - 'A'; 1030b57cec5SDimitry Andric 1040b57cec5SDimitry Andric unsigned OpFlags = MI->getOperand(OpNum - 1).getImm(); 1050b57cec5SDimitry Andric unsigned NumOpRegs = InlineAsm::getNumOperandRegisters(OpFlags); 1060b57cec5SDimitry Andric (void)NumOpRegs; 1070b57cec5SDimitry Andric 1080b57cec5SDimitry Andric const AVRSubtarget &STI = MF->getSubtarget<AVRSubtarget>(); 1090b57cec5SDimitry Andric const TargetRegisterInfo &TRI = *STI.getRegisterInfo(); 1100b57cec5SDimitry Andric 1110b57cec5SDimitry Andric const TargetRegisterClass *RC = TRI.getMinimalPhysRegClass(Reg); 1120b57cec5SDimitry Andric unsigned BytesPerReg = TRI.getRegSizeInBits(*RC) / 8; 1130b57cec5SDimitry Andric assert(BytesPerReg <= 2 && "Only 8 and 16 bit regs are supported."); 1140b57cec5SDimitry Andric 1150b57cec5SDimitry Andric unsigned RegIdx = ByteNumber / BytesPerReg; 1160b57cec5SDimitry Andric assert(RegIdx < NumOpRegs && "Multibyte index out of range."); 1170b57cec5SDimitry Andric 1180b57cec5SDimitry Andric Reg = MI->getOperand(OpNum + RegIdx).getReg(); 1190b57cec5SDimitry Andric 1200b57cec5SDimitry Andric if (BytesPerReg == 2) { 1210b57cec5SDimitry Andric Reg = TRI.getSubReg(Reg, ByteNumber % BytesPerReg ? AVR::sub_hi 1220b57cec5SDimitry Andric : AVR::sub_lo); 1230b57cec5SDimitry Andric } 1240b57cec5SDimitry Andric 1250b57cec5SDimitry Andric O << AVRInstPrinter::getPrettyRegisterName(Reg, MRI); 1260b57cec5SDimitry Andric return false; 1270b57cec5SDimitry Andric } 1280b57cec5SDimitry Andric } 1290b57cec5SDimitry Andric 1300b57cec5SDimitry Andric if (Error) 1310b57cec5SDimitry Andric printOperand(MI, OpNum, O); 1320b57cec5SDimitry Andric 1330b57cec5SDimitry Andric return false; 1340b57cec5SDimitry Andric } 1350b57cec5SDimitry Andric 1360b57cec5SDimitry Andric bool AVRAsmPrinter::PrintAsmMemoryOperand(const MachineInstr *MI, 1370b57cec5SDimitry Andric unsigned OpNum, const char *ExtraCode, 1380b57cec5SDimitry Andric raw_ostream &O) { 1390b57cec5SDimitry Andric if (ExtraCode && ExtraCode[0]) { 1400b57cec5SDimitry Andric llvm_unreachable("This branch is not implemented yet"); 1410b57cec5SDimitry Andric } 1420b57cec5SDimitry Andric 1430b57cec5SDimitry Andric const MachineOperand &MO = MI->getOperand(OpNum); 1440b57cec5SDimitry Andric (void)MO; 1450b57cec5SDimitry Andric assert(MO.isReg() && "Unexpected inline asm memory operand"); 1460b57cec5SDimitry Andric 1470b57cec5SDimitry Andric // TODO: We should be able to look up the alternative name for 1480b57cec5SDimitry Andric // the register if it's given. 1490b57cec5SDimitry Andric // TableGen doesn't expose a way of getting retrieving names 1500b57cec5SDimitry Andric // for registers. 1510b57cec5SDimitry Andric if (MI->getOperand(OpNum).getReg() == AVR::R31R30) { 1520b57cec5SDimitry Andric O << "Z"; 1530b57cec5SDimitry Andric } else { 1540b57cec5SDimitry Andric assert(MI->getOperand(OpNum).getReg() == AVR::R29R28 && 1550b57cec5SDimitry Andric "Wrong register class for memory operand."); 1560b57cec5SDimitry Andric O << "Y"; 1570b57cec5SDimitry Andric } 1580b57cec5SDimitry Andric 1590b57cec5SDimitry Andric // If NumOpRegs == 2, then we assume it is product of a FrameIndex expansion 1600b57cec5SDimitry Andric // and the second operand is an Imm. 1610b57cec5SDimitry Andric unsigned OpFlags = MI->getOperand(OpNum - 1).getImm(); 1620b57cec5SDimitry Andric unsigned NumOpRegs = InlineAsm::getNumOperandRegisters(OpFlags); 1630b57cec5SDimitry Andric 1640b57cec5SDimitry Andric if (NumOpRegs == 2) { 1650b57cec5SDimitry Andric O << '+' << MI->getOperand(OpNum + 1).getImm(); 1660b57cec5SDimitry Andric } 1670b57cec5SDimitry Andric 1680b57cec5SDimitry Andric return false; 1690b57cec5SDimitry Andric } 1700b57cec5SDimitry Andric 171*5ffd83dbSDimitry Andric void AVRAsmPrinter::emitInstruction(const MachineInstr *MI) { 1720b57cec5SDimitry Andric AVRMCInstLower MCInstLowering(OutContext, *this); 1730b57cec5SDimitry Andric 1740b57cec5SDimitry Andric MCInst I; 1750b57cec5SDimitry Andric MCInstLowering.lowerInstruction(*MI, I); 1760b57cec5SDimitry Andric EmitToStreamer(*OutStreamer, I); 1770b57cec5SDimitry Andric } 1780b57cec5SDimitry Andric 1790b57cec5SDimitry Andric } // end of namespace llvm 1800b57cec5SDimitry Andric 181480093f4SDimitry Andric extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeAVRAsmPrinter() { 1820b57cec5SDimitry Andric llvm::RegisterAsmPrinter<llvm::AVRAsmPrinter> X(llvm::getTheAVRTarget()); 1830b57cec5SDimitry Andric } 1840b57cec5SDimitry Andric 185