xref: /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/Thumb1InstrInfo.h (revision e9e8876a4d6afc1ad5315faaa191b25121a813d7)
1 //===-- Thumb1InstrInfo.h - Thumb-1 Instruction Information -----*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file contains the Thumb-1 implementation of the TargetInstrInfo class.
10 //
11 //===----------------------------------------------------------------------===//
12 
13 #ifndef LLVM_LIB_TARGET_ARM_THUMB1INSTRINFO_H
14 #define LLVM_LIB_TARGET_ARM_THUMB1INSTRINFO_H
15 
16 #include "ARMBaseInstrInfo.h"
17 #include "ThumbRegisterInfo.h"
18 
19 namespace llvm {
20   class ARMSubtarget;
21 
22 class Thumb1InstrInfo : public ARMBaseInstrInfo {
23   ThumbRegisterInfo RI;
24 public:
25   explicit Thumb1InstrInfo(const ARMSubtarget &STI);
26 
27   /// Return the noop instruction to use for a noop.
28   MCInst getNop() const override;
29 
30   // Return the non-pre/post incrementing version of 'Opc'. Return 0
31   // if there is not such an opcode.
32   unsigned getUnindexedOpcode(unsigned Opc) const override;
33 
34   /// getRegisterInfo - TargetInstrInfo is a superset of MRegister info.  As
35   /// such, whenever a client has an instance of instruction info, it should
36   /// always be able to get register info as well (through this method).
37   ///
38   const ThumbRegisterInfo &getRegisterInfo() const override { return RI; }
39 
40   void copyPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
41                    const DebugLoc &DL, MCRegister DestReg, MCRegister SrcReg,
42                    bool KillSrc) const override;
43   void storeRegToStackSlot(MachineBasicBlock &MBB,
44                            MachineBasicBlock::iterator MBBI,
45                            Register SrcReg, bool isKill, int FrameIndex,
46                            const TargetRegisterClass *RC,
47                            const TargetRegisterInfo *TRI) const override;
48 
49   void loadRegFromStackSlot(MachineBasicBlock &MBB,
50                             MachineBasicBlock::iterator MBBI,
51                             Register DestReg, int FrameIndex,
52                             const TargetRegisterClass *RC,
53                             const TargetRegisterInfo *TRI) const override;
54 
55   bool canCopyGluedNodeDuringSchedule(SDNode *N) const override;
56 private:
57   void expandLoadStackGuard(MachineBasicBlock::iterator MI) const override;
58 };
59 }
60 
61 #endif
62