1 //===-- ARMWinCOFFObjectWriter.cpp - ARM Windows COFF Object Writer -- C++ -==// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 9 #include "MCTargetDesc/ARMFixupKinds.h" 10 #include "llvm/ADT/Twine.h" 11 #include "llvm/BinaryFormat/COFF.h" 12 #include "llvm/MC/MCAsmBackend.h" 13 #include "llvm/MC/MCExpr.h" 14 #include "llvm/MC/MCFixup.h" 15 #include "llvm/MC/MCFixupKindInfo.h" 16 #include "llvm/MC/MCObjectWriter.h" 17 #include "llvm/MC/MCValue.h" 18 #include "llvm/MC/MCWinCOFFObjectWriter.h" 19 #include "llvm/Support/ErrorHandling.h" 20 #include "llvm/Support/raw_ostream.h" 21 #include <cassert> 22 23 using namespace llvm; 24 25 namespace { 26 27 class ARMWinCOFFObjectWriter : public MCWinCOFFObjectTargetWriter { 28 public: 29 ARMWinCOFFObjectWriter(bool Is64Bit) 30 : MCWinCOFFObjectTargetWriter(COFF::IMAGE_FILE_MACHINE_ARMNT) { 31 assert(!Is64Bit && "AArch64 support not yet implemented"); 32 } 33 34 ~ARMWinCOFFObjectWriter() override = default; 35 36 unsigned getRelocType(MCContext &Ctx, const MCValue &Target, 37 const MCFixup &Fixup, bool IsCrossSection, 38 const MCAsmBackend &MAB) const override; 39 40 bool recordRelocation(const MCFixup &) const override; 41 }; 42 43 } // end anonymous namespace 44 45 unsigned ARMWinCOFFObjectWriter::getRelocType(MCContext &Ctx, 46 const MCValue &Target, 47 const MCFixup &Fixup, 48 bool IsCrossSection, 49 const MCAsmBackend &MAB) const { 50 assert(getMachine() == COFF::IMAGE_FILE_MACHINE_ARMNT && 51 "AArch64 support not yet implemented"); 52 53 MCSymbolRefExpr::VariantKind Modifier = 54 Target.isAbsolute() ? MCSymbolRefExpr::VK_None : Target.getSymA()->getKind(); 55 56 switch (static_cast<unsigned>(Fixup.getKind())) { 57 default: { 58 const MCFixupKindInfo &Info = MAB.getFixupKindInfo(Fixup.getKind()); 59 report_fatal_error(Twine("unsupported relocation type: ") + Info.Name); 60 } 61 case FK_Data_4: 62 switch (Modifier) { 63 case MCSymbolRefExpr::VK_COFF_IMGREL32: 64 return COFF::IMAGE_REL_ARM_ADDR32NB; 65 case MCSymbolRefExpr::VK_SECREL: 66 return COFF::IMAGE_REL_ARM_SECREL; 67 default: 68 return COFF::IMAGE_REL_ARM_ADDR32; 69 } 70 case FK_SecRel_2: 71 return COFF::IMAGE_REL_ARM_SECTION; 72 case FK_SecRel_4: 73 return COFF::IMAGE_REL_ARM_SECREL; 74 case ARM::fixup_t2_condbranch: 75 return COFF::IMAGE_REL_ARM_BRANCH20T; 76 case ARM::fixup_t2_uncondbranch: 77 case ARM::fixup_arm_thumb_bl: 78 return COFF::IMAGE_REL_ARM_BRANCH24T; 79 case ARM::fixup_arm_thumb_blx: 80 return COFF::IMAGE_REL_ARM_BLX23T; 81 case ARM::fixup_t2_movw_lo16: 82 case ARM::fixup_t2_movt_hi16: 83 return COFF::IMAGE_REL_ARM_MOV32T; 84 } 85 } 86 87 bool ARMWinCOFFObjectWriter::recordRelocation(const MCFixup &Fixup) const { 88 return static_cast<unsigned>(Fixup.getKind()) != ARM::fixup_t2_movt_hi16; 89 } 90 91 namespace llvm { 92 93 std::unique_ptr<MCObjectTargetWriter> 94 createARMWinCOFFObjectWriter(bool Is64Bit) { 95 return llvm::make_unique<ARMWinCOFFObjectWriter>(Is64Bit); 96 } 97 98 } // end namespace llvm 99