1*0b57cec5SDimitry Andric //===-- ARMSelectionDAGInfo.h - ARM SelectionDAG Info -----------*- C++ -*-===// 2*0b57cec5SDimitry Andric // 3*0b57cec5SDimitry Andric // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4*0b57cec5SDimitry Andric // See https://llvm.org/LICENSE.txt for license information. 5*0b57cec5SDimitry Andric // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6*0b57cec5SDimitry Andric // 7*0b57cec5SDimitry Andric //===----------------------------------------------------------------------===// 8*0b57cec5SDimitry Andric // 9*0b57cec5SDimitry Andric // This file defines the ARM subclass for SelectionDAGTargetInfo. 10*0b57cec5SDimitry Andric // 11*0b57cec5SDimitry Andric //===----------------------------------------------------------------------===// 12*0b57cec5SDimitry Andric 13*0b57cec5SDimitry Andric #ifndef LLVM_LIB_TARGET_ARM_ARMSELECTIONDAGINFO_H 14*0b57cec5SDimitry Andric #define LLVM_LIB_TARGET_ARM_ARMSELECTIONDAGINFO_H 15*0b57cec5SDimitry Andric 16*0b57cec5SDimitry Andric #include "MCTargetDesc/ARMAddressingModes.h" 17*0b57cec5SDimitry Andric #include "llvm/CodeGen/RuntimeLibcalls.h" 18*0b57cec5SDimitry Andric #include "llvm/CodeGen/SelectionDAGTargetInfo.h" 19*0b57cec5SDimitry Andric 20*0b57cec5SDimitry Andric namespace llvm { 21*0b57cec5SDimitry Andric 22*0b57cec5SDimitry Andric namespace ARM_AM { 23*0b57cec5SDimitry Andric static inline ShiftOpc getShiftOpcForNode(unsigned Opcode) { 24*0b57cec5SDimitry Andric switch (Opcode) { 25*0b57cec5SDimitry Andric default: return ARM_AM::no_shift; 26*0b57cec5SDimitry Andric case ISD::SHL: return ARM_AM::lsl; 27*0b57cec5SDimitry Andric case ISD::SRL: return ARM_AM::lsr; 28*0b57cec5SDimitry Andric case ISD::SRA: return ARM_AM::asr; 29*0b57cec5SDimitry Andric case ISD::ROTR: return ARM_AM::ror; 30*0b57cec5SDimitry Andric //case ISD::ROTL: // Only if imm -> turn into ROTR. 31*0b57cec5SDimitry Andric // Can't handle RRX here, because it would require folding a flag into 32*0b57cec5SDimitry Andric // the addressing mode. :( This causes us to miss certain things. 33*0b57cec5SDimitry Andric //case ARMISD::RRX: return ARM_AM::rrx; 34*0b57cec5SDimitry Andric } 35*0b57cec5SDimitry Andric } 36*0b57cec5SDimitry Andric } // end namespace ARM_AM 37*0b57cec5SDimitry Andric 38*0b57cec5SDimitry Andric class ARMSelectionDAGInfo : public SelectionDAGTargetInfo { 39*0b57cec5SDimitry Andric public: 40*0b57cec5SDimitry Andric SDValue EmitTargetCodeForMemcpy(SelectionDAG &DAG, const SDLoc &dl, 41*0b57cec5SDimitry Andric SDValue Chain, SDValue Dst, SDValue Src, 42*0b57cec5SDimitry Andric SDValue Size, unsigned Align, bool isVolatile, 43*0b57cec5SDimitry Andric bool AlwaysInline, 44*0b57cec5SDimitry Andric MachinePointerInfo DstPtrInfo, 45*0b57cec5SDimitry Andric MachinePointerInfo SrcPtrInfo) const override; 46*0b57cec5SDimitry Andric 47*0b57cec5SDimitry Andric SDValue 48*0b57cec5SDimitry Andric EmitTargetCodeForMemmove(SelectionDAG &DAG, const SDLoc &dl, SDValue Chain, 49*0b57cec5SDimitry Andric SDValue Dst, SDValue Src, SDValue Size, 50*0b57cec5SDimitry Andric unsigned Align, bool isVolatile, 51*0b57cec5SDimitry Andric MachinePointerInfo DstPtrInfo, 52*0b57cec5SDimitry Andric MachinePointerInfo SrcPtrInfo) const override; 53*0b57cec5SDimitry Andric 54*0b57cec5SDimitry Andric // Adjust parameters for memset, see RTABI section 4.3.4 55*0b57cec5SDimitry Andric SDValue EmitTargetCodeForMemset(SelectionDAG &DAG, const SDLoc &dl, 56*0b57cec5SDimitry Andric SDValue Chain, SDValue Op1, SDValue Op2, 57*0b57cec5SDimitry Andric SDValue Op3, unsigned Align, bool isVolatile, 58*0b57cec5SDimitry Andric MachinePointerInfo DstPtrInfo) const override; 59*0b57cec5SDimitry Andric 60*0b57cec5SDimitry Andric SDValue EmitSpecializedLibcall(SelectionDAG &DAG, const SDLoc &dl, 61*0b57cec5SDimitry Andric SDValue Chain, SDValue Dst, SDValue Src, 62*0b57cec5SDimitry Andric SDValue Size, unsigned Align, 63*0b57cec5SDimitry Andric RTLIB::Libcall LC) const; 64*0b57cec5SDimitry Andric }; 65*0b57cec5SDimitry Andric 66*0b57cec5SDimitry Andric } 67*0b57cec5SDimitry Andric 68*0b57cec5SDimitry Andric #endif 69