1 //===-- ARMMachineFunctionInfo.h - ARM machine function info ----*- C++ -*-===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 // 9 // This file declares ARM-specific per-machine-function information. 10 // 11 //===----------------------------------------------------------------------===// 12 13 #ifndef LLVM_LIB_TARGET_ARM_ARMMACHINEFUNCTIONINFO_H 14 #define LLVM_LIB_TARGET_ARM_ARMMACHINEFUNCTIONINFO_H 15 16 #include "llvm/ADT/DenseMap.h" 17 #include "llvm/ADT/SmallPtrSet.h" 18 #include "llvm/CodeGen/MachineFunction.h" 19 #include "llvm/IR/GlobalVariable.h" 20 #include "llvm/Support/ErrorHandling.h" 21 #include <utility> 22 23 namespace llvm { 24 25 /// ARMFunctionInfo - This class is derived from MachineFunctionInfo and 26 /// contains private ARM-specific information for each MachineFunction. 27 class ARMFunctionInfo : public MachineFunctionInfo { 28 virtual void anchor(); 29 30 /// isThumb - True if this function is compiled under Thumb mode. 31 /// Used to initialized Align, so must precede it. 32 bool isThumb = false; 33 34 /// hasThumb2 - True if the target architecture supports Thumb2. Do not use 35 /// to determine if function is compiled under Thumb mode, for that use 36 /// 'isThumb'. 37 bool hasThumb2 = false; 38 39 /// StByValParamsPadding - For parameter that is split between 40 /// GPRs and memory; while recovering GPRs part, when 41 /// StackAlignment > 4, and GPRs-part-size mod StackAlignment != 0, 42 /// we need to insert gap before parameter start address. It allows to 43 /// "attach" GPR-part to the part that was passed via stack. 44 unsigned StByValParamsPadding = 0; 45 46 /// ArgsRegSaveSize - Size of the register save area for vararg functions or 47 /// those making guaranteed tail calls that need more stack argument space 48 /// than is provided by this functions incoming parameters. 49 /// 50 unsigned ArgRegsSaveSize = 0; 51 52 /// ReturnRegsCount - Number of registers used up in the return. 53 unsigned ReturnRegsCount = 0; 54 55 /// HasStackFrame - True if this function has a stack frame. Set by 56 /// determineCalleeSaves(). 57 bool HasStackFrame = false; 58 59 /// RestoreSPFromFP - True if epilogue should restore SP from FP. Set by 60 /// emitPrologue. 61 bool RestoreSPFromFP = false; 62 63 /// LRSpilled - True if the LR register has been for spilled for 64 /// any reason, so it's legal to emit an ARM::tBfar (i.e. "bl"). 65 bool LRSpilled = false; 66 67 /// FramePtrSpillOffset - If HasStackFrame, this records the frame pointer 68 /// spill stack offset. 69 unsigned FramePtrSpillOffset = 0; 70 71 /// GPRCS1Offset, GPRCS2Offset, DPRCSOffset - Starting offset of callee saved 72 /// register spills areas. For Mac OS X: 73 /// 74 /// GPR callee-saved (1) : r4, r5, r6, r7, lr 75 /// -------------------------------------------- 76 /// GPR callee-saved (2) : r8, r10, r11 77 /// -------------------------------------------- 78 /// DPR callee-saved : d8 - d15 79 /// 80 /// Also see AlignedDPRCSRegs below. Not all D-regs need to go in area 3. 81 /// Some may be spilled after the stack has been realigned. 82 unsigned GPRCS1Offset = 0; 83 unsigned GPRCS2Offset = 0; 84 unsigned DPRCSOffset = 0; 85 86 /// GPRCS1Size, GPRCS2Size, DPRCSSize - Sizes of callee saved register spills 87 /// areas. 88 unsigned FPCXTSaveSize = 0; 89 unsigned FRSaveSize = 0; 90 unsigned GPRCS1Size = 0; 91 unsigned GPRCS2Size = 0; 92 unsigned DPRCSAlignGapSize = 0; 93 unsigned DPRCSSize = 0; 94 95 /// NumAlignedDPRCS2Regs - The number of callee-saved DPRs that are saved in 96 /// the aligned portion of the stack frame. This is always a contiguous 97 /// sequence of D-registers starting from d8. 98 /// 99 /// We do not keep track of the frame indices used for these registers - they 100 /// behave like any other frame index in the aligned stack frame. These 101 /// registers also aren't included in DPRCSSize above. 102 unsigned NumAlignedDPRCS2Regs = 0; 103 104 unsigned PICLabelUId = 0; 105 106 /// VarArgsFrameIndex - FrameIndex for start of varargs area. 107 int VarArgsFrameIndex = 0; 108 109 /// HasITBlocks - True if IT blocks have been inserted. 110 bool HasITBlocks = false; 111 112 // Security Extensions 113 bool IsCmseNSEntry; 114 bool IsCmseNSCall; 115 116 /// CPEClones - Track constant pool entries clones created by Constant Island 117 /// pass. 118 DenseMap<unsigned, unsigned> CPEClones; 119 120 /// ArgumentStackSize - amount of bytes on stack consumed by the arguments 121 /// being passed on the stack 122 unsigned ArgumentStackSize = 0; 123 124 /// ArgumentStackToRestore - amount of bytes on stack consumed that we must 125 /// restore on return. 126 unsigned ArgumentStackToRestore = 0; 127 128 /// CoalescedWeights - mapping of basic blocks to the rolling counter of 129 /// coalesced weights. 130 DenseMap<const MachineBasicBlock*, unsigned> CoalescedWeights; 131 132 /// True if this function has a subset of CSRs that is handled explicitly via 133 /// copies. 134 bool IsSplitCSR = false; 135 136 /// Globals that have had their storage promoted into the constant pool. 137 SmallPtrSet<const GlobalVariable*,2> PromotedGlobals; 138 139 /// The amount the literal pool has been increasedby due to promoted globals. 140 int PromotedGlobalsIncrease = 0; 141 142 /// True if r0 will be preserved by a call to this function (e.g. C++ 143 /// con/destructors). 144 bool PreservesR0 = false; 145 146 /// True if the function should sign its return address. 147 bool SignReturnAddress = false; 148 149 /// True if the fucntion should sign its return address, even if LR is not 150 /// saved. 151 bool SignReturnAddressAll = false; 152 153 /// True if BTI instructions should be placed at potential indirect jump 154 /// destinations. 155 bool BranchTargetEnforcement = false; 156 157 public: 158 ARMFunctionInfo() = default; 159 160 explicit ARMFunctionInfo(MachineFunction &MF); 161 162 MachineFunctionInfo * 163 clone(BumpPtrAllocator &Allocator, MachineFunction &DestMF, 164 const DenseMap<MachineBasicBlock *, MachineBasicBlock *> &Src2DstMBB) 165 const override; 166 167 bool isThumbFunction() const { return isThumb; } 168 bool isThumb1OnlyFunction() const { return isThumb && !hasThumb2; } 169 bool isThumb2Function() const { return isThumb && hasThumb2; } 170 171 bool isCmseNSEntryFunction() const { return IsCmseNSEntry; } 172 bool isCmseNSCallFunction() const { return IsCmseNSCall; } 173 174 unsigned getStoredByValParamsPadding() const { return StByValParamsPadding; } 175 void setStoredByValParamsPadding(unsigned p) { StByValParamsPadding = p; } 176 177 unsigned getArgRegsSaveSize() const { return ArgRegsSaveSize; } 178 void setArgRegsSaveSize(unsigned s) { ArgRegsSaveSize = s; } 179 180 unsigned getReturnRegsCount() const { return ReturnRegsCount; } 181 void setReturnRegsCount(unsigned s) { ReturnRegsCount = s; } 182 183 bool hasStackFrame() const { return HasStackFrame; } 184 void setHasStackFrame(bool s) { HasStackFrame = s; } 185 186 bool shouldRestoreSPFromFP() const { return RestoreSPFromFP; } 187 void setShouldRestoreSPFromFP(bool s) { RestoreSPFromFP = s; } 188 189 bool isLRSpilled() const { return LRSpilled; } 190 void setLRIsSpilled(bool s) { LRSpilled = s; } 191 192 unsigned getFramePtrSpillOffset() const { return FramePtrSpillOffset; } 193 void setFramePtrSpillOffset(unsigned o) { FramePtrSpillOffset = o; } 194 195 unsigned getNumAlignedDPRCS2Regs() const { return NumAlignedDPRCS2Regs; } 196 void setNumAlignedDPRCS2Regs(unsigned n) { NumAlignedDPRCS2Regs = n; } 197 198 unsigned getGPRCalleeSavedArea1Offset() const { return GPRCS1Offset; } 199 unsigned getGPRCalleeSavedArea2Offset() const { return GPRCS2Offset; } 200 unsigned getDPRCalleeSavedAreaOffset() const { return DPRCSOffset; } 201 202 void setGPRCalleeSavedArea1Offset(unsigned o) { GPRCS1Offset = o; } 203 void setGPRCalleeSavedArea2Offset(unsigned o) { GPRCS2Offset = o; } 204 void setDPRCalleeSavedAreaOffset(unsigned o) { DPRCSOffset = o; } 205 206 unsigned getFPCXTSaveAreaSize() const { return FPCXTSaveSize; } 207 unsigned getFrameRecordSavedAreaSize() const { return FRSaveSize; } 208 unsigned getGPRCalleeSavedArea1Size() const { return GPRCS1Size; } 209 unsigned getGPRCalleeSavedArea2Size() const { return GPRCS2Size; } 210 unsigned getDPRCalleeSavedGapSize() const { return DPRCSAlignGapSize; } 211 unsigned getDPRCalleeSavedAreaSize() const { return DPRCSSize; } 212 213 void setFPCXTSaveAreaSize(unsigned s) { FPCXTSaveSize = s; } 214 void setFrameRecordSavedAreaSize(unsigned s) { FRSaveSize = s; } 215 void setGPRCalleeSavedArea1Size(unsigned s) { GPRCS1Size = s; } 216 void setGPRCalleeSavedArea2Size(unsigned s) { GPRCS2Size = s; } 217 void setDPRCalleeSavedGapSize(unsigned s) { DPRCSAlignGapSize = s; } 218 void setDPRCalleeSavedAreaSize(unsigned s) { DPRCSSize = s; } 219 220 unsigned getArgumentStackSize() const { return ArgumentStackSize; } 221 void setArgumentStackSize(unsigned size) { ArgumentStackSize = size; } 222 223 unsigned getArgumentStackToRestore() const { return ArgumentStackToRestore; } 224 void setArgumentStackToRestore(unsigned v) { ArgumentStackToRestore = v; } 225 226 void initPICLabelUId(unsigned UId) { 227 PICLabelUId = UId; 228 } 229 230 unsigned getNumPICLabels() const { 231 return PICLabelUId; 232 } 233 234 unsigned createPICLabelUId() { 235 return PICLabelUId++; 236 } 237 238 int getVarArgsFrameIndex() const { return VarArgsFrameIndex; } 239 void setVarArgsFrameIndex(int Index) { VarArgsFrameIndex = Index; } 240 241 bool hasITBlocks() const { return HasITBlocks; } 242 void setHasITBlocks(bool h) { HasITBlocks = h; } 243 244 bool isSplitCSR() const { return IsSplitCSR; } 245 void setIsSplitCSR(bool s) { IsSplitCSR = s; } 246 247 void recordCPEClone(unsigned CPIdx, unsigned CPCloneIdx) { 248 if (!CPEClones.insert(std::make_pair(CPCloneIdx, CPIdx)).second) 249 llvm_unreachable("Duplicate entries!"); 250 } 251 252 unsigned getOriginalCPIdx(unsigned CloneIdx) const { 253 DenseMap<unsigned, unsigned>::const_iterator I = CPEClones.find(CloneIdx); 254 if (I != CPEClones.end()) 255 return I->second; 256 else 257 return -1U; 258 } 259 260 DenseMap<const MachineBasicBlock*, unsigned>::iterator getCoalescedWeight( 261 MachineBasicBlock* MBB) { 262 auto It = CoalescedWeights.find(MBB); 263 if (It == CoalescedWeights.end()) { 264 It = CoalescedWeights.insert(std::make_pair(MBB, 0)).first; 265 } 266 return It; 267 } 268 269 /// Indicate to the backend that \c GV has had its storage changed to inside 270 /// a constant pool. This means it no longer needs to be emitted as a 271 /// global variable. 272 void markGlobalAsPromotedToConstantPool(const GlobalVariable *GV) { 273 PromotedGlobals.insert(GV); 274 } 275 SmallPtrSet<const GlobalVariable*, 2>& getGlobalsPromotedToConstantPool() { 276 return PromotedGlobals; 277 } 278 int getPromotedConstpoolIncrease() const { 279 return PromotedGlobalsIncrease; 280 } 281 void setPromotedConstpoolIncrease(int Sz) { 282 PromotedGlobalsIncrease = Sz; 283 } 284 285 DenseMap<unsigned, unsigned> EHPrologueRemappedRegs; 286 DenseMap<unsigned, unsigned> EHPrologueOffsetInRegs; 287 288 void setPreservesR0() { PreservesR0 = true; } 289 bool getPreservesR0() const { return PreservesR0; } 290 291 bool shouldSignReturnAddress() const { 292 return shouldSignReturnAddress(LRSpilled); 293 } 294 295 bool shouldSignReturnAddress(bool SpillsLR) const { 296 if (!SignReturnAddress) 297 return false; 298 if (SignReturnAddressAll) 299 return true; 300 return SpillsLR; 301 } 302 303 bool branchTargetEnforcement() const { return BranchTargetEnforcement; } 304 }; 305 306 } // end namespace llvm 307 308 #endif // LLVM_LIB_TARGET_ARM_ARMMACHINEFUNCTIONINFO_H 309