1 //===-- ARMMachineFunctionInfo.h - ARM machine function info ----*- C++ -*-===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 // 9 // This file declares ARM-specific per-machine-function information. 10 // 11 //===----------------------------------------------------------------------===// 12 13 #ifndef LLVM_LIB_TARGET_ARM_ARMMACHINEFUNCTIONINFO_H 14 #define LLVM_LIB_TARGET_ARM_ARMMACHINEFUNCTIONINFO_H 15 16 #include "llvm/ADT/DenseMap.h" 17 #include "llvm/ADT/SmallPtrSet.h" 18 #include "llvm/CodeGen/MachineFunction.h" 19 #include "llvm/IR/GlobalVariable.h" 20 #include "llvm/Support/ErrorHandling.h" 21 #include <utility> 22 23 namespace llvm { 24 25 class ARMSubtarget; 26 27 /// ARMFunctionInfo - This class is derived from MachineFunctionInfo and 28 /// contains private ARM-specific information for each MachineFunction. 29 class ARMFunctionInfo : public MachineFunctionInfo { 30 virtual void anchor(); 31 32 /// isThumb - True if this function is compiled under Thumb mode. 33 /// Used to initialized Align, so must precede it. 34 bool isThumb = false; 35 36 /// hasThumb2 - True if the target architecture supports Thumb2. Do not use 37 /// to determine if function is compiled under Thumb mode, for that use 38 /// 'isThumb'. 39 bool hasThumb2 = false; 40 41 /// StByValParamsPadding - For parameter that is split between 42 /// GPRs and memory; while recovering GPRs part, when 43 /// StackAlignment > 4, and GPRs-part-size mod StackAlignment != 0, 44 /// we need to insert gap before parameter start address. It allows to 45 /// "attach" GPR-part to the part that was passed via stack. 46 unsigned StByValParamsPadding = 0; 47 48 /// ArgsRegSaveSize - Size of the register save area for vararg functions or 49 /// those making guaranteed tail calls that need more stack argument space 50 /// than is provided by this functions incoming parameters. 51 /// 52 unsigned ArgRegsSaveSize = 0; 53 54 /// ReturnRegsCount - Number of registers used up in the return. 55 unsigned ReturnRegsCount = 0; 56 57 /// HasStackFrame - True if this function has a stack frame. Set by 58 /// determineCalleeSaves(). 59 bool HasStackFrame = false; 60 61 /// RestoreSPFromFP - True if epilogue should restore SP from FP. Set by 62 /// emitPrologue. 63 bool RestoreSPFromFP = false; 64 65 /// LRSpilled - True if the LR register has been for spilled for 66 /// any reason, so it's legal to emit an ARM::tBfar (i.e. "bl"). 67 bool LRSpilled = false; 68 69 /// FramePtrSpillOffset - If HasStackFrame, this records the frame pointer 70 /// spill stack offset. 71 unsigned FramePtrSpillOffset = 0; 72 73 /// GPRCS1Offset, GPRCS2Offset, DPRCSOffset - Starting offset of callee saved 74 /// register spills areas. For Mac OS X: 75 /// 76 /// GPR callee-saved (1) : r4, r5, r6, r7, lr 77 /// -------------------------------------------- 78 /// GPR callee-saved (2) : r8, r10, r11 79 /// -------------------------------------------- 80 /// DPR callee-saved : d8 - d15 81 /// 82 /// Also see AlignedDPRCSRegs below. Not all D-regs need to go in area 3. 83 /// Some may be spilled after the stack has been realigned. 84 unsigned GPRCS1Offset = 0; 85 unsigned GPRCS2Offset = 0; 86 unsigned DPRCSOffset = 0; 87 88 /// GPRCS1Size, GPRCS2Size, DPRCSSize - Sizes of callee saved register spills 89 /// areas. 90 unsigned FPCXTSaveSize = 0; 91 unsigned FRSaveSize = 0; 92 unsigned GPRCS1Size = 0; 93 unsigned GPRCS2Size = 0; 94 unsigned DPRCSAlignGapSize = 0; 95 unsigned DPRCSSize = 0; 96 97 /// NumAlignedDPRCS2Regs - The number of callee-saved DPRs that are saved in 98 /// the aligned portion of the stack frame. This is always a contiguous 99 /// sequence of D-registers starting from d8. 100 /// 101 /// We do not keep track of the frame indices used for these registers - they 102 /// behave like any other frame index in the aligned stack frame. These 103 /// registers also aren't included in DPRCSSize above. 104 unsigned NumAlignedDPRCS2Regs = 0; 105 106 unsigned PICLabelUId = 0; 107 108 /// VarArgsFrameIndex - FrameIndex for start of varargs area. 109 int VarArgsFrameIndex = 0; 110 111 /// HasITBlocks - True if IT blocks have been inserted. 112 bool HasITBlocks = false; 113 114 // Security Extensions 115 bool IsCmseNSEntry; 116 bool IsCmseNSCall; 117 118 /// CPEClones - Track constant pool entries clones created by Constant Island 119 /// pass. 120 DenseMap<unsigned, unsigned> CPEClones; 121 122 /// ArgumentStackSize - amount of bytes on stack consumed by the arguments 123 /// being passed on the stack 124 unsigned ArgumentStackSize = 0; 125 126 /// ArgumentStackToRestore - amount of bytes on stack consumed that we must 127 /// restore on return. 128 unsigned ArgumentStackToRestore = 0; 129 130 /// CoalescedWeights - mapping of basic blocks to the rolling counter of 131 /// coalesced weights. 132 DenseMap<const MachineBasicBlock*, unsigned> CoalescedWeights; 133 134 /// True if this function has a subset of CSRs that is handled explicitly via 135 /// copies. 136 bool IsSplitCSR = false; 137 138 /// Globals that have had their storage promoted into the constant pool. 139 SmallPtrSet<const GlobalVariable*,2> PromotedGlobals; 140 141 /// The amount the literal pool has been increasedby due to promoted globals. 142 int PromotedGlobalsIncrease = 0; 143 144 /// True if r0 will be preserved by a call to this function (e.g. C++ 145 /// con/destructors). 146 bool PreservesR0 = false; 147 148 /// True if the function should sign its return address. 149 bool SignReturnAddress = false; 150 151 /// True if the fucntion should sign its return address, even if LR is not 152 /// saved. 153 bool SignReturnAddressAll = false; 154 155 /// True if BTI instructions should be placed at potential indirect jump 156 /// destinations. 157 bool BranchTargetEnforcement = false; 158 159 public: 160 ARMFunctionInfo() = default; 161 162 explicit ARMFunctionInfo(const Function &F, const ARMSubtarget *STI); 163 164 MachineFunctionInfo * 165 clone(BumpPtrAllocator &Allocator, MachineFunction &DestMF, 166 const DenseMap<MachineBasicBlock *, MachineBasicBlock *> &Src2DstMBB) 167 const override; 168 169 bool isThumbFunction() const { return isThumb; } 170 bool isThumb1OnlyFunction() const { return isThumb && !hasThumb2; } 171 bool isThumb2Function() const { return isThumb && hasThumb2; } 172 173 bool isCmseNSEntryFunction() const { return IsCmseNSEntry; } 174 bool isCmseNSCallFunction() const { return IsCmseNSCall; } 175 176 unsigned getStoredByValParamsPadding() const { return StByValParamsPadding; } 177 void setStoredByValParamsPadding(unsigned p) { StByValParamsPadding = p; } 178 179 unsigned getArgRegsSaveSize() const { return ArgRegsSaveSize; } 180 void setArgRegsSaveSize(unsigned s) { ArgRegsSaveSize = s; } 181 182 unsigned getReturnRegsCount() const { return ReturnRegsCount; } 183 void setReturnRegsCount(unsigned s) { ReturnRegsCount = s; } 184 185 bool hasStackFrame() const { return HasStackFrame; } 186 void setHasStackFrame(bool s) { HasStackFrame = s; } 187 188 bool shouldRestoreSPFromFP() const { return RestoreSPFromFP; } 189 void setShouldRestoreSPFromFP(bool s) { RestoreSPFromFP = s; } 190 191 bool isLRSpilled() const { return LRSpilled; } 192 void setLRIsSpilled(bool s) { LRSpilled = s; } 193 194 unsigned getFramePtrSpillOffset() const { return FramePtrSpillOffset; } 195 void setFramePtrSpillOffset(unsigned o) { FramePtrSpillOffset = o; } 196 197 unsigned getNumAlignedDPRCS2Regs() const { return NumAlignedDPRCS2Regs; } 198 void setNumAlignedDPRCS2Regs(unsigned n) { NumAlignedDPRCS2Regs = n; } 199 200 unsigned getGPRCalleeSavedArea1Offset() const { return GPRCS1Offset; } 201 unsigned getGPRCalleeSavedArea2Offset() const { return GPRCS2Offset; } 202 unsigned getDPRCalleeSavedAreaOffset() const { return DPRCSOffset; } 203 204 void setGPRCalleeSavedArea1Offset(unsigned o) { GPRCS1Offset = o; } 205 void setGPRCalleeSavedArea2Offset(unsigned o) { GPRCS2Offset = o; } 206 void setDPRCalleeSavedAreaOffset(unsigned o) { DPRCSOffset = o; } 207 208 unsigned getFPCXTSaveAreaSize() const { return FPCXTSaveSize; } 209 unsigned getFrameRecordSavedAreaSize() const { return FRSaveSize; } 210 unsigned getGPRCalleeSavedArea1Size() const { return GPRCS1Size; } 211 unsigned getGPRCalleeSavedArea2Size() const { return GPRCS2Size; } 212 unsigned getDPRCalleeSavedGapSize() const { return DPRCSAlignGapSize; } 213 unsigned getDPRCalleeSavedAreaSize() const { return DPRCSSize; } 214 215 void setFPCXTSaveAreaSize(unsigned s) { FPCXTSaveSize = s; } 216 void setFrameRecordSavedAreaSize(unsigned s) { FRSaveSize = s; } 217 void setGPRCalleeSavedArea1Size(unsigned s) { GPRCS1Size = s; } 218 void setGPRCalleeSavedArea2Size(unsigned s) { GPRCS2Size = s; } 219 void setDPRCalleeSavedGapSize(unsigned s) { DPRCSAlignGapSize = s; } 220 void setDPRCalleeSavedAreaSize(unsigned s) { DPRCSSize = s; } 221 222 unsigned getArgumentStackSize() const { return ArgumentStackSize; } 223 void setArgumentStackSize(unsigned size) { ArgumentStackSize = size; } 224 225 unsigned getArgumentStackToRestore() const { return ArgumentStackToRestore; } 226 void setArgumentStackToRestore(unsigned v) { ArgumentStackToRestore = v; } 227 228 void initPICLabelUId(unsigned UId) { 229 PICLabelUId = UId; 230 } 231 232 unsigned getNumPICLabels() const { 233 return PICLabelUId; 234 } 235 236 unsigned createPICLabelUId() { 237 return PICLabelUId++; 238 } 239 240 int getVarArgsFrameIndex() const { return VarArgsFrameIndex; } 241 void setVarArgsFrameIndex(int Index) { VarArgsFrameIndex = Index; } 242 243 bool hasITBlocks() const { return HasITBlocks; } 244 void setHasITBlocks(bool h) { HasITBlocks = h; } 245 246 bool isSplitCSR() const { return IsSplitCSR; } 247 void setIsSplitCSR(bool s) { IsSplitCSR = s; } 248 249 void recordCPEClone(unsigned CPIdx, unsigned CPCloneIdx) { 250 if (!CPEClones.insert(std::make_pair(CPCloneIdx, CPIdx)).second) 251 llvm_unreachable("Duplicate entries!"); 252 } 253 254 unsigned getOriginalCPIdx(unsigned CloneIdx) const { 255 DenseMap<unsigned, unsigned>::const_iterator I = CPEClones.find(CloneIdx); 256 if (I != CPEClones.end()) 257 return I->second; 258 else 259 return -1U; 260 } 261 262 DenseMap<const MachineBasicBlock*, unsigned>::iterator getCoalescedWeight( 263 MachineBasicBlock* MBB) { 264 auto It = CoalescedWeights.find(MBB); 265 if (It == CoalescedWeights.end()) { 266 It = CoalescedWeights.insert(std::make_pair(MBB, 0)).first; 267 } 268 return It; 269 } 270 271 /// Indicate to the backend that \c GV has had its storage changed to inside 272 /// a constant pool. This means it no longer needs to be emitted as a 273 /// global variable. 274 void markGlobalAsPromotedToConstantPool(const GlobalVariable *GV) { 275 PromotedGlobals.insert(GV); 276 } 277 SmallPtrSet<const GlobalVariable*, 2>& getGlobalsPromotedToConstantPool() { 278 return PromotedGlobals; 279 } 280 int getPromotedConstpoolIncrease() const { 281 return PromotedGlobalsIncrease; 282 } 283 void setPromotedConstpoolIncrease(int Sz) { 284 PromotedGlobalsIncrease = Sz; 285 } 286 287 DenseMap<unsigned, unsigned> EHPrologueRemappedRegs; 288 DenseMap<unsigned, unsigned> EHPrologueOffsetInRegs; 289 290 void setPreservesR0() { PreservesR0 = true; } 291 bool getPreservesR0() const { return PreservesR0; } 292 293 bool shouldSignReturnAddress() const { 294 return shouldSignReturnAddress(LRSpilled); 295 } 296 297 bool shouldSignReturnAddress(bool SpillsLR) const { 298 if (!SignReturnAddress) 299 return false; 300 if (SignReturnAddressAll) 301 return true; 302 return SpillsLR; 303 } 304 305 bool branchTargetEnforcement() const { return BranchTargetEnforcement; } 306 }; 307 308 } // end namespace llvm 309 310 #endif // LLVM_LIB_TARGET_ARM_ARMMACHINEFUNCTIONINFO_H 311