1 //===- ARMTargetFrameLowering.h - Define frame lowering for ARM -*- C++ -*-===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 9 #ifndef LLVM_LIB_TARGET_ARM_ARMFRAMELOWERING_H 10 #define LLVM_LIB_TARGET_ARM_ARMFRAMELOWERING_H 11 12 #include "llvm/CodeGen/TargetFrameLowering.h" 13 #include "llvm/Support/TypeSize.h" 14 15 namespace llvm { 16 17 class ARMSubtarget; 18 class CalleeSavedInfo; 19 class MachineFunction; 20 21 class ARMFrameLowering : public TargetFrameLowering { 22 protected: 23 const ARMSubtarget &STI; 24 25 public: 26 explicit ARMFrameLowering(const ARMSubtarget &sti); 27 28 /// emitProlog/emitEpilog - These methods insert prolog and epilog code into 29 /// the function. 30 void emitPrologue(MachineFunction &MF, MachineBasicBlock &MBB) const override; 31 void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const override; 32 33 bool spillCalleeSavedRegisters(MachineBasicBlock &MBB, 34 MachineBasicBlock::iterator MI, 35 ArrayRef<CalleeSavedInfo> CSI, 36 const TargetRegisterInfo *TRI) const override; 37 38 bool 39 restoreCalleeSavedRegisters(MachineBasicBlock &MBB, 40 MachineBasicBlock::iterator MI, 41 MutableArrayRef<CalleeSavedInfo> CSI, 42 const TargetRegisterInfo *TRI) const override; 43 44 bool keepFramePointer(const MachineFunction &MF) const override; 45 46 bool enableCalleeSaveSkip(const MachineFunction &MF) const override; 47 48 bool hasFP(const MachineFunction &MF) const override; 49 bool isFPReserved(const MachineFunction &MF) const; 50 bool hasReservedCallFrame(const MachineFunction &MF) const override; 51 bool canSimplifyCallFramePseudos(const MachineFunction &MF) const override; 52 StackOffset getFrameIndexReference(const MachineFunction &MF, int FI, 53 Register &FrameReg) const override; 54 int ResolveFrameIndexReference(const MachineFunction &MF, int FI, 55 Register &FrameReg, int SPAdj) const; 56 57 void getCalleeSaves(const MachineFunction &MF, 58 BitVector &SavedRegs) const override; 59 void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs, 60 RegScavenger *RS) const override; 61 62 void adjustForSegmentedStacks(MachineFunction &MF, 63 MachineBasicBlock &MBB) const override; 64 65 /// Returns true if the target will correctly handle shrink wrapping. 66 bool enableShrinkWrapping(const MachineFunction &MF) const override; 67 68 bool isProfitableForNoCSROpt(const Function &F) const override { 69 // The no-CSR optimisation is bad for code size on ARM, because we can save 70 // many registers with a single PUSH/POP pair. 71 return false; 72 } 73 74 bool 75 assignCalleeSavedSpillSlots(MachineFunction &MF, 76 const TargetRegisterInfo *TRI, 77 std::vector<CalleeSavedInfo> &CSI) const override; 78 79 const SpillSlot * 80 getCalleeSavedSpillSlots(unsigned &NumEntries) const override; 81 82 private: 83 void emitPushInst(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, 84 ArrayRef<CalleeSavedInfo> CSI, unsigned StmOpc, 85 unsigned StrOpc, bool NoGap, bool (*Func)(unsigned, bool), 86 unsigned NumAlignedDPRCS2Regs, unsigned MIFlags = 0) const; 87 void emitPopInst(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, 88 MutableArrayRef<CalleeSavedInfo> CSI, unsigned LdmOpc, 89 unsigned LdrOpc, bool isVarArg, bool NoGap, 90 bool (*Func)(unsigned, bool), 91 unsigned NumAlignedDPRCS2Regs) const; 92 93 MachineBasicBlock::iterator 94 eliminateCallFramePseudoInstr(MachineFunction &MF, 95 MachineBasicBlock &MBB, 96 MachineBasicBlock::iterator MI) const override; 97 }; 98 99 } // end namespace llvm 100 101 #endif // LLVM_LIB_TARGET_ARM_ARMFRAMELOWERING_H 102