xref: /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ARMBasicBlockInfo.h (revision 06c3fb2749bda94cb5201f81ffdb8fa6c3161b2e)
10b57cec5SDimitry Andric //===-- ARMBasicBlockInfo.h - Basic Block Information -----------*- C++ -*-===//
20b57cec5SDimitry Andric //
30b57cec5SDimitry Andric // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
40b57cec5SDimitry Andric // See https://llvm.org/LICENSE.txt for license information.
50b57cec5SDimitry Andric // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
60b57cec5SDimitry Andric //
70b57cec5SDimitry Andric //===----------------------------------------------------------------------===//
80b57cec5SDimitry Andric //
90b57cec5SDimitry Andric // Utility functions and data structure for computing block size.
100b57cec5SDimitry Andric //
110b57cec5SDimitry Andric //===----------------------------------------------------------------------===//
120b57cec5SDimitry Andric 
130b57cec5SDimitry Andric #ifndef LLVM_LIB_TARGET_ARM_ARMBASICBLOCKINFO_H
140b57cec5SDimitry Andric #define LLVM_LIB_TARGET_ARM_ARMBASICBLOCKINFO_H
150b57cec5SDimitry Andric 
160b57cec5SDimitry Andric #include "ARMBaseInstrInfo.h"
170b57cec5SDimitry Andric #include "ARMMachineFunctionInfo.h"
180b57cec5SDimitry Andric #include "llvm/Support/MathExtras.h"
190b57cec5SDimitry Andric #include <algorithm>
200b57cec5SDimitry Andric #include <cstdint>
210b57cec5SDimitry Andric 
220b57cec5SDimitry Andric namespace llvm {
230b57cec5SDimitry Andric 
248bcb0991SDimitry Andric struct BasicBlockInfo;
250b57cec5SDimitry Andric using BBInfoVector = SmallVectorImpl<BasicBlockInfo>;
260b57cec5SDimitry Andric 
270b57cec5SDimitry Andric /// UnknownPadding - Return the worst case padding that could result from
280b57cec5SDimitry Andric /// unknown offset bits.  This does not include alignment padding caused by
290b57cec5SDimitry Andric /// known offset bits.
300b57cec5SDimitry Andric ///
318bcb0991SDimitry Andric /// @param Alignment alignment
320b57cec5SDimitry Andric /// @param KnownBits Number of known low offset bits.
UnknownPadding(Align Alignment,unsigned KnownBits)338bcb0991SDimitry Andric inline unsigned UnknownPadding(Align Alignment, unsigned KnownBits) {
348bcb0991SDimitry Andric   if (KnownBits < Log2(Alignment))
358bcb0991SDimitry Andric     return Alignment.value() - (1ull << KnownBits);
360b57cec5SDimitry Andric   return 0;
370b57cec5SDimitry Andric }
380b57cec5SDimitry Andric 
390b57cec5SDimitry Andric /// BasicBlockInfo - Information about the offset and size of a single
400b57cec5SDimitry Andric /// basic block.
410b57cec5SDimitry Andric struct BasicBlockInfo {
420b57cec5SDimitry Andric   /// Offset - Distance from the beginning of the function to the beginning
430b57cec5SDimitry Andric   /// of this basic block.
440b57cec5SDimitry Andric   ///
450b57cec5SDimitry Andric   /// Offsets are computed assuming worst case padding before an aligned
460b57cec5SDimitry Andric   /// block. This means that subtracting basic block offsets always gives a
470b57cec5SDimitry Andric   /// conservative estimate of the real distance which may be smaller.
480b57cec5SDimitry Andric   ///
490b57cec5SDimitry Andric   /// Because worst case padding is used, the computed offset of an aligned
500b57cec5SDimitry Andric   /// block may not actually be aligned.
510b57cec5SDimitry Andric   unsigned Offset = 0;
520b57cec5SDimitry Andric 
530b57cec5SDimitry Andric   /// Size - Size of the basic block in bytes.  If the block contains
540b57cec5SDimitry Andric   /// inline assembly, this is a worst case estimate.
550b57cec5SDimitry Andric   ///
560b57cec5SDimitry Andric   /// The size does not include any alignment padding whether from the
570b57cec5SDimitry Andric   /// beginning of the block, or from an aligned jump table at the end.
580b57cec5SDimitry Andric   unsigned Size = 0;
590b57cec5SDimitry Andric 
600b57cec5SDimitry Andric   /// KnownBits - The number of low bits in Offset that are known to be
610b57cec5SDimitry Andric   /// exact.  The remaining bits of Offset are an upper bound.
620b57cec5SDimitry Andric   uint8_t KnownBits = 0;
630b57cec5SDimitry Andric 
640b57cec5SDimitry Andric   /// Unalign - When non-zero, the block contains instructions (inline asm)
650b57cec5SDimitry Andric   /// of unknown size.  The real size may be smaller than Size bytes by a
660b57cec5SDimitry Andric   /// multiple of 1 << Unalign.
670b57cec5SDimitry Andric   uint8_t Unalign = 0;
680b57cec5SDimitry Andric 
698bcb0991SDimitry Andric   /// PostAlign - When > 1, the block terminator contains a .align
708bcb0991SDimitry Andric   /// directive, so the end of the block is aligned to PostAlign bytes.
718bcb0991SDimitry Andric   Align PostAlign;
720b57cec5SDimitry Andric 
730b57cec5SDimitry Andric   BasicBlockInfo() = default;
740b57cec5SDimitry Andric 
750b57cec5SDimitry Andric   /// Compute the number of known offset bits internally to this block.
760b57cec5SDimitry Andric   /// This number should be used to predict worst case padding when
770b57cec5SDimitry Andric   /// splitting the block.
internalKnownBitsBasicBlockInfo780b57cec5SDimitry Andric   unsigned internalKnownBits() const {
790b57cec5SDimitry Andric     unsigned Bits = Unalign ? Unalign : KnownBits;
800b57cec5SDimitry Andric     // If the block size isn't a multiple of the known bits, assume the
810b57cec5SDimitry Andric     // worst case padding.
820b57cec5SDimitry Andric     if (Size & ((1u << Bits) - 1))
83*06c3fb27SDimitry Andric       Bits = llvm::countr_zero(Size);
840b57cec5SDimitry Andric     return Bits;
850b57cec5SDimitry Andric   }
860b57cec5SDimitry Andric 
878bcb0991SDimitry Andric   /// Compute the offset immediately following this block.  If Align is
880b57cec5SDimitry Andric   /// specified, return the offset the successor block will get if it has
890b57cec5SDimitry Andric   /// this alignment.
905ffd83dbSDimitry Andric   unsigned postOffset(Align Alignment = Align(1)) const {
910b57cec5SDimitry Andric     unsigned PO = Offset + Size;
928bcb0991SDimitry Andric     const Align PA = std::max(PostAlign, Alignment);
935ffd83dbSDimitry Andric     if (PA == Align(1))
940b57cec5SDimitry Andric       return PO;
950b57cec5SDimitry Andric     // Add alignment padding from the terminator.
968bcb0991SDimitry Andric     return PO + UnknownPadding(PA, internalKnownBits());
970b57cec5SDimitry Andric   }
980b57cec5SDimitry Andric 
990b57cec5SDimitry Andric   /// Compute the number of known low bits of postOffset.  If this block
1000b57cec5SDimitry Andric   /// contains inline asm, the number of known bits drops to the
1010b57cec5SDimitry Andric   /// instruction alignment.  An aligned terminator may increase the number
1020b57cec5SDimitry Andric   /// of know bits.
1030b57cec5SDimitry Andric   /// If LogAlign is given, also consider the alignment of the next block.
1045ffd83dbSDimitry Andric   unsigned postKnownBits(Align Align = llvm::Align(1)) const {
1058bcb0991SDimitry Andric     return std::max(Log2(std::max(PostAlign, Align)), internalKnownBits());
1060b57cec5SDimitry Andric   }
1070b57cec5SDimitry Andric };
1080b57cec5SDimitry Andric 
1090b57cec5SDimitry Andric class ARMBasicBlockUtils {
1100b57cec5SDimitry Andric 
1110b57cec5SDimitry Andric private:
1120b57cec5SDimitry Andric   MachineFunction &MF;
1130b57cec5SDimitry Andric   bool isThumb = false;
1140b57cec5SDimitry Andric   const ARMBaseInstrInfo *TII = nullptr;
1150b57cec5SDimitry Andric   SmallVector<BasicBlockInfo, 8> BBInfo;
1160b57cec5SDimitry Andric 
1170b57cec5SDimitry Andric public:
ARMBasicBlockUtils(MachineFunction & MF)1180b57cec5SDimitry Andric   ARMBasicBlockUtils(MachineFunction &MF) : MF(MF) {
1190b57cec5SDimitry Andric     TII =
1200b57cec5SDimitry Andric       static_cast<const ARMBaseInstrInfo*>(MF.getSubtarget().getInstrInfo());
1210b57cec5SDimitry Andric     isThumb = MF.getInfo<ARMFunctionInfo>()->isThumbFunction();
1220b57cec5SDimitry Andric   }
1230b57cec5SDimitry Andric 
computeAllBlockSizes()1240b57cec5SDimitry Andric   void computeAllBlockSizes() {
1250b57cec5SDimitry Andric     BBInfo.resize(MF.getNumBlockIDs());
1260b57cec5SDimitry Andric     for (MachineBasicBlock &MBB : MF)
1270b57cec5SDimitry Andric       computeBlockSize(&MBB);
1280b57cec5SDimitry Andric   }
1290b57cec5SDimitry Andric 
1300b57cec5SDimitry Andric   void computeBlockSize(MachineBasicBlock *MBB);
1310b57cec5SDimitry Andric 
1320b57cec5SDimitry Andric   unsigned getOffsetOf(MachineInstr *MI) const;
1330b57cec5SDimitry Andric 
getOffsetOf(MachineBasicBlock * MBB)1340b57cec5SDimitry Andric   unsigned getOffsetOf(MachineBasicBlock *MBB) const {
1350b57cec5SDimitry Andric     return BBInfo[MBB->getNumber()].Offset;
1360b57cec5SDimitry Andric   }
1370b57cec5SDimitry Andric 
1380b57cec5SDimitry Andric   void adjustBBOffsetsAfter(MachineBasicBlock *MBB);
1390b57cec5SDimitry Andric 
adjustBBSize(MachineBasicBlock * MBB,int Size)1400b57cec5SDimitry Andric   void adjustBBSize(MachineBasicBlock *MBB, int Size) {
1410b57cec5SDimitry Andric     BBInfo[MBB->getNumber()].Size += Size;
1420b57cec5SDimitry Andric   }
1430b57cec5SDimitry Andric 
1440b57cec5SDimitry Andric   bool isBBInRange(MachineInstr *MI, MachineBasicBlock *DestBB,
1450b57cec5SDimitry Andric                    unsigned MaxDisp) const;
1460b57cec5SDimitry Andric 
insert(unsigned BBNum,BasicBlockInfo BBI)1470b57cec5SDimitry Andric   void insert(unsigned BBNum, BasicBlockInfo BBI) {
1480b57cec5SDimitry Andric     BBInfo.insert(BBInfo.begin() + BBNum, BBI);
1490b57cec5SDimitry Andric   }
1500b57cec5SDimitry Andric 
clear()1510b57cec5SDimitry Andric   void clear() { BBInfo.clear(); }
1520b57cec5SDimitry Andric 
getBBInfo()1530b57cec5SDimitry Andric   BBInfoVector &getBBInfo() { return BBInfo; }
1540b57cec5SDimitry Andric 
1550b57cec5SDimitry Andric };
1560b57cec5SDimitry Andric 
1570b57cec5SDimitry Andric } // end namespace llvm
1580b57cec5SDimitry Andric 
1590b57cec5SDimitry Andric #endif // LLVM_LIB_TARGET_ARM_ARMBASICBLOCKINFO_H
160