xref: /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ARM.td (revision 833a452e9f082a7982a31c21f0da437dbbe0a39d) 
1//===-- ARM.td - Describe the ARM Target Machine -----------*- tablegen -*-===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9//
10//===----------------------------------------------------------------------===//
11
12//===----------------------------------------------------------------------===//
13// Target-independent interfaces which we are implementing
14//===----------------------------------------------------------------------===//
15
16include "llvm/Target/Target.td"
17
18//===----------------------------------------------------------------------===//
19// ARM Subtarget state.
20//
21
22def ModeThumb             : SubtargetFeature<"thumb-mode", "InThumbMode",
23                                             "true", "Thumb mode">;
24
25def ModeSoftFloat         : SubtargetFeature<"soft-float","UseSoftFloat",
26                                             "true", "Use software floating "
27                                             "point features.">;
28
29
30//===----------------------------------------------------------------------===//
31// ARM Subtarget features.
32//
33
34// Floating Point, HW Division and Neon Support
35
36// FP loads/stores/moves, shared between VFP and MVE (even in the integer-only
37// version).
38def FeatureFPRegs         : SubtargetFeature<"fpregs", "HasFPRegs", "true",
39                                             "Enable FP registers">;
40
41// 16-bit FP loads/stores/moves, shared between VFP (with the v8.2A FP16
42// extension) and MVE (even in the integer-only version).
43def FeatureFPRegs16       : SubtargetFeature<"fpregs16", "HasFPRegs16", "true",
44                                             "Enable 16-bit FP registers",
45                                             [FeatureFPRegs]>;
46
47def FeatureFPRegs64       : SubtargetFeature<"fpregs64", "HasFPRegs64", "true",
48                                             "Enable 64-bit FP registers",
49                                             [FeatureFPRegs]>;
50
51def FeatureFP64           : SubtargetFeature<"fp64", "HasFP64", "true",
52                                             "Floating point unit supports "
53                                             "double precision",
54                                             [FeatureFPRegs64]>;
55
56def FeatureD32            : SubtargetFeature<"d32", "HasD32", "true",
57                                             "Extend FP to 32 double registers">;
58
59multiclass VFPver<string name, string query, string description,
60                  list<SubtargetFeature> prev,
61                  list<SubtargetFeature> otherimplies,
62                  list<SubtargetFeature> vfp2prev = []> {
63  def _D16_SP: SubtargetFeature<
64    name#"d16sp", query#"D16SP", "true",
65    description#" with only 16 d-registers and no double precision",
66    !foreach(v, prev, !cast<SubtargetFeature>(v # "_D16_SP")) #
67      !foreach(v, vfp2prev, !cast<SubtargetFeature>(v # "_SP")) #
68      otherimplies>;
69  def _SP: SubtargetFeature<
70    name#"sp", query#"SP", "true",
71    description#" with no double precision",
72    !foreach(v, prev, !cast<SubtargetFeature>(v # "_SP")) #
73      otherimplies # [FeatureD32, !cast<SubtargetFeature>(NAME # "_D16_SP")]>;
74  def _D16: SubtargetFeature<
75    name#"d16", query#"D16", "true",
76    description#" with only 16 d-registers",
77    !foreach(v, prev, !cast<SubtargetFeature>(v # "_D16")) #
78      vfp2prev #
79      otherimplies # [FeatureFP64, !cast<SubtargetFeature>(NAME # "_D16_SP")]>;
80  def "": SubtargetFeature<
81    name, query, "true", description,
82    prev # otherimplies # [
83        !cast<SubtargetFeature>(NAME # "_D16"),
84        !cast<SubtargetFeature>(NAME # "_SP")]>;
85}
86
87def FeatureVFP2_SP        : SubtargetFeature<"vfp2sp", "HasVFPv2SP", "true",
88                                             "Enable VFP2 instructions with "
89                                             "no double precision",
90                                             [FeatureFPRegs]>;
91
92def FeatureVFP2           : SubtargetFeature<"vfp2", "HasVFPv2", "true",
93                                             "Enable VFP2 instructions",
94                                             [FeatureFP64, FeatureVFP2_SP]>;
95
96defm FeatureVFP3: VFPver<"vfp3", "HasVFPv3", "Enable VFP3 instructions",
97                         [], [], [FeatureVFP2]>;
98
99def FeatureNEON           : SubtargetFeature<"neon", "HasNEON", "true",
100                                             "Enable NEON instructions",
101                                             [FeatureVFP3]>;
102
103def FeatureFP16           : SubtargetFeature<"fp16", "HasFP16", "true",
104                                             "Enable half-precision "
105                                             "floating point">;
106
107defm FeatureVFP4: VFPver<"vfp4", "HasVFPv4", "Enable VFP4 instructions",
108                         [FeatureVFP3], [FeatureFP16]>;
109
110defm FeatureFPARMv8: VFPver<"fp-armv8", "HasFPARMv8", "Enable ARMv8 FP",
111                         [FeatureVFP4], []>;
112
113def FeatureFullFP16       : SubtargetFeature<"fullfp16", "HasFullFP16", "true",
114                                             "Enable full half-precision "
115                                             "floating point",
116                                             [FeatureFPARMv8_D16_SP, FeatureFPRegs16]>;
117
118def FeatureFP16FML        : SubtargetFeature<"fp16fml", "HasFP16FML", "true",
119                                             "Enable full half-precision "
120                                             "floating point fml instructions",
121                                             [FeatureFullFP16]>;
122
123def FeatureHWDivThumb     : SubtargetFeature<"hwdiv",
124                                             "HasHardwareDivideInThumb", "true",
125                                             "Enable divide instructions in Thumb">;
126
127def FeatureHWDivARM       : SubtargetFeature<"hwdiv-arm",
128                                             "HasHardwareDivideInARM", "true",
129                                             "Enable divide instructions in ARM mode">;
130
131// Atomic Support
132def FeatureDB             : SubtargetFeature<"db", "HasDataBarrier", "true",
133                                             "Has data barrier (dmb/dsb) instructions">;
134
135def FeatureV7Clrex        : SubtargetFeature<"v7clrex", "HasV7Clrex", "true",
136                                             "Has v7 clrex instruction">;
137
138def FeatureDFB  : SubtargetFeature<"dfb", "HasFullDataBarrier", "true",
139                                   "Has full data barrier (dfb) instruction">;
140
141def FeatureAcquireRelease : SubtargetFeature<"acquire-release",
142                                             "HasAcquireRelease", "true",
143                                             "Has v8 acquire/release (lda/ldaex "
144                                             " etc) instructions">;
145
146
147def FeatureSlowFPBrcc     : SubtargetFeature<"slow-fp-brcc", "SlowFPBrcc", "true",
148                                             "FP compare + branch is slow">;
149
150def FeaturePerfMon        : SubtargetFeature<"perfmon", "HasPerfMon", "true",
151                                             "Enable support for Performance "
152                                             "Monitor extensions">;
153
154
155// TrustZone Security Extensions
156def FeatureTrustZone      : SubtargetFeature<"trustzone", "HasTrustZone", "true",
157                                             "Enable support for TrustZone "
158                                             "security extensions">;
159
160def Feature8MSecExt       : SubtargetFeature<"8msecext", "Has8MSecExt", "true",
161                                             "Enable support for ARMv8-M "
162                                             "Security Extensions">;
163
164def FeatureSHA2           : SubtargetFeature<"sha2", "HasSHA2", "true",
165                                             "Enable SHA1 and SHA256 support", [FeatureNEON]>;
166
167def FeatureAES            : SubtargetFeature<"aes", "HasAES", "true",
168                                             "Enable AES support", [FeatureNEON]>;
169
170def FeatureCrypto         : SubtargetFeature<"crypto", "HasCrypto", "true",
171                                             "Enable support for "
172                                             "Cryptography extensions",
173                                             [FeatureNEON, FeatureSHA2, FeatureAES]>;
174
175def FeatureCRC            : SubtargetFeature<"crc", "HasCRC", "true",
176                                             "Enable support for CRC instructions">;
177
178def FeatureDotProd        : SubtargetFeature<"dotprod", "HasDotProd", "true",
179                                             "Enable support for dot product instructions",
180                                             [FeatureNEON]>;
181
182// Not to be confused with FeatureHasRetAddrStack (return address stack)
183def FeatureRAS            : SubtargetFeature<"ras", "HasRAS", "true",
184                                             "Enable Reliability, Availability "
185                                             "and Serviceability extensions">;
186
187// Fast computation of non-negative address offsets
188def FeatureFPAO           : SubtargetFeature<"fpao", "HasFPAO", "true",
189                                             "Enable fast computation of "
190                                             "positive address offsets">;
191
192// Fast execution of AES crypto operations
193def FeatureFuseAES        : SubtargetFeature<"fuse-aes", "HasFuseAES", "true",
194                                             "CPU fuses AES crypto operations">;
195
196// Fast execution of bottom and top halves of literal generation
197def FeatureFuseLiterals   : SubtargetFeature<"fuse-literals", "HasFuseLiterals", "true",
198                                             "CPU fuses literal generation operations">;
199
200// The way of reading thread pointer
201def FeatureReadTp :  SubtargetFeature<"read-tp-hard", "ReadTPHard", "true",
202                                      "Reading thread pointer from register">;
203
204// Cyclone can zero VFP registers in 0 cycles.
205def FeatureZCZeroing      : SubtargetFeature<"zcz", "HasZeroCycleZeroing", "true",
206                                             "Has zero-cycle zeroing instructions">;
207
208// Whether it is profitable to unpredicate certain instructions during if-conversion
209def FeatureProfUnpredicate : SubtargetFeature<"prof-unpr",
210                                              "IsProfitableToUnpredicate", "true",
211                                              "Is profitable to unpredicate">;
212
213// Some targets (e.g. Swift) have microcoded VGETLNi32.
214def FeatureSlowVGETLNi32  : SubtargetFeature<"slow-vgetlni32",
215                                             "HasSlowVGETLNi32", "true",
216                                             "Has slow VGETLNi32 - prefer VMOV">;
217
218// Some targets (e.g. Swift) have microcoded VDUP32.
219def FeatureSlowVDUP32     : SubtargetFeature<"slow-vdup32", "HasSlowVDUP32",
220                                             "true",
221                                             "Has slow VDUP32 - prefer VMOV">;
222
223// Some targets (e.g. Cortex-A9) prefer VMOVSR to VMOVDRR even when using NEON
224// for scalar FP, as this allows more effective execution domain optimization.
225def FeaturePreferVMOVSR   : SubtargetFeature<"prefer-vmovsr", "PreferVMOVSR",
226                                             "true", "Prefer VMOVSR">;
227
228// Swift has ISHST barriers compatible with Atomic Release semantics but weaker
229// than ISH
230def FeaturePrefISHSTBarrier : SubtargetFeature<"prefer-ishst", "PreferISHST",
231                                               "true", "Prefer ISHST barriers">;
232
233// Some targets (e.g. Cortex-A9) have muxed AGU and NEON/FPU.
234def FeatureMuxedUnits     : SubtargetFeature<"muxed-units", "HasMuxedUnits",
235                                             "true",
236                                             "Has muxed AGU and NEON/FPU">;
237
238// Whether VLDM/VSTM starting with odd register number need more microops
239// than single VLDRS
240def FeatureSlowOddRegister : SubtargetFeature<"slow-odd-reg", "SlowOddRegister",
241                                              "true", "VLDM/VSTM starting "
242                                              "with an odd register is slow">;
243
244// Some targets have a renaming dependency when loading into D subregisters.
245def FeatureSlowLoadDSubreg : SubtargetFeature<"slow-load-D-subreg",
246                                              "SlowLoadDSubregister", "true",
247                                              "Loading into D subregs is slow">;
248
249def FeatureUseWideStrideVFP : SubtargetFeature<"wide-stride-vfp",
250                                               "UseWideStrideVFP", "true",
251                                               "Use a wide stride when allocating VFP registers">;
252
253// Some targets (e.g. Cortex-A15) never want VMOVS to be widened to VMOVD.
254def FeatureDontWidenVMOVS : SubtargetFeature<"dont-widen-vmovs",
255                                             "DontWidenVMOVS", "true",
256                                             "Don't widen VMOVS to VMOVD">;
257
258// Some targets (e.g. Cortex-A15) prefer to avoid mixing operations on different
259// VFP register widths.
260def FeatureSplatVFPToNeon : SubtargetFeature<"splat-vfp-neon",
261                                             "SplatVFPToNeon", "true",
262                                             "Splat register from VFP to NEON",
263                                             [FeatureDontWidenVMOVS]>;
264
265// Whether or not it is profitable to expand VFP/NEON MLA/MLS instructions.
266def FeatureExpandMLx      : SubtargetFeature<"expand-fp-mlx",
267                                             "ExpandMLx", "true",
268                                             "Expand VFP/NEON MLA/MLS instructions">;
269
270// Some targets have special RAW hazards for VFP/NEON VMLA/VMLS.
271def FeatureHasVMLxHazards : SubtargetFeature<"vmlx-hazards", "HasVMLxHazards",
272                                             "true", "Has VMLx hazards">;
273
274// Some targets (e.g. Cortex-A9) want to convert VMOVRS, VMOVSR and VMOVS from
275// VFP to NEON, as an execution domain optimization.
276def FeatureNEONForFPMovs  : SubtargetFeature<"neon-fpmovs",
277                                             "UseNEONForFPMovs", "true",
278                                             "Convert VMOVSR, VMOVRS, "
279                                             "VMOVS to NEON">;
280
281// Some processors benefit from using NEON instructions for scalar
282// single-precision FP operations. This affects instruction selection and should
283// only be enabled if the handling of denormals is not important.
284def FeatureNEONForFP      : SubtargetFeature<"neonfp",
285                                             "UseNEONForSinglePrecisionFP",
286                                             "true",
287                                             "Use NEON for single precision FP">;
288
289// On some processors, VLDn instructions that access unaligned data take one
290// extra cycle. Take that into account when computing operand latencies.
291def FeatureCheckVLDnAlign : SubtargetFeature<"vldn-align", "CheckVLDnAlign",
292                                             "true",
293                                             "Check for VLDn unaligned access">;
294
295// Some processors have a nonpipelined VFP coprocessor.
296def FeatureNonpipelinedVFP : SubtargetFeature<"nonpipelined-vfp",
297                                              "NonpipelinedVFP", "true",
298                                              "VFP instructions are not pipelined">;
299
300// Some processors have FP multiply-accumulate instructions that don't
301// play nicely with other VFP / NEON instructions, and it's generally better
302// to just not use them.
303def FeatureHasSlowFPVMLx  : SubtargetFeature<"slowfpvmlx", "SlowFPVMLx", "true",
304                                             "Disable VFP / NEON MAC instructions">;
305
306// VFPv4 added VFMA instructions that can similar be fast or slow.
307def FeatureHasSlowFPVFMx  : SubtargetFeature<"slowfpvfmx", "SlowFPVFMx", "true",
308                                             "Disable VFP / NEON FMA instructions">;
309
310// Cortex-A8 / A9 Advanced SIMD has multiplier accumulator forwarding.
311def FeatureVMLxForwarding : SubtargetFeature<"vmlx-forwarding",
312                                             "HasVMLxForwarding", "true",
313                                             "Has multiplier accumulator forwarding">;
314
315// Disable 32-bit to 16-bit narrowing for experimentation.
316def FeaturePref32BitThumb : SubtargetFeature<"32bit", "Pref32BitThumb", "true",
317                                             "Prefer 32-bit Thumb instrs">;
318
319def FeaturePrefLoopAlign32 : SubtargetFeature<"loop-align", "PrefLoopLogAlignment","2",
320                                              "Prefer 32-bit alignment for loops">;
321
322def FeatureMVEVectorCostFactor1 : SubtargetFeature<"mve1beat", "MVEVectorCostFactor", "1",
323                        "Model MVE instructions as a 1 beat per tick architecture">;
324
325def FeatureMVEVectorCostFactor2 : SubtargetFeature<"mve2beat", "MVEVectorCostFactor", "2",
326                        "Model MVE instructions as a 2 beats per tick architecture">;
327
328def FeatureMVEVectorCostFactor4 : SubtargetFeature<"mve4beat", "MVEVectorCostFactor", "4",
329                        "Model MVE instructions as a 4 beats per tick architecture">;
330
331/// Some instructions update CPSR partially, which can add false dependency for
332/// out-of-order implementation, e.g. Cortex-A9, unless each individual bit is
333/// mapped to a separate physical register. Avoid partial CPSR update for these
334/// processors.
335def FeatureAvoidPartialCPSR : SubtargetFeature<"avoid-partial-cpsr",
336                                               "AvoidCPSRPartialUpdate", "true",
337                                 "Avoid CPSR partial update for OOO execution">;
338
339/// Disable +1 predication cost for instructions updating CPSR.
340/// Enabled for Cortex-A57.
341def FeatureCheapPredicableCPSR : SubtargetFeature<"cheap-predicable-cpsr",
342                                                  "CheapPredicableCPSRDef",
343                                                  "true",
344                  "Disable +1 predication cost for instructions updating CPSR">;
345
346def FeatureAvoidMOVsShOp  : SubtargetFeature<"avoid-movs-shop",
347                                             "AvoidMOVsShifterOperand", "true",
348                                             "Avoid movs instructions with "
349                                             "shifter operand">;
350
351// Some processors perform return stack prediction. CodeGen should avoid issue
352// "normal" call instructions to callees which do not return.
353def FeatureHasRetAddrStack : SubtargetFeature<"ret-addr-stack",
354                                              "HasRetAddrStack", "true",
355                                              "Has return address stack">;
356
357// Some processors have no branch predictor, which changes the expected cost of
358// taking a branch which affects the choice of whether to use predicated
359// instructions.
360def FeatureHasNoBranchPredictor : SubtargetFeature<"no-branch-predictor",
361                                                   "HasBranchPredictor", "false",
362                                                   "Has no branch predictor">;
363
364/// DSP extension.
365def FeatureDSP            : SubtargetFeature<"dsp", "HasDSP", "true",
366                                             "Supports DSP instructions in "
367                                             "ARM and/or Thumb2">;
368
369// Multiprocessing extension.
370def FeatureMP             : SubtargetFeature<"mp", "HasMPExtension", "true",
371                                        "Supports Multiprocessing extension">;
372
373// Virtualization extension - requires HW divide (ARMv7-AR ARMARM - 4.4.8).
374def FeatureVirtualization : SubtargetFeature<"virtualization",
375                                             "HasVirtualization", "true",
376                                             "Supports Virtualization extension",
377                                             [FeatureHWDivThumb, FeatureHWDivARM]>;
378
379// Special TRAP encoding for NaCl, which looks like a TRAP in Thumb too.
380// See ARMInstrInfo.td for details.
381def FeatureNaClTrap       : SubtargetFeature<"nacl-trap", "UseNaClTrap", "true",
382                                             "NaCl trap">;
383
384def FeatureStrictAlign    : SubtargetFeature<"strict-align",
385                                             "StrictAlign", "true",
386                                             "Disallow all unaligned memory "
387                                             "access">;
388
389def FeatureLongCalls      : SubtargetFeature<"long-calls", "GenLongCalls", "true",
390                                             "Generate calls via indirect call "
391                                             "instructions">;
392
393def FeatureExecuteOnly    : SubtargetFeature<"execute-only",
394                                             "GenExecuteOnly", "true",
395                                             "Enable the generation of "
396                                             "execute only code.">;
397
398def FeatureReserveR9      : SubtargetFeature<"reserve-r9", "ReserveR9", "true",
399                                             "Reserve R9, making it unavailable"
400                                             " as GPR">;
401
402def FeatureNoMovt         : SubtargetFeature<"no-movt", "NoMovt", "true",
403                                             "Don't use movt/movw pairs for "
404                                             "32-bit imms">;
405
406def FeatureNoNegativeImmediates
407                          : SubtargetFeature<"no-neg-immediates",
408                                             "NegativeImmediates", "false",
409                                             "Convert immediates and instructions "
410                                             "to their negated or complemented "
411                                             "equivalent when the immediate does "
412                                             "not fit in the encoding.">;
413
414// Use the MachineScheduler for instruction scheduling for the subtarget.
415def FeatureUseMISched: SubtargetFeature<"use-misched", "UseMISched", "true",
416                                        "Use the MachineScheduler">;
417
418def FeatureNoPostRASched : SubtargetFeature<"disable-postra-scheduler",
419    "DisablePostRAScheduler", "true",
420    "Don't schedule again after register allocation">;
421
422// Armv8.5-A extensions
423
424def FeatureSB       : SubtargetFeature<"sb", "HasSB", "true",
425  "Enable v8.5a Speculation Barrier" >;
426
427// Armv8.6-A extensions
428def FeatureBF16     : SubtargetFeature<"bf16", "HasBF16", "true",
429  "Enable support for BFloat16 instructions",  [FeatureNEON]>;
430
431def FeatureMatMulInt8 : SubtargetFeature<"i8mm", "HasMatMulInt8",
432    "true", "Enable Matrix Multiply Int8 Extension", [FeatureNEON]>;
433
434// Armv8.1-M extensions
435
436def FeatureLOB            : SubtargetFeature<"lob", "HasLOB", "true",
437                                             "Enable Low Overhead Branch "
438                                             "extensions">;
439
440//===----------------------------------------------------------------------===//
441// ARM architecture class
442//
443
444// A-series ISA
445def FeatureAClass : SubtargetFeature<"aclass", "ARMProcClass", "AClass",
446                                     "Is application profile ('A' series)">;
447
448// R-series ISA
449def FeatureRClass : SubtargetFeature<"rclass", "ARMProcClass", "RClass",
450                                     "Is realtime profile ('R' series)">;
451
452// M-series ISA
453def FeatureMClass : SubtargetFeature<"mclass", "ARMProcClass", "MClass",
454                                     "Is microcontroller profile ('M' series)">;
455
456
457def FeatureThumb2 : SubtargetFeature<"thumb2", "HasThumb2", "true",
458                                     "Enable Thumb2 instructions">;
459
460def FeatureNoARM  : SubtargetFeature<"noarm", "NoARM", "true",
461                                     "Does not support ARM mode execution">;
462
463//===----------------------------------------------------------------------===//
464// ARM ISAa.
465//
466
467def HasV4TOps   : SubtargetFeature<"v4t", "HasV4TOps", "true",
468                                   "Support ARM v4T instructions">;
469
470def HasV5TOps   : SubtargetFeature<"v5t", "HasV5TOps", "true",
471                                   "Support ARM v5T instructions",
472                                   [HasV4TOps]>;
473
474def HasV5TEOps  : SubtargetFeature<"v5te", "HasV5TEOps", "true",
475                                   "Support ARM v5TE, v5TEj, and "
476                                   "v5TExp instructions",
477                                   [HasV5TOps]>;
478
479def HasV6Ops    : SubtargetFeature<"v6", "HasV6Ops", "true",
480                                   "Support ARM v6 instructions",
481                                   [HasV5TEOps]>;
482
483def HasV6MOps   : SubtargetFeature<"v6m", "HasV6MOps", "true",
484                                   "Support ARM v6M instructions",
485                                   [HasV6Ops]>;
486
487def HasV8MBaselineOps : SubtargetFeature<"v8m", "HasV8MBaselineOps", "true",
488                                         "Support ARM v8M Baseline instructions",
489                                         [HasV6MOps]>;
490
491def HasV6KOps   : SubtargetFeature<"v6k", "HasV6KOps", "true",
492                                   "Support ARM v6k instructions",
493                                   [HasV6Ops]>;
494
495def HasV6T2Ops  : SubtargetFeature<"v6t2", "HasV6T2Ops", "true",
496                                   "Support ARM v6t2 instructions",
497                                   [HasV8MBaselineOps, HasV6KOps, FeatureThumb2]>;
498
499def HasV7Ops    : SubtargetFeature<"v7", "HasV7Ops", "true",
500                                   "Support ARM v7 instructions",
501                                   [HasV6T2Ops, FeaturePerfMon,
502                                    FeatureV7Clrex]>;
503
504def HasV8MMainlineOps :
505                  SubtargetFeature<"v8m.main", "HasV8MMainlineOps", "true",
506                                   "Support ARM v8M Mainline instructions",
507                                   [HasV7Ops]>;
508
509def HasV8Ops    : SubtargetFeature<"v8", "HasV8Ops", "true",
510                                   "Support ARM v8 instructions",
511                                   [HasV7Ops, FeatureAcquireRelease]>;
512
513def HasV8_1aOps : SubtargetFeature<"v8.1a", "HasV8_1aOps", "true",
514                                   "Support ARM v8.1a instructions",
515                                   [HasV8Ops]>;
516
517def HasV8_2aOps : SubtargetFeature<"v8.2a", "HasV8_2aOps", "true",
518                                   "Support ARM v8.2a instructions",
519                                   [HasV8_1aOps]>;
520
521def HasV8_3aOps   : SubtargetFeature<"v8.3a", "HasV8_3aOps", "true",
522                                   "Support ARM v8.3a instructions",
523                                   [HasV8_2aOps]>;
524
525def HasV8_4aOps   : SubtargetFeature<"v8.4a", "HasV8_4aOps", "true",
526                                   "Support ARM v8.4a instructions",
527                                   [HasV8_3aOps, FeatureDotProd]>;
528
529def HasV8_5aOps   : SubtargetFeature<"v8.5a", "HasV8_5aOps", "true",
530                                   "Support ARM v8.5a instructions",
531                                   [HasV8_4aOps, FeatureSB]>;
532
533def HasV8_6aOps   : SubtargetFeature<"v8.6a", "HasV8_6aOps", "true",
534                                   "Support ARM v8.6a instructions",
535                                   [HasV8_5aOps, FeatureBF16,
536                                    FeatureMatMulInt8]>;
537
538def HasV8_7aOps   : SubtargetFeature<"v8.7a", "HasV8_7aOps", "true",
539                                   "Support ARM v8.7a instructions",
540                                   [HasV8_6aOps]>;
541
542def HasV8_1MMainlineOps : SubtargetFeature<
543               "v8.1m.main", "HasV8_1MMainlineOps", "true",
544               "Support ARM v8-1M Mainline instructions",
545               [HasV8MMainlineOps]>;
546def HasMVEIntegerOps : SubtargetFeature<
547               "mve", "HasMVEIntegerOps", "true",
548               "Support M-Class Vector Extension with integer ops",
549               [HasV8_1MMainlineOps, FeatureDSP, FeatureFPRegs16, FeatureFPRegs64]>;
550def HasMVEFloatOps : SubtargetFeature<
551               "mve.fp", "HasMVEFloatOps", "true",
552               "Support M-Class Vector Extension with integer and floating ops",
553               [HasMVEIntegerOps, FeatureFPARMv8_D16_SP, FeatureFullFP16]>;
554
555def HasCDEOps : SubtargetFeature<"cde", "HasCDEOps", "true",
556                                 "Support CDE instructions",
557                                 [HasV8MMainlineOps]>;
558
559foreach i = {0-7} in
560    def FeatureCoprocCDE#i : SubtargetFeature<"cdecp"#i,
561                                              "CoprocCDE["#i#"]", "true",
562                                              "Coprocessor "#i#" ISA is CDEv1",
563                                              [HasCDEOps]>;
564
565//===----------------------------------------------------------------------===//
566// Control codegen mitigation against Straight Line Speculation vulnerability.
567//===----------------------------------------------------------------------===//
568
569def FeatureHardenSlsRetBr : SubtargetFeature<"harden-sls-retbr",
570  "HardenSlsRetBr", "true",
571  "Harden against straight line speculation across RETurn and BranchRegister "
572  "instructions">;
573def FeatureHardenSlsBlr : SubtargetFeature<"harden-sls-blr",
574  "HardenSlsBlr", "true",
575  "Harden against straight line speculation across indirect calls">;
576def FeatureHardenSlsNoComdat : SubtargetFeature<"harden-sls-nocomdat",
577  "HardenSlsNoComdat", "true",
578  "Generate thunk code for SLS mitigation in the normal text section">;
579
580//===----------------------------------------------------------------------===//
581// ARM Processor subtarget features.
582//
583
584def ProcA5      : SubtargetFeature<"a5", "ARMProcFamily", "CortexA5",
585                                   "Cortex-A5 ARM processors", []>;
586def ProcA7      : SubtargetFeature<"a7", "ARMProcFamily", "CortexA7",
587                                   "Cortex-A7 ARM processors", []>;
588def ProcA8      : SubtargetFeature<"a8", "ARMProcFamily", "CortexA8",
589                                   "Cortex-A8 ARM processors", []>;
590def ProcA9      : SubtargetFeature<"a9", "ARMProcFamily", "CortexA9",
591                                   "Cortex-A9 ARM processors", []>;
592def ProcA12     : SubtargetFeature<"a12", "ARMProcFamily", "CortexA12",
593                                   "Cortex-A12 ARM processors", []>;
594def ProcA15     : SubtargetFeature<"a15", "ARMProcFamily", "CortexA15",
595                                   "Cortex-A15 ARM processors", []>;
596def ProcA17     : SubtargetFeature<"a17", "ARMProcFamily", "CortexA17",
597                                   "Cortex-A17 ARM processors", []>;
598def ProcA32     : SubtargetFeature<"a32", "ARMProcFamily", "CortexA32",
599                                   "Cortex-A32 ARM processors", []>;
600def ProcA35     : SubtargetFeature<"a35", "ARMProcFamily", "CortexA35",
601                                   "Cortex-A35 ARM processors", []>;
602def ProcA53     : SubtargetFeature<"a53", "ARMProcFamily", "CortexA53",
603                                   "Cortex-A53 ARM processors", []>;
604def ProcA55     : SubtargetFeature<"a55", "ARMProcFamily", "CortexA55",
605                                   "Cortex-A55 ARM processors", []>;
606def ProcA57     : SubtargetFeature<"a57", "ARMProcFamily", "CortexA57",
607                                   "Cortex-A57 ARM processors", []>;
608def ProcA72     : SubtargetFeature<"a72", "ARMProcFamily", "CortexA72",
609                                   "Cortex-A72 ARM processors", []>;
610def ProcA73     : SubtargetFeature<"a73", "ARMProcFamily", "CortexA73",
611                                   "Cortex-A73 ARM processors", []>;
612def ProcA75     : SubtargetFeature<"a75", "ARMProcFamily", "CortexA75",
613                                   "Cortex-A75 ARM processors", []>;
614def ProcA76     : SubtargetFeature<"a76", "ARMProcFamily", "CortexA76",
615                                   "Cortex-A76 ARM processors", []>;
616def ProcA77     : SubtargetFeature<"a77", "ARMProcFamily", "CortexA77",
617                                   "Cortex-A77 ARM processors", []>;
618def ProcA78     : SubtargetFeature<"cortex-a78", "ARMProcFamily", "CortexA78",
619                                   "Cortex-A78 ARM processors", []>;
620def ProcA78C    : SubtargetFeature<"a78c", "ARMProcFamily", "CortexA78C",
621                                   "Cortex-A78C ARM processors", []>;
622def ProcX1      : SubtargetFeature<"cortex-x1", "ARMProcFamily", "CortexX1",
623                                   "Cortex-X1 ARM processors", []>;
624
625def ProcV1      : SubtargetFeature<"neoverse-v1", "ARMProcFamily",
626                                   "NeoverseV1", "Neoverse-V1 ARM processors", []>;
627
628def ProcKrait   : SubtargetFeature<"krait", "ARMProcFamily", "Krait",
629                                   "Qualcomm Krait processors", []>;
630def ProcKryo    : SubtargetFeature<"kryo", "ARMProcFamily", "Kryo",
631                                   "Qualcomm Kryo processors", []>;
632def ProcSwift   : SubtargetFeature<"swift", "ARMProcFamily", "Swift",
633                                   "Swift ARM processors", []>;
634
635def ProcExynos  : SubtargetFeature<"exynos", "ARMProcFamily", "Exynos",
636                                   "Samsung Exynos processors",
637                                   [FeatureZCZeroing,
638                                    FeatureUseWideStrideVFP,
639                                    FeatureSplatVFPToNeon,
640                                    FeatureSlowVGETLNi32,
641                                    FeatureSlowVDUP32,
642                                    FeatureSlowFPBrcc,
643                                    FeatureProfUnpredicate,
644                                    FeatureHWDivThumb,
645                                    FeatureHWDivARM,
646                                    FeatureHasSlowFPVMLx,
647                                    FeatureHasSlowFPVFMx,
648                                    FeatureHasRetAddrStack,
649                                    FeatureFuseLiterals,
650                                    FeatureFuseAES,
651                                    FeatureExpandMLx,
652                                    FeatureCrypto,
653                                    FeatureCRC]>;
654
655def ProcR4      : SubtargetFeature<"r4", "ARMProcFamily", "CortexR4",
656                                   "Cortex-R4 ARM processors", []>;
657def ProcR5      : SubtargetFeature<"r5", "ARMProcFamily", "CortexR5",
658                                   "Cortex-R5 ARM processors", []>;
659def ProcR7      : SubtargetFeature<"r7", "ARMProcFamily", "CortexR7",
660                                   "Cortex-R7 ARM processors", []>;
661def ProcR52     : SubtargetFeature<"r52", "ARMProcFamily", "CortexR52",
662                                   "Cortex-R52 ARM processors", []>;
663
664def ProcM3      : SubtargetFeature<"m3", "ARMProcFamily", "CortexM3",
665                                   "Cortex-M3 ARM processors", []>;
666def ProcM7      : SubtargetFeature<"m7", "ARMProcFamily", "CortexM7",
667                                   "Cortex-M7 ARM processors", []>;
668
669//===----------------------------------------------------------------------===//
670// ARM Helper classes.
671//
672
673class Architecture<string fname, string aname, list<SubtargetFeature> features>
674  : SubtargetFeature<fname, "ARMArch", aname,
675                     !strconcat(aname, " architecture"), features>;
676
677class ProcNoItin<string Name, list<SubtargetFeature> Features>
678  : Processor<Name, NoItineraries, Features>;
679
680
681//===----------------------------------------------------------------------===//
682// ARM architectures
683//
684
685def ARMv2     : Architecture<"armv2",     "ARMv2",    []>;
686
687def ARMv2a    : Architecture<"armv2a",    "ARMv2a",   []>;
688
689def ARMv3     : Architecture<"armv3",     "ARMv3",    []>;
690
691def ARMv3m    : Architecture<"armv3m",    "ARMv3m",   []>;
692
693def ARMv4     : Architecture<"armv4",     "ARMv4",    []>;
694
695def ARMv4t    : Architecture<"armv4t",    "ARMv4t",   [HasV4TOps]>;
696
697def ARMv5t    : Architecture<"armv5t",    "ARMv5t",   [HasV5TOps]>;
698
699def ARMv5te   : Architecture<"armv5te",   "ARMv5te",  [HasV5TEOps]>;
700
701def ARMv5tej  : Architecture<"armv5tej",  "ARMv5tej", [HasV5TEOps]>;
702
703def ARMv6     : Architecture<"armv6",     "ARMv6",    [HasV6Ops,
704                                                       FeatureDSP]>;
705
706def ARMv6t2   : Architecture<"armv6t2",   "ARMv6t2",  [HasV6T2Ops,
707                                                       FeatureDSP]>;
708
709def ARMv6k    : Architecture<"armv6k",    "ARMv6k",   [HasV6KOps]>;
710
711def ARMv6kz   : Architecture<"armv6kz",   "ARMv6kz",  [HasV6KOps,
712                                                       FeatureTrustZone]>;
713
714def ARMv6m    : Architecture<"armv6-m",   "ARMv6m",   [HasV6MOps,
715                                                       FeatureNoARM,
716                                                       ModeThumb,
717                                                       FeatureDB,
718                                                       FeatureMClass,
719                                                       FeatureStrictAlign]>;
720
721def ARMv6sm   : Architecture<"armv6s-m",  "ARMv6sm",  [HasV6MOps,
722                                                       FeatureNoARM,
723                                                       ModeThumb,
724                                                       FeatureDB,
725                                                       FeatureMClass,
726                                                       FeatureStrictAlign]>;
727
728def ARMv7a    : Architecture<"armv7-a",   "ARMv7a",   [HasV7Ops,
729                                                       FeatureNEON,
730                                                       FeatureDB,
731                                                       FeatureDSP,
732                                                       FeatureAClass]>;
733
734def ARMv7ve   : Architecture<"armv7ve",   "ARMv7ve",  [HasV7Ops,
735                                                       FeatureNEON,
736                                                       FeatureDB,
737                                                       FeatureDSP,
738                                                       FeatureTrustZone,
739                                                       FeatureMP,
740                                                       FeatureVirtualization,
741                                                       FeatureAClass]>;
742
743def ARMv7r    : Architecture<"armv7-r",   "ARMv7r",   [HasV7Ops,
744                                                       FeatureDB,
745                                                       FeatureDSP,
746                                                       FeatureHWDivThumb,
747                                                       FeatureRClass]>;
748
749def ARMv7m    : Architecture<"armv7-m",   "ARMv7m",   [HasV7Ops,
750                                                       FeatureThumb2,
751                                                       FeatureNoARM,
752                                                       ModeThumb,
753                                                       FeatureDB,
754                                                       FeatureHWDivThumb,
755                                                       FeatureMClass]>;
756
757def ARMv7em   : Architecture<"armv7e-m",  "ARMv7em",  [HasV7Ops,
758                                                       FeatureThumb2,
759                                                       FeatureNoARM,
760                                                       ModeThumb,
761                                                       FeatureDB,
762                                                       FeatureHWDivThumb,
763                                                       FeatureMClass,
764                                                       FeatureDSP]>;
765
766def ARMv8a    : Architecture<"armv8-a",   "ARMv8a",   [HasV8Ops,
767                                                       FeatureAClass,
768                                                       FeatureDB,
769                                                       FeatureFPARMv8,
770                                                       FeatureNEON,
771                                                       FeatureDSP,
772                                                       FeatureTrustZone,
773                                                       FeatureMP,
774                                                       FeatureVirtualization,
775                                                       FeatureCrypto,
776                                                       FeatureCRC]>;
777
778def ARMv81a   : Architecture<"armv8.1-a", "ARMv81a",  [HasV8_1aOps,
779                                                       FeatureAClass,
780                                                       FeatureDB,
781                                                       FeatureFPARMv8,
782                                                       FeatureNEON,
783                                                       FeatureDSP,
784                                                       FeatureTrustZone,
785                                                       FeatureMP,
786                                                       FeatureVirtualization,
787                                                       FeatureCrypto,
788                                                       FeatureCRC]>;
789
790def ARMv82a   : Architecture<"armv8.2-a", "ARMv82a",  [HasV8_2aOps,
791                                                       FeatureAClass,
792                                                       FeatureDB,
793                                                       FeatureFPARMv8,
794                                                       FeatureNEON,
795                                                       FeatureDSP,
796                                                       FeatureTrustZone,
797                                                       FeatureMP,
798                                                       FeatureVirtualization,
799                                                       FeatureCrypto,
800                                                       FeatureCRC,
801                                                       FeatureRAS]>;
802
803def ARMv83a   : Architecture<"armv8.3-a", "ARMv83a",  [HasV8_3aOps,
804                                                       FeatureAClass,
805                                                       FeatureDB,
806                                                       FeatureFPARMv8,
807                                                       FeatureNEON,
808                                                       FeatureDSP,
809                                                       FeatureTrustZone,
810                                                       FeatureMP,
811                                                       FeatureVirtualization,
812                                                       FeatureCrypto,
813                                                       FeatureCRC,
814                                                       FeatureRAS]>;
815
816def ARMv84a   : Architecture<"armv8.4-a", "ARMv84a",  [HasV8_4aOps,
817                                                       FeatureAClass,
818                                                       FeatureDB,
819                                                       FeatureFPARMv8,
820                                                       FeatureNEON,
821                                                       FeatureDSP,
822                                                       FeatureTrustZone,
823                                                       FeatureMP,
824                                                       FeatureVirtualization,
825                                                       FeatureCrypto,
826                                                       FeatureCRC,
827                                                       FeatureRAS,
828                                                       FeatureDotProd]>;
829
830def ARMv85a   : Architecture<"armv8.5-a", "ARMv85a",  [HasV8_5aOps,
831                                                       FeatureAClass,
832                                                       FeatureDB,
833                                                       FeatureFPARMv8,
834                                                       FeatureNEON,
835                                                       FeatureDSP,
836                                                       FeatureTrustZone,
837                                                       FeatureMP,
838                                                       FeatureVirtualization,
839                                                       FeatureCrypto,
840                                                       FeatureCRC,
841                                                       FeatureRAS,
842                                                       FeatureDotProd]>;
843def ARMv86a   : Architecture<"armv8.6-a", "ARMv86a",  [HasV8_6aOps,
844                                                       FeatureAClass,
845                                                       FeatureDB,
846                                                       FeatureFPARMv8,
847                                                       FeatureNEON,
848                                                       FeatureDSP,
849                                                       FeatureTrustZone,
850                                                       FeatureMP,
851                                                       FeatureVirtualization,
852                                                       FeatureCrypto,
853                                                       FeatureCRC,
854                                                       FeatureRAS,
855                                                       FeatureDotProd]>;
856def ARMv87a   : Architecture<"armv8.7-a", "ARMv87a",  [HasV8_7aOps,
857                                                       FeatureAClass,
858                                                       FeatureDB,
859                                                       FeatureFPARMv8,
860                                                       FeatureNEON,
861                                                       FeatureDSP,
862                                                       FeatureTrustZone,
863                                                       FeatureMP,
864                                                       FeatureVirtualization,
865                                                       FeatureCrypto,
866                                                       FeatureCRC,
867                                                       FeatureRAS,
868                                                       FeatureDotProd]>;
869
870def ARMv8r    : Architecture<"armv8-r",   "ARMv8r",   [HasV8Ops,
871                                                       FeatureRClass,
872                                                       FeatureDB,
873                                                       FeatureDFB,
874                                                       FeatureDSP,
875                                                       FeatureCRC,
876                                                       FeatureMP,
877                                                       FeatureVirtualization,
878                                                       FeatureFPARMv8,
879                                                       FeatureNEON]>;
880
881def ARMv8mBaseline : Architecture<"armv8-m.base", "ARMv8mBaseline",
882                                                      [HasV8MBaselineOps,
883                                                       FeatureNoARM,
884                                                       ModeThumb,
885                                                       FeatureDB,
886                                                       FeatureHWDivThumb,
887                                                       FeatureV7Clrex,
888                                                       Feature8MSecExt,
889                                                       FeatureAcquireRelease,
890                                                       FeatureMClass,
891                                                       FeatureStrictAlign]>;
892
893def ARMv8mMainline : Architecture<"armv8-m.main", "ARMv8mMainline",
894                                                      [HasV8MMainlineOps,
895                                                       FeatureNoARM,
896                                                       ModeThumb,
897                                                       FeatureDB,
898                                                       FeatureHWDivThumb,
899                                                       Feature8MSecExt,
900                                                       FeatureAcquireRelease,
901                                                       FeatureMClass]>;
902
903def ARMv81mMainline : Architecture<"armv8.1-m.main", "ARMv81mMainline",
904                                                      [HasV8_1MMainlineOps,
905                                                       FeatureNoARM,
906                                                       ModeThumb,
907                                                       FeatureDB,
908                                                       FeatureHWDivThumb,
909                                                       Feature8MSecExt,
910                                                       FeatureAcquireRelease,
911                                                       FeatureMClass,
912                                                       FeatureRAS,
913                                                       FeatureLOB]>;
914
915// Aliases
916def IWMMXT   : Architecture<"iwmmxt",      "ARMv5te",  [ARMv5te]>;
917def IWMMXT2  : Architecture<"iwmmxt2",     "ARMv5te",  [ARMv5te]>;
918def XScale   : Architecture<"xscale",      "ARMv5te",  [ARMv5te]>;
919def ARMv6j   : Architecture<"armv6j",      "ARMv7a",   [ARMv6]>;
920def ARMv7k   : Architecture<"armv7k",      "ARMv7a",   [ARMv7a]>;
921def ARMv7s   : Architecture<"armv7s",      "ARMv7a",   [ARMv7a]>;
922
923//===----------------------------------------------------------------------===//
924// Register File Description
925//===----------------------------------------------------------------------===//
926
927include "ARMRegisterInfo.td"
928include "ARMRegisterBanks.td"
929include "ARMCallingConv.td"
930
931//===----------------------------------------------------------------------===//
932// ARM schedules.
933//===----------------------------------------------------------------------===//
934//
935include "ARMPredicates.td"
936include "ARMSchedule.td"
937
938//===----------------------------------------------------------------------===//
939// Instruction Descriptions
940//===----------------------------------------------------------------------===//
941
942include "ARMInstrInfo.td"
943def ARMInstrInfo : InstrInfo;
944
945//===----------------------------------------------------------------------===//
946// ARM schedules
947//
948include "ARMScheduleV6.td"
949include "ARMScheduleA8.td"
950include "ARMScheduleA9.td"
951include "ARMScheduleSwift.td"
952include "ARMScheduleR52.td"
953include "ARMScheduleA57.td"
954include "ARMScheduleM4.td"
955include "ARMScheduleM7.td"
956
957//===----------------------------------------------------------------------===//
958// ARM processors
959//
960// Dummy CPU, used to target architectures
961def : ProcessorModel<"generic",     CortexA8Model,      []>;
962
963// FIXME: Several processors below are not using their own scheduler
964// model, but one of similar/previous processor. These should be fixed.
965
966def : ProcNoItin<"arm8",                                [ARMv4]>;
967def : ProcNoItin<"arm810",                              [ARMv4]>;
968def : ProcNoItin<"strongarm",                           [ARMv4]>;
969def : ProcNoItin<"strongarm110",                        [ARMv4]>;
970def : ProcNoItin<"strongarm1100",                       [ARMv4]>;
971def : ProcNoItin<"strongarm1110",                       [ARMv4]>;
972
973def : ProcNoItin<"arm7tdmi",                            [ARMv4t]>;
974def : ProcNoItin<"arm7tdmi-s",                          [ARMv4t]>;
975def : ProcNoItin<"arm710t",                             [ARMv4t]>;
976def : ProcNoItin<"arm720t",                             [ARMv4t]>;
977def : ProcNoItin<"arm9",                                [ARMv4t]>;
978def : ProcNoItin<"arm9tdmi",                            [ARMv4t]>;
979def : ProcNoItin<"arm920",                              [ARMv4t]>;
980def : ProcNoItin<"arm920t",                             [ARMv4t]>;
981def : ProcNoItin<"arm922t",                             [ARMv4t]>;
982def : ProcNoItin<"arm940t",                             [ARMv4t]>;
983def : ProcNoItin<"ep9312",                              [ARMv4t]>;
984
985def : ProcNoItin<"arm10tdmi",                           [ARMv5t]>;
986def : ProcNoItin<"arm1020t",                            [ARMv5t]>;
987
988def : ProcNoItin<"arm9e",                               [ARMv5te]>;
989def : ProcNoItin<"arm926ej-s",                          [ARMv5te]>;
990def : ProcNoItin<"arm946e-s",                           [ARMv5te]>;
991def : ProcNoItin<"arm966e-s",                           [ARMv5te]>;
992def : ProcNoItin<"arm968e-s",                           [ARMv5te]>;
993def : ProcNoItin<"arm10e",                              [ARMv5te]>;
994def : ProcNoItin<"arm1020e",                            [ARMv5te]>;
995def : ProcNoItin<"arm1022e",                            [ARMv5te]>;
996def : ProcNoItin<"xscale",                              [ARMv5te]>;
997def : ProcNoItin<"iwmmxt",                              [ARMv5te]>;
998
999def : Processor<"arm1136j-s",       ARMV6Itineraries,   [ARMv6]>;
1000def : Processor<"arm1136jf-s",      ARMV6Itineraries,   [ARMv6,
1001                                                         FeatureVFP2,
1002                                                         FeatureHasSlowFPVMLx]>;
1003
1004def : Processor<"cortex-m0",        ARMV6Itineraries,   [ARMv6m,
1005                                                         FeatureHasNoBranchPredictor]>;
1006def : Processor<"cortex-m0plus",    ARMV6Itineraries,   [ARMv6m,
1007                                                         FeatureHasNoBranchPredictor]>;
1008def : Processor<"cortex-m1",        ARMV6Itineraries,   [ARMv6m,
1009                                                         FeatureHasNoBranchPredictor]>;
1010def : Processor<"sc000",            ARMV6Itineraries,   [ARMv6m,
1011                                                         FeatureHasNoBranchPredictor]>;
1012
1013def : Processor<"arm1176jz-s",      ARMV6Itineraries,   [ARMv6kz]>;
1014def : Processor<"arm1176jzf-s",     ARMV6Itineraries,   [ARMv6kz,
1015                                                         FeatureVFP2,
1016                                                         FeatureHasSlowFPVMLx]>;
1017
1018def : Processor<"mpcorenovfp",      ARMV6Itineraries,   [ARMv6k]>;
1019def : Processor<"mpcore",           ARMV6Itineraries,   [ARMv6k,
1020                                                         FeatureVFP2,
1021                                                         FeatureHasSlowFPVMLx]>;
1022
1023def : Processor<"arm1156t2-s",      ARMV6Itineraries,   [ARMv6t2]>;
1024def : Processor<"arm1156t2f-s",     ARMV6Itineraries,   [ARMv6t2,
1025                                                         FeatureVFP2,
1026                                                         FeatureHasSlowFPVMLx]>;
1027
1028def : ProcessorModel<"cortex-a5",   CortexA8Model,      [ARMv7a, ProcA5,
1029                                                         FeatureHasRetAddrStack,
1030                                                         FeatureTrustZone,
1031                                                         FeatureSlowFPBrcc,
1032                                                         FeatureHasSlowFPVMLx,
1033                                                         FeatureHasSlowFPVFMx,
1034                                                         FeatureVMLxForwarding,
1035                                                         FeatureMP,
1036                                                         FeatureVFP4]>;
1037
1038def : ProcessorModel<"cortex-a7",   CortexA8Model,      [ARMv7a, ProcA7,
1039                                                         FeatureHasRetAddrStack,
1040                                                         FeatureTrustZone,
1041                                                         FeatureSlowFPBrcc,
1042                                                         FeatureHasVMLxHazards,
1043                                                         FeatureHasSlowFPVMLx,
1044                                                         FeatureHasSlowFPVFMx,
1045                                                         FeatureVMLxForwarding,
1046                                                         FeatureMP,
1047                                                         FeatureVFP4,
1048                                                         FeatureVirtualization]>;
1049
1050def : ProcessorModel<"cortex-a8",   CortexA8Model,      [ARMv7a, ProcA8,
1051                                                         FeatureHasRetAddrStack,
1052                                                         FeatureNonpipelinedVFP,
1053                                                         FeatureTrustZone,
1054                                                         FeatureSlowFPBrcc,
1055                                                         FeatureHasVMLxHazards,
1056                                                         FeatureHasSlowFPVMLx,
1057                                                         FeatureHasSlowFPVFMx,
1058                                                         FeatureVMLxForwarding]>;
1059
1060def : ProcessorModel<"cortex-a9",   CortexA9Model,      [ARMv7a, ProcA9,
1061                                                         FeatureHasRetAddrStack,
1062                                                         FeatureTrustZone,
1063                                                         FeatureHasVMLxHazards,
1064                                                         FeatureVMLxForwarding,
1065                                                         FeatureFP16,
1066                                                         FeatureAvoidPartialCPSR,
1067                                                         FeatureExpandMLx,
1068                                                         FeaturePreferVMOVSR,
1069                                                         FeatureMuxedUnits,
1070                                                         FeatureNEONForFPMovs,
1071                                                         FeatureCheckVLDnAlign,
1072                                                         FeatureMP]>;
1073
1074def : ProcessorModel<"cortex-a12",  CortexA9Model,      [ARMv7a, ProcA12,
1075                                                         FeatureHasRetAddrStack,
1076                                                         FeatureTrustZone,
1077                                                         FeatureVMLxForwarding,
1078                                                         FeatureVFP4,
1079                                                         FeatureAvoidPartialCPSR,
1080                                                         FeatureVirtualization,
1081                                                         FeatureMP]>;
1082
1083def : ProcessorModel<"cortex-a15",  CortexA9Model,      [ARMv7a, ProcA15,
1084                                                         FeatureDontWidenVMOVS,
1085                                                         FeatureSplatVFPToNeon,
1086                                                         FeatureHasRetAddrStack,
1087                                                         FeatureMuxedUnits,
1088                                                         FeatureTrustZone,
1089                                                         FeatureVFP4,
1090                                                         FeatureMP,
1091                                                         FeatureCheckVLDnAlign,
1092                                                         FeatureAvoidPartialCPSR,
1093                                                         FeatureVirtualization]>;
1094
1095def : ProcessorModel<"cortex-a17",  CortexA9Model,      [ARMv7a, ProcA17,
1096                                                         FeatureHasRetAddrStack,
1097                                                         FeatureTrustZone,
1098                                                         FeatureMP,
1099                                                         FeatureVMLxForwarding,
1100                                                         FeatureVFP4,
1101                                                         FeatureAvoidPartialCPSR,
1102                                                         FeatureVirtualization]>;
1103
1104// FIXME: krait has currently the same features as A9 plus VFP4 and  HWDiv
1105def : ProcessorModel<"krait",       CortexA9Model,      [ARMv7a, ProcKrait,
1106                                                         FeatureHasRetAddrStack,
1107                                                         FeatureMuxedUnits,
1108                                                         FeatureCheckVLDnAlign,
1109                                                         FeatureVMLxForwarding,
1110                                                         FeatureFP16,
1111                                                         FeatureAvoidPartialCPSR,
1112                                                         FeatureVFP4,
1113                                                         FeatureHWDivThumb,
1114                                                         FeatureHWDivARM]>;
1115
1116def : ProcessorModel<"swift",       SwiftModel,         [ARMv7a, ProcSwift,
1117                                                         FeatureHasRetAddrStack,
1118                                                         FeatureNEONForFP,
1119                                                         FeatureVFP4,
1120                                                         FeatureUseWideStrideVFP,
1121                                                         FeatureMP,
1122                                                         FeatureHWDivThumb,
1123                                                         FeatureHWDivARM,
1124                                                         FeatureAvoidPartialCPSR,
1125                                                         FeatureAvoidMOVsShOp,
1126                                                         FeatureHasSlowFPVMLx,
1127                                                         FeatureHasSlowFPVFMx,
1128                                                         FeatureHasVMLxHazards,
1129                                                         FeatureProfUnpredicate,
1130                                                         FeaturePrefISHSTBarrier,
1131                                                         FeatureSlowOddRegister,
1132                                                         FeatureSlowLoadDSubreg,
1133                                                         FeatureSlowVGETLNi32,
1134                                                         FeatureSlowVDUP32,
1135                                                         FeatureUseMISched,
1136                                                         FeatureNoPostRASched]>;
1137
1138def : ProcessorModel<"cortex-r4",   CortexA8Model,      [ARMv7r, ProcR4,
1139                                                         FeatureHasRetAddrStack,
1140                                                         FeatureAvoidPartialCPSR]>;
1141
1142def : ProcessorModel<"cortex-r4f",  CortexA8Model,      [ARMv7r, ProcR4,
1143                                                         FeatureHasRetAddrStack,
1144                                                         FeatureSlowFPBrcc,
1145                                                         FeatureHasSlowFPVMLx,
1146                                                         FeatureHasSlowFPVFMx,
1147                                                         FeatureVFP3_D16,
1148                                                         FeatureAvoidPartialCPSR]>;
1149
1150def : ProcessorModel<"cortex-r5",   CortexA8Model,      [ARMv7r, ProcR5,
1151                                                         FeatureHasRetAddrStack,
1152                                                         FeatureVFP3_D16,
1153                                                         FeatureSlowFPBrcc,
1154                                                         FeatureHWDivARM,
1155                                                         FeatureHasSlowFPVMLx,
1156                                                         FeatureHasSlowFPVFMx,
1157                                                         FeatureAvoidPartialCPSR]>;
1158
1159def : ProcessorModel<"cortex-r7",   CortexA8Model,      [ARMv7r, ProcR7,
1160                                                         FeatureHasRetAddrStack,
1161                                                         FeatureVFP3_D16,
1162                                                         FeatureFP16,
1163                                                         FeatureMP,
1164                                                         FeatureSlowFPBrcc,
1165                                                         FeatureHWDivARM,
1166                                                         FeatureHasSlowFPVMLx,
1167                                                         FeatureHasSlowFPVFMx,
1168                                                         FeatureAvoidPartialCPSR]>;
1169
1170def : ProcessorModel<"cortex-r8",   CortexA8Model,      [ARMv7r,
1171                                                         FeatureHasRetAddrStack,
1172                                                         FeatureVFP3_D16,
1173                                                         FeatureFP16,
1174                                                         FeatureMP,
1175                                                         FeatureSlowFPBrcc,
1176                                                         FeatureHWDivARM,
1177                                                         FeatureHasSlowFPVMLx,
1178                                                         FeatureHasSlowFPVFMx,
1179                                                         FeatureAvoidPartialCPSR]>;
1180
1181def : ProcessorModel<"cortex-m3",   CortexM4Model,      [ARMv7m,
1182                                                         ProcM3,
1183                                                         FeaturePrefLoopAlign32,
1184                                                         FeatureUseMISched,
1185                                                         FeatureHasNoBranchPredictor]>;
1186
1187def : ProcessorModel<"sc300",       CortexM4Model,      [ARMv7m,
1188                                                         ProcM3,
1189                                                         FeatureUseMISched,
1190                                                         FeatureHasNoBranchPredictor]>;
1191
1192def : ProcessorModel<"cortex-m4", CortexM4Model,        [ARMv7em,
1193                                                         FeatureVFP4_D16_SP,
1194                                                         FeaturePrefLoopAlign32,
1195                                                         FeatureHasSlowFPVMLx,
1196                                                         FeatureHasSlowFPVFMx,
1197                                                         FeatureUseMISched,
1198                                                         FeatureHasNoBranchPredictor]>;
1199
1200def : ProcessorModel<"cortex-m7", CortexM7Model,        [ARMv7em,
1201                                                         ProcM7,
1202                                                         FeatureFPARMv8_D16,
1203                                                         FeatureUseMISched]>;
1204
1205def : ProcNoItin<"cortex-m23",                          [ARMv8mBaseline,
1206                                                         FeatureNoMovt,
1207                                                         FeatureHasNoBranchPredictor]>;
1208
1209def : ProcessorModel<"cortex-m33", CortexM4Model,       [ARMv8mMainline,
1210                                                         FeatureDSP,
1211                                                         FeatureFPARMv8_D16_SP,
1212                                                         FeaturePrefLoopAlign32,
1213                                                         FeatureHasSlowFPVMLx,
1214                                                         FeatureHasSlowFPVFMx,
1215                                                         FeatureUseMISched,
1216                                                         FeatureHasNoBranchPredictor]>;
1217
1218def : ProcessorModel<"cortex-m35p", CortexM4Model,      [ARMv8mMainline,
1219                                                         FeatureDSP,
1220                                                         FeatureFPARMv8_D16_SP,
1221                                                         FeaturePrefLoopAlign32,
1222                                                         FeatureHasSlowFPVMLx,
1223                                                         FeatureHasSlowFPVFMx,
1224                                                         FeatureUseMISched,
1225                                                         FeatureHasNoBranchPredictor]>;
1226
1227def : ProcessorModel<"cortex-m55", CortexM4Model,      [ARMv81mMainline,
1228                                                         FeatureDSP,
1229                                                         FeatureFPARMv8_D16,
1230                                                         FeatureUseMISched,
1231                                                         FeatureHasNoBranchPredictor,
1232                                                         FeaturePrefLoopAlign32,
1233                                                         FeatureHasSlowFPVMLx,
1234                                                         HasMVEFloatOps]>;
1235
1236def : ProcNoItin<"cortex-a32",                           [ARMv8a,
1237                                                         FeatureHWDivThumb,
1238                                                         FeatureHWDivARM,
1239                                                         FeatureCrypto,
1240                                                         FeatureCRC]>;
1241
1242def : ProcNoItin<"cortex-a35",                          [ARMv8a, ProcA35,
1243                                                         FeatureHWDivThumb,
1244                                                         FeatureHWDivARM,
1245                                                         FeatureCrypto,
1246                                                         FeatureCRC]>;
1247
1248def : ProcNoItin<"cortex-a53",                          [ARMv8a, ProcA53,
1249                                                         FeatureHWDivThumb,
1250                                                         FeatureHWDivARM,
1251                                                         FeatureCrypto,
1252                                                         FeatureCRC,
1253                                                         FeatureFPAO]>;
1254
1255def : ProcNoItin<"cortex-a55",                          [ARMv82a, ProcA55,
1256                                                         FeatureHWDivThumb,
1257                                                         FeatureHWDivARM,
1258                                                         FeatureDotProd]>;
1259
1260def : ProcessorModel<"cortex-a57",  CortexA57Model,     [ARMv8a, ProcA57,
1261                                                         FeatureHWDivThumb,
1262                                                         FeatureHWDivARM,
1263                                                         FeatureCrypto,
1264                                                         FeatureCRC,
1265                                                         FeatureFPAO,
1266                                                         FeatureAvoidPartialCPSR,
1267                                                         FeatureCheapPredicableCPSR]>;
1268
1269def : ProcessorModel<"cortex-a72",  CortexA57Model,     [ARMv8a, ProcA72,
1270                                                         FeatureHWDivThumb,
1271                                                         FeatureHWDivARM,
1272                                                         FeatureCrypto,
1273                                                         FeatureCRC]>;
1274
1275def : ProcNoItin<"cortex-a73",                          [ARMv8a, ProcA73,
1276                                                         FeatureHWDivThumb,
1277                                                         FeatureHWDivARM,
1278                                                         FeatureCrypto,
1279                                                         FeatureCRC]>;
1280
1281def : ProcNoItin<"cortex-a75",                          [ARMv82a, ProcA75,
1282                                                         FeatureHWDivThumb,
1283                                                         FeatureHWDivARM,
1284                                                         FeatureDotProd]>;
1285
1286def : ProcNoItin<"cortex-a76",                          [ARMv82a, ProcA76,
1287                                                         FeatureHWDivThumb,
1288                                                         FeatureHWDivARM,
1289                                                         FeatureCrypto,
1290                                                         FeatureCRC,
1291                                                         FeatureFullFP16,
1292                                                         FeatureDotProd]>;
1293
1294def : ProcNoItin<"cortex-a76ae",                        [ARMv82a, ProcA76,
1295                                                         FeatureHWDivThumb,
1296                                                         FeatureHWDivARM,
1297                                                         FeatureCrypto,
1298                                                         FeatureCRC,
1299                                                         FeatureFullFP16,
1300                                                         FeatureDotProd]>;
1301
1302def : ProcNoItin<"cortex-a77",                          [ARMv82a, ProcA77,
1303                                                         FeatureHWDivThumb,
1304                                                         FeatureHWDivARM,
1305                                                         FeatureCrypto,
1306                                                         FeatureCRC,
1307                                                         FeatureFullFP16,
1308                                                         FeatureDotProd]>;
1309
1310def : ProcNoItin<"cortex-a78",                          [ARMv82a, ProcA78,
1311                                                         FeatureHWDivThumb,
1312                                                         FeatureHWDivARM,
1313                                                         FeatureCrypto,
1314                                                         FeatureCRC,
1315                                                         FeatureFullFP16,
1316                                                         FeatureDotProd]>;
1317
1318def : ProcNoItin<"cortex-a78c",                         [ARMv82a, ProcA78C,
1319                                                         FeatureHWDivThumb,
1320                                                         FeatureHWDivARM,
1321                                                         FeatureCrypto,
1322                                                         FeatureCRC,
1323                                                         FeatureDotProd,
1324                                                         FeatureFullFP16]>;
1325
1326def : ProcNoItin<"cortex-x1",                           [ARMv82a, ProcX1,
1327                                                         FeatureHWDivThumb,
1328                                                         FeatureHWDivARM,
1329                                                         FeatureCrypto,
1330                                                         FeatureCRC,
1331                                                         FeatureFullFP16,
1332                                                         FeatureDotProd]>;
1333
1334def : ProcNoItin<"neoverse-v1",                         [ARMv84a,
1335                                                         FeatureHWDivThumb,
1336                                                         FeatureHWDivARM,
1337                                                         FeatureCrypto,
1338                                                         FeatureCRC,
1339                                                         FeatureFullFP16,
1340                                                         FeatureBF16,
1341                                                         FeatureMatMulInt8]>;
1342
1343def : ProcNoItin<"neoverse-n1",                         [ARMv82a,
1344                                                         FeatureHWDivThumb,
1345                                                         FeatureHWDivARM,
1346                                                         FeatureCrypto,
1347                                                         FeatureCRC,
1348                                                         FeatureDotProd]>;
1349
1350def : ProcNoItin<"neoverse-n2",                         [ARMv85a,
1351                                                         FeatureBF16,
1352                                                         FeatureMatMulInt8,
1353                                                         FeaturePerfMon]>;
1354
1355def : ProcessorModel<"cyclone",     SwiftModel,         [ARMv8a, ProcSwift,
1356                                                         FeatureHasRetAddrStack,
1357                                                         FeatureNEONForFP,
1358                                                         FeatureVFP4,
1359                                                         FeatureMP,
1360                                                         FeatureHWDivThumb,
1361                                                         FeatureHWDivARM,
1362                                                         FeatureAvoidPartialCPSR,
1363                                                         FeatureAvoidMOVsShOp,
1364                                                         FeatureHasSlowFPVMLx,
1365                                                         FeatureHasSlowFPVFMx,
1366                                                         FeatureCrypto,
1367                                                         FeatureUseMISched,
1368                                                         FeatureZCZeroing,
1369                                                         FeatureNoPostRASched]>;
1370
1371def : ProcNoItin<"exynos-m3",                           [ARMv8a, ProcExynos]>;
1372def : ProcNoItin<"exynos-m4",                           [ARMv82a, ProcExynos,
1373                                                         FeatureFullFP16,
1374                                                         FeatureDotProd]>;
1375def : ProcNoItin<"exynos-m5",                           [ARMv82a, ProcExynos,
1376                                                         FeatureFullFP16,
1377                                                         FeatureDotProd]>;
1378
1379def : ProcNoItin<"kryo",                                [ARMv8a, ProcKryo,
1380                                                         FeatureHWDivThumb,
1381                                                         FeatureHWDivARM,
1382                                                         FeatureCrypto,
1383                                                         FeatureCRC]>;
1384
1385def : ProcessorModel<"cortex-r52", CortexR52Model,      [ARMv8r, ProcR52,
1386                                                         FeatureUseMISched,
1387                                                         FeatureFPAO]>;
1388
1389//===----------------------------------------------------------------------===//
1390// Declare the target which we are implementing
1391//===----------------------------------------------------------------------===//
1392
1393def ARMAsmWriter : AsmWriter {
1394  string AsmWriterClassName  = "InstPrinter";
1395  int PassSubtarget = 1;
1396  int Variant = 0;
1397  bit isMCAsmWriter = 1;
1398}
1399
1400def ARMAsmParser : AsmParser {
1401  bit ReportMultipleNearMisses = 1;
1402}
1403
1404def ARMAsmParserVariant : AsmParserVariant {
1405  int Variant = 0;
1406  string Name = "ARM";
1407  string BreakCharacters = ".";
1408}
1409
1410def ARM : Target {
1411  // Pull in Instruction Info.
1412  let InstructionSet = ARMInstrInfo;
1413  let AssemblyWriters = [ARMAsmWriter];
1414  let AssemblyParsers = [ARMAsmParser];
1415  let AssemblyParserVariants = [ARMAsmParserVariant];
1416  let AllowRegisterRenaming = 1;
1417}
1418