xref: /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ARM.td (revision 4824e7fd18a1223177218d4aec1b3c6c5c4a444e) 
1//===-- ARM.td - Describe the ARM Target Machine -----------*- tablegen -*-===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9//
10//===----------------------------------------------------------------------===//
11
12//===----------------------------------------------------------------------===//
13// Target-independent interfaces which we are implementing
14//===----------------------------------------------------------------------===//
15
16include "llvm/Target/Target.td"
17
18//===----------------------------------------------------------------------===//
19// ARM Subtarget state.
20//
21
22def ModeThumb             : SubtargetFeature<"thumb-mode", "InThumbMode",
23                                             "true", "Thumb mode">;
24
25def ModeSoftFloat         : SubtargetFeature<"soft-float","UseSoftFloat",
26                                             "true", "Use software floating "
27                                             "point features.">;
28
29
30//===----------------------------------------------------------------------===//
31// ARM Subtarget features.
32//
33
34// Floating Point, HW Division and Neon Support
35
36// FP loads/stores/moves, shared between VFP and MVE (even in the integer-only
37// version).
38def FeatureFPRegs         : SubtargetFeature<"fpregs", "HasFPRegs", "true",
39                                             "Enable FP registers">;
40
41// 16-bit FP loads/stores/moves, shared between VFP (with the v8.2A FP16
42// extension) and MVE (even in the integer-only version).
43def FeatureFPRegs16       : SubtargetFeature<"fpregs16", "HasFPRegs16", "true",
44                                             "Enable 16-bit FP registers",
45                                             [FeatureFPRegs]>;
46
47def FeatureFPRegs64       : SubtargetFeature<"fpregs64", "HasFPRegs64", "true",
48                                             "Enable 64-bit FP registers",
49                                             [FeatureFPRegs]>;
50
51def FeatureFP64           : SubtargetFeature<"fp64", "HasFP64", "true",
52                                             "Floating point unit supports "
53                                             "double precision",
54                                             [FeatureFPRegs64]>;
55
56def FeatureD32            : SubtargetFeature<"d32", "HasD32", "true",
57                                             "Extend FP to 32 double registers">;
58
59multiclass VFPver<string name, string query, string description,
60                  list<SubtargetFeature> prev,
61                  list<SubtargetFeature> otherimplies,
62                  list<SubtargetFeature> vfp2prev = []> {
63  def _D16_SP: SubtargetFeature<
64    name#"d16sp", query#"D16SP", "true",
65    description#" with only 16 d-registers and no double precision",
66    !foreach(v, prev, !cast<SubtargetFeature>(v # "_D16_SP")) #
67      !foreach(v, vfp2prev, !cast<SubtargetFeature>(v # "_SP")) #
68      otherimplies>;
69  def _SP: SubtargetFeature<
70    name#"sp", query#"SP", "true",
71    description#" with no double precision",
72    !foreach(v, prev, !cast<SubtargetFeature>(v # "_SP")) #
73      otherimplies # [FeatureD32, !cast<SubtargetFeature>(NAME # "_D16_SP")]>;
74  def _D16: SubtargetFeature<
75    name#"d16", query#"D16", "true",
76    description#" with only 16 d-registers",
77    !foreach(v, prev, !cast<SubtargetFeature>(v # "_D16")) #
78      vfp2prev #
79      otherimplies # [FeatureFP64, !cast<SubtargetFeature>(NAME # "_D16_SP")]>;
80  def "": SubtargetFeature<
81    name, query, "true", description,
82    prev # otherimplies # [
83        !cast<SubtargetFeature>(NAME # "_D16"),
84        !cast<SubtargetFeature>(NAME # "_SP")]>;
85}
86
87def FeatureVFP2_SP        : SubtargetFeature<"vfp2sp", "HasVFPv2SP", "true",
88                                             "Enable VFP2 instructions with "
89                                             "no double precision",
90                                             [FeatureFPRegs]>;
91
92def FeatureVFP2           : SubtargetFeature<"vfp2", "HasVFPv2", "true",
93                                             "Enable VFP2 instructions",
94                                             [FeatureFP64, FeatureVFP2_SP]>;
95
96defm FeatureVFP3: VFPver<"vfp3", "HasVFPv3", "Enable VFP3 instructions",
97                         [], [], [FeatureVFP2]>;
98
99def FeatureNEON           : SubtargetFeature<"neon", "HasNEON", "true",
100                                             "Enable NEON instructions",
101                                             [FeatureVFP3]>;
102
103def FeatureFP16           : SubtargetFeature<"fp16", "HasFP16", "true",
104                                             "Enable half-precision "
105                                             "floating point">;
106
107defm FeatureVFP4: VFPver<"vfp4", "HasVFPv4", "Enable VFP4 instructions",
108                         [FeatureVFP3], [FeatureFP16]>;
109
110defm FeatureFPARMv8: VFPver<"fp-armv8", "HasFPARMv8", "Enable ARMv8 FP",
111                         [FeatureVFP4], []>;
112
113def FeatureFullFP16       : SubtargetFeature<"fullfp16", "HasFullFP16", "true",
114                                             "Enable full half-precision "
115                                             "floating point",
116                                             [FeatureFPARMv8_D16_SP, FeatureFPRegs16]>;
117
118def FeatureFP16FML        : SubtargetFeature<"fp16fml", "HasFP16FML", "true",
119                                             "Enable full half-precision "
120                                             "floating point fml instructions",
121                                             [FeatureFullFP16]>;
122
123def FeatureHWDivThumb     : SubtargetFeature<"hwdiv",
124                                             "HasHardwareDivideInThumb", "true",
125                                             "Enable divide instructions in Thumb">;
126
127def FeatureHWDivARM       : SubtargetFeature<"hwdiv-arm",
128                                             "HasHardwareDivideInARM", "true",
129                                             "Enable divide instructions in ARM mode">;
130
131// Atomic Support
132def FeatureDB             : SubtargetFeature<"db", "HasDataBarrier", "true",
133                                             "Has data barrier (dmb/dsb) instructions">;
134
135def FeatureV7Clrex        : SubtargetFeature<"v7clrex", "HasV7Clrex", "true",
136                                             "Has v7 clrex instruction">;
137
138def FeatureDFB  : SubtargetFeature<"dfb", "HasFullDataBarrier", "true",
139                                   "Has full data barrier (dfb) instruction">;
140
141def FeatureAcquireRelease : SubtargetFeature<"acquire-release",
142                                             "HasAcquireRelease", "true",
143                                             "Has v8 acquire/release (lda/ldaex "
144                                             " etc) instructions">;
145
146
147def FeatureSlowFPBrcc     : SubtargetFeature<"slow-fp-brcc", "SlowFPBrcc", "true",
148                                             "FP compare + branch is slow">;
149
150def FeaturePerfMon        : SubtargetFeature<"perfmon", "HasPerfMon", "true",
151                                             "Enable support for Performance "
152                                             "Monitor extensions">;
153
154
155// TrustZone Security Extensions
156def FeatureTrustZone      : SubtargetFeature<"trustzone", "HasTrustZone", "true",
157                                             "Enable support for TrustZone "
158                                             "security extensions">;
159
160def Feature8MSecExt       : SubtargetFeature<"8msecext", "Has8MSecExt", "true",
161                                             "Enable support for ARMv8-M "
162                                             "Security Extensions">;
163
164def FeatureSHA2           : SubtargetFeature<"sha2", "HasSHA2", "true",
165                                             "Enable SHA1 and SHA256 support", [FeatureNEON]>;
166
167def FeatureAES            : SubtargetFeature<"aes", "HasAES", "true",
168                                             "Enable AES support", [FeatureNEON]>;
169
170def FeatureCrypto         : SubtargetFeature<"crypto", "HasCrypto", "true",
171                                             "Enable support for "
172                                             "Cryptography extensions",
173                                             [FeatureNEON, FeatureSHA2, FeatureAES]>;
174
175def FeatureCRC            : SubtargetFeature<"crc", "HasCRC", "true",
176                                             "Enable support for CRC instructions">;
177
178def FeatureDotProd        : SubtargetFeature<"dotprod", "HasDotProd", "true",
179                                             "Enable support for dot product instructions",
180                                             [FeatureNEON]>;
181
182// Not to be confused with FeatureHasRetAddrStack (return address stack)
183def FeatureRAS            : SubtargetFeature<"ras", "HasRAS", "true",
184                                             "Enable Reliability, Availability "
185                                             "and Serviceability extensions">;
186
187// Fast computation of non-negative address offsets
188def FeatureFPAO           : SubtargetFeature<"fpao", "HasFPAO", "true",
189                                             "Enable fast computation of "
190                                             "positive address offsets">;
191
192// Fast execution of AES crypto operations
193def FeatureFuseAES        : SubtargetFeature<"fuse-aes", "HasFuseAES", "true",
194                                             "CPU fuses AES crypto operations">;
195
196// Fast execution of bottom and top halves of literal generation
197def FeatureFuseLiterals   : SubtargetFeature<"fuse-literals", "HasFuseLiterals", "true",
198                                             "CPU fuses literal generation operations">;
199
200// The way of reading thread pointer
201def FeatureReadTp :  SubtargetFeature<"read-tp-hard", "ReadTPHard", "true",
202                                      "Reading thread pointer from register">;
203
204// Cyclone can zero VFP registers in 0 cycles.
205def FeatureZCZeroing      : SubtargetFeature<"zcz", "HasZeroCycleZeroing", "true",
206                                             "Has zero-cycle zeroing instructions">;
207
208// Whether it is profitable to unpredicate certain instructions during if-conversion
209def FeatureProfUnpredicate : SubtargetFeature<"prof-unpr",
210                                              "IsProfitableToUnpredicate", "true",
211                                              "Is profitable to unpredicate">;
212
213// Some targets (e.g. Swift) have microcoded VGETLNi32.
214def FeatureSlowVGETLNi32  : SubtargetFeature<"slow-vgetlni32",
215                                             "HasSlowVGETLNi32", "true",
216                                             "Has slow VGETLNi32 - prefer VMOV">;
217
218// Some targets (e.g. Swift) have microcoded VDUP32.
219def FeatureSlowVDUP32     : SubtargetFeature<"slow-vdup32", "HasSlowVDUP32",
220                                             "true",
221                                             "Has slow VDUP32 - prefer VMOV">;
222
223// Some targets (e.g. Cortex-A9) prefer VMOVSR to VMOVDRR even when using NEON
224// for scalar FP, as this allows more effective execution domain optimization.
225def FeaturePreferVMOVSR   : SubtargetFeature<"prefer-vmovsr", "PreferVMOVSR",
226                                             "true", "Prefer VMOVSR">;
227
228// Swift has ISHST barriers compatible with Atomic Release semantics but weaker
229// than ISH
230def FeaturePrefISHSTBarrier : SubtargetFeature<"prefer-ishst", "PreferISHST",
231                                               "true", "Prefer ISHST barriers">;
232
233// Some targets (e.g. Cortex-A9) have muxed AGU and NEON/FPU.
234def FeatureMuxedUnits     : SubtargetFeature<"muxed-units", "HasMuxedUnits",
235                                             "true",
236                                             "Has muxed AGU and NEON/FPU">;
237
238// Whether VLDM/VSTM starting with odd register number need more microops
239// than single VLDRS
240def FeatureSlowOddRegister : SubtargetFeature<"slow-odd-reg", "SlowOddRegister",
241                                              "true", "VLDM/VSTM starting "
242                                              "with an odd register is slow">;
243
244// Some targets have a renaming dependency when loading into D subregisters.
245def FeatureSlowLoadDSubreg : SubtargetFeature<"slow-load-D-subreg",
246                                              "SlowLoadDSubregister", "true",
247                                              "Loading into D subregs is slow">;
248
249def FeatureUseWideStrideVFP : SubtargetFeature<"wide-stride-vfp",
250                                               "UseWideStrideVFP", "true",
251                                               "Use a wide stride when allocating VFP registers">;
252
253// Some targets (e.g. Cortex-A15) never want VMOVS to be widened to VMOVD.
254def FeatureDontWidenVMOVS : SubtargetFeature<"dont-widen-vmovs",
255                                             "DontWidenVMOVS", "true",
256                                             "Don't widen VMOVS to VMOVD">;
257
258// Some targets (e.g. Cortex-A15) prefer to avoid mixing operations on different
259// VFP register widths.
260def FeatureSplatVFPToNeon : SubtargetFeature<"splat-vfp-neon",
261                                             "SplatVFPToNeon", "true",
262                                             "Splat register from VFP to NEON",
263                                             [FeatureDontWidenVMOVS]>;
264
265// Whether or not it is profitable to expand VFP/NEON MLA/MLS instructions.
266def FeatureExpandMLx      : SubtargetFeature<"expand-fp-mlx",
267                                             "ExpandMLx", "true",
268                                             "Expand VFP/NEON MLA/MLS instructions">;
269
270// Some targets have special RAW hazards for VFP/NEON VMLA/VMLS.
271def FeatureHasVMLxHazards : SubtargetFeature<"vmlx-hazards", "HasVMLxHazards",
272                                             "true", "Has VMLx hazards">;
273
274// Some targets (e.g. Cortex-A9) want to convert VMOVRS, VMOVSR and VMOVS from
275// VFP to NEON, as an execution domain optimization.
276def FeatureNEONForFPMovs  : SubtargetFeature<"neon-fpmovs",
277                                             "UseNEONForFPMovs", "true",
278                                             "Convert VMOVSR, VMOVRS, "
279                                             "VMOVS to NEON">;
280
281// Some processors benefit from using NEON instructions for scalar
282// single-precision FP operations. This affects instruction selection and should
283// only be enabled if the handling of denormals is not important.
284def FeatureNEONForFP      : SubtargetFeature<"neonfp",
285                                             "UseNEONForSinglePrecisionFP",
286                                             "true",
287                                             "Use NEON for single precision FP">;
288
289// On some processors, VLDn instructions that access unaligned data take one
290// extra cycle. Take that into account when computing operand latencies.
291def FeatureCheckVLDnAlign : SubtargetFeature<"vldn-align", "CheckVLDnAlign",
292                                             "true",
293                                             "Check for VLDn unaligned access">;
294
295// Some processors have a nonpipelined VFP coprocessor.
296def FeatureNonpipelinedVFP : SubtargetFeature<"nonpipelined-vfp",
297                                              "NonpipelinedVFP", "true",
298                                              "VFP instructions are not pipelined">;
299
300// Some processors have FP multiply-accumulate instructions that don't
301// play nicely with other VFP / NEON instructions, and it's generally better
302// to just not use them.
303def FeatureHasSlowFPVMLx  : SubtargetFeature<"slowfpvmlx", "SlowFPVMLx", "true",
304                                             "Disable VFP / NEON MAC instructions">;
305
306// VFPv4 added VFMA instructions that can similar be fast or slow.
307def FeatureHasSlowFPVFMx  : SubtargetFeature<"slowfpvfmx", "SlowFPVFMx", "true",
308                                             "Disable VFP / NEON FMA instructions">;
309
310// Cortex-A8 / A9 Advanced SIMD has multiplier accumulator forwarding.
311def FeatureVMLxForwarding : SubtargetFeature<"vmlx-forwarding",
312                                             "HasVMLxForwarding", "true",
313                                             "Has multiplier accumulator forwarding">;
314
315// Disable 32-bit to 16-bit narrowing for experimentation.
316def FeaturePref32BitThumb : SubtargetFeature<"32bit", "Pref32BitThumb", "true",
317                                             "Prefer 32-bit Thumb instrs">;
318
319def FeaturePrefLoopAlign32 : SubtargetFeature<"loop-align", "PrefLoopLogAlignment","2",
320                                              "Prefer 32-bit alignment for loops">;
321
322def FeatureMVEVectorCostFactor1 : SubtargetFeature<"mve1beat", "MVEVectorCostFactor", "1",
323                        "Model MVE instructions as a 1 beat per tick architecture">;
324
325def FeatureMVEVectorCostFactor2 : SubtargetFeature<"mve2beat", "MVEVectorCostFactor", "2",
326                        "Model MVE instructions as a 2 beats per tick architecture">;
327
328def FeatureMVEVectorCostFactor4 : SubtargetFeature<"mve4beat", "MVEVectorCostFactor", "4",
329                        "Model MVE instructions as a 4 beats per tick architecture">;
330
331/// Some instructions update CPSR partially, which can add false dependency for
332/// out-of-order implementation, e.g. Cortex-A9, unless each individual bit is
333/// mapped to a separate physical register. Avoid partial CPSR update for these
334/// processors.
335def FeatureAvoidPartialCPSR : SubtargetFeature<"avoid-partial-cpsr",
336                                               "AvoidCPSRPartialUpdate", "true",
337                                 "Avoid CPSR partial update for OOO execution">;
338
339/// Disable +1 predication cost for instructions updating CPSR.
340/// Enabled for Cortex-A57.
341def FeatureCheapPredicableCPSR : SubtargetFeature<"cheap-predicable-cpsr",
342                                                  "CheapPredicableCPSRDef",
343                                                  "true",
344                  "Disable +1 predication cost for instructions updating CPSR">;
345
346def FeatureAvoidMOVsShOp  : SubtargetFeature<"avoid-movs-shop",
347                                             "AvoidMOVsShifterOperand", "true",
348                                             "Avoid movs instructions with "
349                                             "shifter operand">;
350
351// Some processors perform return stack prediction. CodeGen should avoid issue
352// "normal" call instructions to callees which do not return.
353def FeatureHasRetAddrStack : SubtargetFeature<"ret-addr-stack",
354                                              "HasRetAddrStack", "true",
355                                              "Has return address stack">;
356
357// Some processors have no branch predictor, which changes the expected cost of
358// taking a branch which affects the choice of whether to use predicated
359// instructions.
360def FeatureHasNoBranchPredictor : SubtargetFeature<"no-branch-predictor",
361                                                   "HasBranchPredictor", "false",
362                                                   "Has no branch predictor">;
363
364/// DSP extension.
365def FeatureDSP            : SubtargetFeature<"dsp", "HasDSP", "true",
366                                             "Supports DSP instructions in "
367                                             "ARM and/or Thumb2">;
368
369// Multiprocessing extension.
370def FeatureMP             : SubtargetFeature<"mp", "HasMPExtension", "true",
371                                        "Supports Multiprocessing extension">;
372
373// Virtualization extension - requires HW divide (ARMv7-AR ARMARM - 4.4.8).
374def FeatureVirtualization : SubtargetFeature<"virtualization",
375                                             "HasVirtualization", "true",
376                                             "Supports Virtualization extension",
377                                             [FeatureHWDivThumb, FeatureHWDivARM]>;
378
379// Special TRAP encoding for NaCl, which looks like a TRAP in Thumb too.
380// See ARMInstrInfo.td for details.
381def FeatureNaClTrap       : SubtargetFeature<"nacl-trap", "UseNaClTrap", "true",
382                                             "NaCl trap">;
383
384def FeatureStrictAlign    : SubtargetFeature<"strict-align",
385                                             "StrictAlign", "true",
386                                             "Disallow all unaligned memory "
387                                             "access">;
388
389def FeatureLongCalls      : SubtargetFeature<"long-calls", "GenLongCalls", "true",
390                                             "Generate calls via indirect call "
391                                             "instructions">;
392
393def FeatureExecuteOnly    : SubtargetFeature<"execute-only",
394                                             "GenExecuteOnly", "true",
395                                             "Enable the generation of "
396                                             "execute only code.">;
397
398def FeatureReserveR9      : SubtargetFeature<"reserve-r9", "ReserveR9", "true",
399                                             "Reserve R9, making it unavailable"
400                                             " as GPR">;
401
402def FeatureNoMovt         : SubtargetFeature<"no-movt", "NoMovt", "true",
403                                             "Don't use movt/movw pairs for "
404                                             "32-bit imms">;
405
406def FeatureNoNegativeImmediates
407                          : SubtargetFeature<"no-neg-immediates",
408                                             "NegativeImmediates", "false",
409                                             "Convert immediates and instructions "
410                                             "to their negated or complemented "
411                                             "equivalent when the immediate does "
412                                             "not fit in the encoding.">;
413
414// Use the MachineScheduler for instruction scheduling for the subtarget.
415def FeatureUseMISched: SubtargetFeature<"use-misched", "UseMISched", "true",
416                                        "Use the MachineScheduler">;
417
418def FeatureNoPostRASched : SubtargetFeature<"disable-postra-scheduler",
419    "DisablePostRAScheduler", "true",
420    "Don't schedule again after register allocation">;
421
422// Armv8.5-A extensions
423
424def FeatureSB       : SubtargetFeature<"sb", "HasSB", "true",
425  "Enable v8.5a Speculation Barrier" >;
426
427// Armv8.6-A extensions
428def FeatureBF16     : SubtargetFeature<"bf16", "HasBF16", "true",
429  "Enable support for BFloat16 instructions",  [FeatureNEON]>;
430
431def FeatureMatMulInt8 : SubtargetFeature<"i8mm", "HasMatMulInt8",
432    "true", "Enable Matrix Multiply Int8 Extension", [FeatureNEON]>;
433
434// Armv8.1-M extensions
435
436def FeatureLOB            : SubtargetFeature<"lob", "HasLOB", "true",
437                                             "Enable Low Overhead Branch "
438                                             "extensions">;
439
440def FeatureFixCMSE_CVE_2021_35465 : SubtargetFeature<"fix-cmse-cve-2021-35465",
441                                        "FixCMSE_CVE_2021_35465", "true",
442                                        "Mitigate against the cve-2021-35465 "
443                                        "security vulnurability">;
444
445def FeaturePACBTI         : SubtargetFeature<"pacbti", "HasPACBTI", "true",
446                                             "Enable Pointer Authentication and Branch "
447                                             "Target Identification">;
448
449//===----------------------------------------------------------------------===//
450// ARM architecture class
451//
452
453// A-series ISA
454def FeatureAClass : SubtargetFeature<"aclass", "ARMProcClass", "AClass",
455                                     "Is application profile ('A' series)">;
456
457// R-series ISA
458def FeatureRClass : SubtargetFeature<"rclass", "ARMProcClass", "RClass",
459                                     "Is realtime profile ('R' series)">;
460
461// M-series ISA
462def FeatureMClass : SubtargetFeature<"mclass", "ARMProcClass", "MClass",
463                                     "Is microcontroller profile ('M' series)">;
464
465
466def FeatureThumb2 : SubtargetFeature<"thumb2", "HasThumb2", "true",
467                                     "Enable Thumb2 instructions">;
468
469def FeatureNoARM  : SubtargetFeature<"noarm", "NoARM", "true",
470                                     "Does not support ARM mode execution">;
471
472//===----------------------------------------------------------------------===//
473// ARM ISAa.
474//
475
476def HasV4TOps   : SubtargetFeature<"v4t", "HasV4TOps", "true",
477                                   "Support ARM v4T instructions">;
478
479def HasV5TOps   : SubtargetFeature<"v5t", "HasV5TOps", "true",
480                                   "Support ARM v5T instructions",
481                                   [HasV4TOps]>;
482
483def HasV5TEOps  : SubtargetFeature<"v5te", "HasV5TEOps", "true",
484                                   "Support ARM v5TE, v5TEj, and "
485                                   "v5TExp instructions",
486                                   [HasV5TOps]>;
487
488def HasV6Ops    : SubtargetFeature<"v6", "HasV6Ops", "true",
489                                   "Support ARM v6 instructions",
490                                   [HasV5TEOps]>;
491
492def HasV6MOps   : SubtargetFeature<"v6m", "HasV6MOps", "true",
493                                   "Support ARM v6M instructions",
494                                   [HasV6Ops]>;
495
496def HasV8MBaselineOps : SubtargetFeature<"v8m", "HasV8MBaselineOps", "true",
497                                         "Support ARM v8M Baseline instructions",
498                                         [HasV6MOps]>;
499
500def HasV6KOps   : SubtargetFeature<"v6k", "HasV6KOps", "true",
501                                   "Support ARM v6k instructions",
502                                   [HasV6Ops]>;
503
504def HasV6T2Ops  : SubtargetFeature<"v6t2", "HasV6T2Ops", "true",
505                                   "Support ARM v6t2 instructions",
506                                   [HasV8MBaselineOps, HasV6KOps, FeatureThumb2]>;
507
508def HasV7Ops    : SubtargetFeature<"v7", "HasV7Ops", "true",
509                                   "Support ARM v7 instructions",
510                                   [HasV6T2Ops, FeaturePerfMon,
511                                    FeatureV7Clrex]>;
512
513def HasV8MMainlineOps :
514                  SubtargetFeature<"v8m.main", "HasV8MMainlineOps", "true",
515                                   "Support ARM v8M Mainline instructions",
516                                   [HasV7Ops]>;
517
518def HasV8Ops    : SubtargetFeature<"v8", "HasV8Ops", "true",
519                                   "Support ARM v8 instructions",
520                                   [HasV7Ops, FeatureAcquireRelease]>;
521
522def HasV8_1aOps : SubtargetFeature<"v8.1a", "HasV8_1aOps", "true",
523                                   "Support ARM v8.1a instructions",
524                                   [HasV8Ops]>;
525
526def HasV8_2aOps : SubtargetFeature<"v8.2a", "HasV8_2aOps", "true",
527                                   "Support ARM v8.2a instructions",
528                                   [HasV8_1aOps]>;
529
530def HasV8_3aOps   : SubtargetFeature<"v8.3a", "HasV8_3aOps", "true",
531                                   "Support ARM v8.3a instructions",
532                                   [HasV8_2aOps]>;
533
534def HasV8_4aOps   : SubtargetFeature<"v8.4a", "HasV8_4aOps", "true",
535                                   "Support ARM v8.4a instructions",
536                                   [HasV8_3aOps, FeatureDotProd]>;
537
538def HasV8_5aOps   : SubtargetFeature<"v8.5a", "HasV8_5aOps", "true",
539                                   "Support ARM v8.5a instructions",
540                                   [HasV8_4aOps, FeatureSB]>;
541
542def HasV8_6aOps   : SubtargetFeature<"v8.6a", "HasV8_6aOps", "true",
543                                   "Support ARM v8.6a instructions",
544                                   [HasV8_5aOps, FeatureBF16,
545                                    FeatureMatMulInt8]>;
546
547def HasV8_7aOps   : SubtargetFeature<"v8.7a", "HasV8_7aOps", "true",
548                                   "Support ARM v8.7a instructions",
549                                   [HasV8_6aOps]>;
550
551def HasV9_0aOps   : SubtargetFeature<"v9a", "HasV9_0aOps", "true",
552                                   "Support ARM v9a instructions",
553                                   [HasV8_5aOps]>;
554
555def HasV9_1aOps   : SubtargetFeature<"v9.1a", "HasV9_1aOps", "true",
556                                   "Support ARM v9.1a instructions",
557                                   [HasV8_6aOps, HasV9_0aOps]>;
558
559def HasV9_2aOps   : SubtargetFeature<"v9.2a", "HasV9_2aOps", "true",
560                                   "Support ARM v9.2a instructions",
561                                   [HasV8_7aOps, HasV9_1aOps]>;
562
563def HasV8_1MMainlineOps : SubtargetFeature<
564               "v8.1m.main", "HasV8_1MMainlineOps", "true",
565               "Support ARM v8-1M Mainline instructions",
566               [HasV8MMainlineOps]>;
567def HasMVEIntegerOps : SubtargetFeature<
568               "mve", "HasMVEIntegerOps", "true",
569               "Support M-Class Vector Extension with integer ops",
570               [HasV8_1MMainlineOps, FeatureDSP, FeatureFPRegs16, FeatureFPRegs64]>;
571def HasMVEFloatOps : SubtargetFeature<
572               "mve.fp", "HasMVEFloatOps", "true",
573               "Support M-Class Vector Extension with integer and floating ops",
574               [HasMVEIntegerOps, FeatureFPARMv8_D16_SP, FeatureFullFP16]>;
575
576def HasCDEOps : SubtargetFeature<"cde", "HasCDEOps", "true",
577                                 "Support CDE instructions",
578                                 [HasV8MMainlineOps]>;
579
580foreach i = {0-7} in
581    def FeatureCoprocCDE#i : SubtargetFeature<"cdecp"#i,
582                                              "CoprocCDE["#i#"]", "true",
583                                              "Coprocessor "#i#" ISA is CDEv1",
584                                              [HasCDEOps]>;
585
586//===----------------------------------------------------------------------===//
587// Control codegen mitigation against Straight Line Speculation vulnerability.
588//===----------------------------------------------------------------------===//
589
590def FeatureHardenSlsRetBr : SubtargetFeature<"harden-sls-retbr",
591  "HardenSlsRetBr", "true",
592  "Harden against straight line speculation across RETurn and BranchRegister "
593  "instructions">;
594def FeatureHardenSlsBlr : SubtargetFeature<"harden-sls-blr",
595  "HardenSlsBlr", "true",
596  "Harden against straight line speculation across indirect calls">;
597def FeatureHardenSlsNoComdat : SubtargetFeature<"harden-sls-nocomdat",
598  "HardenSlsNoComdat", "true",
599  "Generate thunk code for SLS mitigation in the normal text section">;
600
601//===----------------------------------------------------------------------===//
602// ARM Processor subtarget features.
603//
604
605def ProcA5      : SubtargetFeature<"a5", "ARMProcFamily", "CortexA5",
606                                   "Cortex-A5 ARM processors", []>;
607def ProcA7      : SubtargetFeature<"a7", "ARMProcFamily", "CortexA7",
608                                   "Cortex-A7 ARM processors", []>;
609def ProcA8      : SubtargetFeature<"a8", "ARMProcFamily", "CortexA8",
610                                   "Cortex-A8 ARM processors", []>;
611def ProcA9      : SubtargetFeature<"a9", "ARMProcFamily", "CortexA9",
612                                   "Cortex-A9 ARM processors", []>;
613def ProcA12     : SubtargetFeature<"a12", "ARMProcFamily", "CortexA12",
614                                   "Cortex-A12 ARM processors", []>;
615def ProcA15     : SubtargetFeature<"a15", "ARMProcFamily", "CortexA15",
616                                   "Cortex-A15 ARM processors", []>;
617def ProcA17     : SubtargetFeature<"a17", "ARMProcFamily", "CortexA17",
618                                   "Cortex-A17 ARM processors", []>;
619def ProcA32     : SubtargetFeature<"a32", "ARMProcFamily", "CortexA32",
620                                   "Cortex-A32 ARM processors", []>;
621def ProcA35     : SubtargetFeature<"a35", "ARMProcFamily", "CortexA35",
622                                   "Cortex-A35 ARM processors", []>;
623def ProcA53     : SubtargetFeature<"a53", "ARMProcFamily", "CortexA53",
624                                   "Cortex-A53 ARM processors", []>;
625def ProcA55     : SubtargetFeature<"a55", "ARMProcFamily", "CortexA55",
626                                   "Cortex-A55 ARM processors", []>;
627def ProcA57     : SubtargetFeature<"a57", "ARMProcFamily", "CortexA57",
628                                   "Cortex-A57 ARM processors", []>;
629def ProcA72     : SubtargetFeature<"a72", "ARMProcFamily", "CortexA72",
630                                   "Cortex-A72 ARM processors", []>;
631def ProcA73     : SubtargetFeature<"a73", "ARMProcFamily", "CortexA73",
632                                   "Cortex-A73 ARM processors", []>;
633def ProcA75     : SubtargetFeature<"a75", "ARMProcFamily", "CortexA75",
634                                   "Cortex-A75 ARM processors", []>;
635def ProcA76     : SubtargetFeature<"a76", "ARMProcFamily", "CortexA76",
636                                   "Cortex-A76 ARM processors", []>;
637def ProcA77     : SubtargetFeature<"a77", "ARMProcFamily", "CortexA77",
638                                   "Cortex-A77 ARM processors", []>;
639def ProcA78     : SubtargetFeature<"cortex-a78", "ARMProcFamily", "CortexA78",
640                                   "Cortex-A78 ARM processors", []>;
641def ProcA78C    : SubtargetFeature<"a78c", "ARMProcFamily", "CortexA78C",
642                                   "Cortex-A78C ARM processors", []>;
643def ProcA710    : SubtargetFeature<"cortex-a710", "ARMProcFamily",
644                                   "CortexA710", "Cortex-A710 ARM processors", []>;
645def ProcX1      : SubtargetFeature<"cortex-x1", "ARMProcFamily", "CortexX1",
646                                   "Cortex-X1 ARM processors", []>;
647
648def ProcV1      : SubtargetFeature<"neoverse-v1", "ARMProcFamily",
649                                   "NeoverseV1", "Neoverse-V1 ARM processors", []>;
650
651def ProcKrait   : SubtargetFeature<"krait", "ARMProcFamily", "Krait",
652                                   "Qualcomm Krait processors", []>;
653def ProcKryo    : SubtargetFeature<"kryo", "ARMProcFamily", "Kryo",
654                                   "Qualcomm Kryo processors", []>;
655def ProcSwift   : SubtargetFeature<"swift", "ARMProcFamily", "Swift",
656                                   "Swift ARM processors", []>;
657
658def ProcExynos  : SubtargetFeature<"exynos", "ARMProcFamily", "Exynos",
659                                   "Samsung Exynos processors",
660                                   [FeatureZCZeroing,
661                                    FeatureUseWideStrideVFP,
662                                    FeatureSplatVFPToNeon,
663                                    FeatureSlowVGETLNi32,
664                                    FeatureSlowVDUP32,
665                                    FeatureSlowFPBrcc,
666                                    FeatureProfUnpredicate,
667                                    FeatureHWDivThumb,
668                                    FeatureHWDivARM,
669                                    FeatureHasSlowFPVMLx,
670                                    FeatureHasSlowFPVFMx,
671                                    FeatureHasRetAddrStack,
672                                    FeatureFuseLiterals,
673                                    FeatureFuseAES,
674                                    FeatureExpandMLx,
675                                    FeatureCrypto,
676                                    FeatureCRC]>;
677
678def ProcR4      : SubtargetFeature<"r4", "ARMProcFamily", "CortexR4",
679                                   "Cortex-R4 ARM processors", []>;
680def ProcR5      : SubtargetFeature<"r5", "ARMProcFamily", "CortexR5",
681                                   "Cortex-R5 ARM processors", []>;
682def ProcR7      : SubtargetFeature<"r7", "ARMProcFamily", "CortexR7",
683                                   "Cortex-R7 ARM processors", []>;
684def ProcR52     : SubtargetFeature<"r52", "ARMProcFamily", "CortexR52",
685                                   "Cortex-R52 ARM processors", []>;
686
687def ProcM3      : SubtargetFeature<"m3", "ARMProcFamily", "CortexM3",
688                                   "Cortex-M3 ARM processors", []>;
689def ProcM7      : SubtargetFeature<"m7", "ARMProcFamily", "CortexM7",
690                                   "Cortex-M7 ARM processors", []>;
691
692//===----------------------------------------------------------------------===//
693// ARM Helper classes.
694//
695
696class Architecture<string fname, string aname, list<SubtargetFeature> features>
697  : SubtargetFeature<fname, "ARMArch", aname,
698                     !strconcat(aname, " architecture"), features>;
699
700class ProcNoItin<string Name, list<SubtargetFeature> Features>
701  : Processor<Name, NoItineraries, Features>;
702
703
704//===----------------------------------------------------------------------===//
705// ARM architectures
706//
707
708def ARMv2     : Architecture<"armv2",     "ARMv2",    []>;
709
710def ARMv2a    : Architecture<"armv2a",    "ARMv2a",   []>;
711
712def ARMv3     : Architecture<"armv3",     "ARMv3",    []>;
713
714def ARMv3m    : Architecture<"armv3m",    "ARMv3m",   []>;
715
716def ARMv4     : Architecture<"armv4",     "ARMv4",    []>;
717
718def ARMv4t    : Architecture<"armv4t",    "ARMv4t",   [HasV4TOps]>;
719
720def ARMv5t    : Architecture<"armv5t",    "ARMv5t",   [HasV5TOps]>;
721
722def ARMv5te   : Architecture<"armv5te",   "ARMv5te",  [HasV5TEOps]>;
723
724def ARMv5tej  : Architecture<"armv5tej",  "ARMv5tej", [HasV5TEOps]>;
725
726def ARMv6     : Architecture<"armv6",     "ARMv6",    [HasV6Ops,
727                                                       FeatureDSP]>;
728
729def ARMv6t2   : Architecture<"armv6t2",   "ARMv6t2",  [HasV6T2Ops,
730                                                       FeatureDSP]>;
731
732def ARMv6k    : Architecture<"armv6k",    "ARMv6k",   [HasV6KOps]>;
733
734def ARMv6kz   : Architecture<"armv6kz",   "ARMv6kz",  [HasV6KOps,
735                                                       FeatureTrustZone]>;
736
737def ARMv6m    : Architecture<"armv6-m",   "ARMv6m",   [HasV6MOps,
738                                                       FeatureNoARM,
739                                                       ModeThumb,
740                                                       FeatureDB,
741                                                       FeatureMClass,
742                                                       FeatureStrictAlign]>;
743
744def ARMv6sm   : Architecture<"armv6s-m",  "ARMv6sm",  [HasV6MOps,
745                                                       FeatureNoARM,
746                                                       ModeThumb,
747                                                       FeatureDB,
748                                                       FeatureMClass,
749                                                       FeatureStrictAlign]>;
750
751def ARMv7a    : Architecture<"armv7-a",   "ARMv7a",   [HasV7Ops,
752                                                       FeatureNEON,
753                                                       FeatureDB,
754                                                       FeatureDSP,
755                                                       FeatureAClass]>;
756
757def ARMv7ve   : Architecture<"armv7ve",   "ARMv7ve",  [HasV7Ops,
758                                                       FeatureNEON,
759                                                       FeatureDB,
760                                                       FeatureDSP,
761                                                       FeatureTrustZone,
762                                                       FeatureMP,
763                                                       FeatureVirtualization,
764                                                       FeatureAClass]>;
765
766def ARMv7r    : Architecture<"armv7-r",   "ARMv7r",   [HasV7Ops,
767                                                       FeatureDB,
768                                                       FeatureDSP,
769                                                       FeatureHWDivThumb,
770                                                       FeatureRClass]>;
771
772def ARMv7m    : Architecture<"armv7-m",   "ARMv7m",   [HasV7Ops,
773                                                       FeatureThumb2,
774                                                       FeatureNoARM,
775                                                       ModeThumb,
776                                                       FeatureDB,
777                                                       FeatureHWDivThumb,
778                                                       FeatureMClass]>;
779
780def ARMv7em   : Architecture<"armv7e-m",  "ARMv7em",  [HasV7Ops,
781                                                       FeatureThumb2,
782                                                       FeatureNoARM,
783                                                       ModeThumb,
784                                                       FeatureDB,
785                                                       FeatureHWDivThumb,
786                                                       FeatureMClass,
787                                                       FeatureDSP]>;
788
789def ARMv8a    : Architecture<"armv8-a",   "ARMv8a",   [HasV8Ops,
790                                                       FeatureAClass,
791                                                       FeatureDB,
792                                                       FeatureFPARMv8,
793                                                       FeatureNEON,
794                                                       FeatureDSP,
795                                                       FeatureTrustZone,
796                                                       FeatureMP,
797                                                       FeatureVirtualization,
798                                                       FeatureCrypto,
799                                                       FeatureCRC]>;
800
801def ARMv81a   : Architecture<"armv8.1-a", "ARMv81a",  [HasV8_1aOps,
802                                                       FeatureAClass,
803                                                       FeatureDB,
804                                                       FeatureFPARMv8,
805                                                       FeatureNEON,
806                                                       FeatureDSP,
807                                                       FeatureTrustZone,
808                                                       FeatureMP,
809                                                       FeatureVirtualization,
810                                                       FeatureCrypto,
811                                                       FeatureCRC]>;
812
813def ARMv82a   : Architecture<"armv8.2-a", "ARMv82a",  [HasV8_2aOps,
814                                                       FeatureAClass,
815                                                       FeatureDB,
816                                                       FeatureFPARMv8,
817                                                       FeatureNEON,
818                                                       FeatureDSP,
819                                                       FeatureTrustZone,
820                                                       FeatureMP,
821                                                       FeatureVirtualization,
822                                                       FeatureCrypto,
823                                                       FeatureCRC,
824                                                       FeatureRAS]>;
825
826def ARMv83a   : Architecture<"armv8.3-a", "ARMv83a",  [HasV8_3aOps,
827                                                       FeatureAClass,
828                                                       FeatureDB,
829                                                       FeatureFPARMv8,
830                                                       FeatureNEON,
831                                                       FeatureDSP,
832                                                       FeatureTrustZone,
833                                                       FeatureMP,
834                                                       FeatureVirtualization,
835                                                       FeatureCrypto,
836                                                       FeatureCRC,
837                                                       FeatureRAS]>;
838
839def ARMv84a   : Architecture<"armv8.4-a", "ARMv84a",  [HasV8_4aOps,
840                                                       FeatureAClass,
841                                                       FeatureDB,
842                                                       FeatureFPARMv8,
843                                                       FeatureNEON,
844                                                       FeatureDSP,
845                                                       FeatureTrustZone,
846                                                       FeatureMP,
847                                                       FeatureVirtualization,
848                                                       FeatureCrypto,
849                                                       FeatureCRC,
850                                                       FeatureRAS,
851                                                       FeatureDotProd]>;
852
853def ARMv85a   : Architecture<"armv8.5-a", "ARMv85a",  [HasV8_5aOps,
854                                                       FeatureAClass,
855                                                       FeatureDB,
856                                                       FeatureFPARMv8,
857                                                       FeatureNEON,
858                                                       FeatureDSP,
859                                                       FeatureTrustZone,
860                                                       FeatureMP,
861                                                       FeatureVirtualization,
862                                                       FeatureCrypto,
863                                                       FeatureCRC,
864                                                       FeatureRAS,
865                                                       FeatureDotProd]>;
866def ARMv86a   : Architecture<"armv8.6-a", "ARMv86a",  [HasV8_6aOps,
867                                                       FeatureAClass,
868                                                       FeatureDB,
869                                                       FeatureFPARMv8,
870                                                       FeatureNEON,
871                                                       FeatureDSP,
872                                                       FeatureTrustZone,
873                                                       FeatureMP,
874                                                       FeatureVirtualization,
875                                                       FeatureCrypto,
876                                                       FeatureCRC,
877                                                       FeatureRAS,
878                                                       FeatureDotProd]>;
879def ARMv87a   : Architecture<"armv8.7-a", "ARMv87a",  [HasV8_7aOps,
880                                                       FeatureAClass,
881                                                       FeatureDB,
882                                                       FeatureFPARMv8,
883                                                       FeatureNEON,
884                                                       FeatureDSP,
885                                                       FeatureTrustZone,
886                                                       FeatureMP,
887                                                       FeatureVirtualization,
888                                                       FeatureCrypto,
889                                                       FeatureCRC,
890                                                       FeatureRAS,
891                                                       FeatureDotProd]>;
892
893def ARMv9a   : Architecture<"armv9-a", "ARMv9a",       [HasV9_0aOps,
894                                                       FeatureAClass,
895                                                       FeatureDB,
896                                                       FeatureFPARMv8,
897                                                       FeatureNEON,
898                                                       FeatureDSP,
899                                                       FeatureTrustZone,
900                                                       FeatureMP,
901                                                       FeatureVirtualization,
902                                                       FeatureCRC,
903                                                       FeatureRAS,
904                                                       FeatureDotProd]>;
905def ARMv91a   : Architecture<"armv9.1-a", "ARMv91a",   [HasV9_1aOps,
906                                                       FeatureAClass,
907                                                       FeatureDB,
908                                                       FeatureFPARMv8,
909                                                       FeatureNEON,
910                                                       FeatureDSP,
911                                                       FeatureTrustZone,
912                                                       FeatureMP,
913                                                       FeatureVirtualization,
914                                                       FeatureCRC,
915                                                       FeatureRAS,
916                                                       FeatureDotProd]>;
917def ARMv92a   : Architecture<"armv9.2-a", "ARMv92a",  [HasV9_2aOps,
918                                                       FeatureAClass,
919                                                       FeatureDB,
920                                                       FeatureFPARMv8,
921                                                       FeatureNEON,
922                                                       FeatureDSP,
923                                                       FeatureTrustZone,
924                                                       FeatureMP,
925                                                       FeatureVirtualization,
926                                                       FeatureCRC,
927                                                       FeatureRAS,
928                                                       FeatureDotProd]>;
929
930def ARMv8r    : Architecture<"armv8-r",   "ARMv8r",   [HasV8Ops,
931                                                       FeatureRClass,
932                                                       FeatureDB,
933                                                       FeatureDFB,
934                                                       FeatureDSP,
935                                                       FeatureCRC,
936                                                       FeatureMP,
937                                                       FeatureVirtualization,
938                                                       FeatureFPARMv8,
939                                                       FeatureNEON]>;
940
941def ARMv8mBaseline : Architecture<"armv8-m.base", "ARMv8mBaseline",
942                                                      [HasV8MBaselineOps,
943                                                       FeatureNoARM,
944                                                       ModeThumb,
945                                                       FeatureDB,
946                                                       FeatureHWDivThumb,
947                                                       FeatureV7Clrex,
948                                                       Feature8MSecExt,
949                                                       FeatureAcquireRelease,
950                                                       FeatureMClass,
951                                                       FeatureStrictAlign]>;
952
953def ARMv8mMainline : Architecture<"armv8-m.main", "ARMv8mMainline",
954                                                      [HasV8MMainlineOps,
955                                                       FeatureNoARM,
956                                                       ModeThumb,
957                                                       FeatureDB,
958                                                       FeatureHWDivThumb,
959                                                       Feature8MSecExt,
960                                                       FeatureAcquireRelease,
961                                                       FeatureMClass]>;
962
963def ARMv81mMainline : Architecture<"armv8.1-m.main", "ARMv81mMainline",
964                                                      [HasV8_1MMainlineOps,
965                                                       FeatureNoARM,
966                                                       ModeThumb,
967                                                       FeatureDB,
968                                                       FeatureHWDivThumb,
969                                                       Feature8MSecExt,
970                                                       FeatureAcquireRelease,
971                                                       FeatureMClass,
972                                                       FeatureRAS,
973                                                       FeatureLOB]>;
974
975// Aliases
976def IWMMXT   : Architecture<"iwmmxt",      "ARMv5te",  [ARMv5te]>;
977def IWMMXT2  : Architecture<"iwmmxt2",     "ARMv5te",  [ARMv5te]>;
978def XScale   : Architecture<"xscale",      "ARMv5te",  [ARMv5te]>;
979def ARMv6j   : Architecture<"armv6j",      "ARMv7a",   [ARMv6]>;
980def ARMv7k   : Architecture<"armv7k",      "ARMv7a",   [ARMv7a]>;
981def ARMv7s   : Architecture<"armv7s",      "ARMv7a",   [ARMv7a]>;
982
983//===----------------------------------------------------------------------===//
984// Register File Description
985//===----------------------------------------------------------------------===//
986
987include "ARMRegisterInfo.td"
988include "ARMRegisterBanks.td"
989include "ARMCallingConv.td"
990
991//===----------------------------------------------------------------------===//
992// ARM schedules.
993//===----------------------------------------------------------------------===//
994//
995include "ARMPredicates.td"
996include "ARMSchedule.td"
997
998//===----------------------------------------------------------------------===//
999// Instruction Descriptions
1000//===----------------------------------------------------------------------===//
1001
1002include "ARMInstrInfo.td"
1003def ARMInstrInfo : InstrInfo;
1004
1005//===----------------------------------------------------------------------===//
1006// ARM schedules
1007//
1008include "ARMScheduleV6.td"
1009include "ARMScheduleA8.td"
1010include "ARMScheduleA9.td"
1011include "ARMScheduleSwift.td"
1012include "ARMScheduleR52.td"
1013include "ARMScheduleA57.td"
1014include "ARMScheduleM4.td"
1015include "ARMScheduleM7.td"
1016
1017//===----------------------------------------------------------------------===//
1018// ARM processors
1019//
1020// Dummy CPU, used to target architectures
1021def : ProcessorModel<"generic",     CortexA8Model,      []>;
1022
1023// FIXME: Several processors below are not using their own scheduler
1024// model, but one of similar/previous processor. These should be fixed.
1025
1026def : ProcNoItin<"arm8",                                [ARMv4]>;
1027def : ProcNoItin<"arm810",                              [ARMv4]>;
1028def : ProcNoItin<"strongarm",                           [ARMv4]>;
1029def : ProcNoItin<"strongarm110",                        [ARMv4]>;
1030def : ProcNoItin<"strongarm1100",                       [ARMv4]>;
1031def : ProcNoItin<"strongarm1110",                       [ARMv4]>;
1032
1033def : ProcNoItin<"arm7tdmi",                            [ARMv4t]>;
1034def : ProcNoItin<"arm7tdmi-s",                          [ARMv4t]>;
1035def : ProcNoItin<"arm710t",                             [ARMv4t]>;
1036def : ProcNoItin<"arm720t",                             [ARMv4t]>;
1037def : ProcNoItin<"arm9",                                [ARMv4t]>;
1038def : ProcNoItin<"arm9tdmi",                            [ARMv4t]>;
1039def : ProcNoItin<"arm920",                              [ARMv4t]>;
1040def : ProcNoItin<"arm920t",                             [ARMv4t]>;
1041def : ProcNoItin<"arm922t",                             [ARMv4t]>;
1042def : ProcNoItin<"arm940t",                             [ARMv4t]>;
1043def : ProcNoItin<"ep9312",                              [ARMv4t]>;
1044
1045def : ProcNoItin<"arm10tdmi",                           [ARMv5t]>;
1046def : ProcNoItin<"arm1020t",                            [ARMv5t]>;
1047
1048def : ProcNoItin<"arm9e",                               [ARMv5te]>;
1049def : ProcNoItin<"arm926ej-s",                          [ARMv5te]>;
1050def : ProcNoItin<"arm946e-s",                           [ARMv5te]>;
1051def : ProcNoItin<"arm966e-s",                           [ARMv5te]>;
1052def : ProcNoItin<"arm968e-s",                           [ARMv5te]>;
1053def : ProcNoItin<"arm10e",                              [ARMv5te]>;
1054def : ProcNoItin<"arm1020e",                            [ARMv5te]>;
1055def : ProcNoItin<"arm1022e",                            [ARMv5te]>;
1056def : ProcNoItin<"xscale",                              [ARMv5te]>;
1057def : ProcNoItin<"iwmmxt",                              [ARMv5te]>;
1058
1059def : Processor<"arm1136j-s",       ARMV6Itineraries,   [ARMv6]>;
1060def : Processor<"arm1136jf-s",      ARMV6Itineraries,   [ARMv6,
1061                                                         FeatureVFP2,
1062                                                         FeatureHasSlowFPVMLx]>;
1063
1064def : Processor<"cortex-m0",        ARMV6Itineraries,   [ARMv6m,
1065                                                         FeatureHasNoBranchPredictor]>;
1066def : Processor<"cortex-m0plus",    ARMV6Itineraries,   [ARMv6m,
1067                                                         FeatureHasNoBranchPredictor]>;
1068def : Processor<"cortex-m1",        ARMV6Itineraries,   [ARMv6m,
1069                                                         FeatureHasNoBranchPredictor]>;
1070def : Processor<"sc000",            ARMV6Itineraries,   [ARMv6m,
1071                                                         FeatureHasNoBranchPredictor]>;
1072
1073def : Processor<"arm1176jz-s",      ARMV6Itineraries,   [ARMv6kz]>;
1074def : Processor<"arm1176jzf-s",     ARMV6Itineraries,   [ARMv6kz,
1075                                                         FeatureVFP2,
1076                                                         FeatureHasSlowFPVMLx]>;
1077
1078def : Processor<"mpcorenovfp",      ARMV6Itineraries,   [ARMv6k]>;
1079def : Processor<"mpcore",           ARMV6Itineraries,   [ARMv6k,
1080                                                         FeatureVFP2,
1081                                                         FeatureHasSlowFPVMLx]>;
1082
1083def : Processor<"arm1156t2-s",      ARMV6Itineraries,   [ARMv6t2]>;
1084def : Processor<"arm1156t2f-s",     ARMV6Itineraries,   [ARMv6t2,
1085                                                         FeatureVFP2,
1086                                                         FeatureHasSlowFPVMLx]>;
1087
1088def : ProcessorModel<"cortex-a5",   CortexA8Model,      [ARMv7a, ProcA5,
1089                                                         FeatureHasRetAddrStack,
1090                                                         FeatureTrustZone,
1091                                                         FeatureSlowFPBrcc,
1092                                                         FeatureHasSlowFPVMLx,
1093                                                         FeatureHasSlowFPVFMx,
1094                                                         FeatureVMLxForwarding,
1095                                                         FeatureMP,
1096                                                         FeatureVFP4]>;
1097
1098def : ProcessorModel<"cortex-a7",   CortexA8Model,      [ARMv7a, ProcA7,
1099                                                         FeatureHasRetAddrStack,
1100                                                         FeatureTrustZone,
1101                                                         FeatureSlowFPBrcc,
1102                                                         FeatureHasVMLxHazards,
1103                                                         FeatureHasSlowFPVMLx,
1104                                                         FeatureHasSlowFPVFMx,
1105                                                         FeatureVMLxForwarding,
1106                                                         FeatureMP,
1107                                                         FeatureVFP4,
1108                                                         FeatureVirtualization]>;
1109
1110def : ProcessorModel<"cortex-a8",   CortexA8Model,      [ARMv7a, ProcA8,
1111                                                         FeatureHasRetAddrStack,
1112                                                         FeatureNonpipelinedVFP,
1113                                                         FeatureTrustZone,
1114                                                         FeatureSlowFPBrcc,
1115                                                         FeatureHasVMLxHazards,
1116                                                         FeatureHasSlowFPVMLx,
1117                                                         FeatureHasSlowFPVFMx,
1118                                                         FeatureVMLxForwarding]>;
1119
1120def : ProcessorModel<"cortex-a9",   CortexA9Model,      [ARMv7a, ProcA9,
1121                                                         FeatureHasRetAddrStack,
1122                                                         FeatureTrustZone,
1123                                                         FeatureHasVMLxHazards,
1124                                                         FeatureVMLxForwarding,
1125                                                         FeatureFP16,
1126                                                         FeatureAvoidPartialCPSR,
1127                                                         FeatureExpandMLx,
1128                                                         FeaturePreferVMOVSR,
1129                                                         FeatureMuxedUnits,
1130                                                         FeatureNEONForFPMovs,
1131                                                         FeatureCheckVLDnAlign,
1132                                                         FeatureMP]>;
1133
1134def : ProcessorModel<"cortex-a12",  CortexA9Model,      [ARMv7a, ProcA12,
1135                                                         FeatureHasRetAddrStack,
1136                                                         FeatureTrustZone,
1137                                                         FeatureVMLxForwarding,
1138                                                         FeatureVFP4,
1139                                                         FeatureAvoidPartialCPSR,
1140                                                         FeatureVirtualization,
1141                                                         FeatureMP]>;
1142
1143def : ProcessorModel<"cortex-a15",  CortexA9Model,      [ARMv7a, ProcA15,
1144                                                         FeatureDontWidenVMOVS,
1145                                                         FeatureSplatVFPToNeon,
1146                                                         FeatureHasRetAddrStack,
1147                                                         FeatureMuxedUnits,
1148                                                         FeatureTrustZone,
1149                                                         FeatureVFP4,
1150                                                         FeatureMP,
1151                                                         FeatureCheckVLDnAlign,
1152                                                         FeatureAvoidPartialCPSR,
1153                                                         FeatureVirtualization]>;
1154
1155def : ProcessorModel<"cortex-a17",  CortexA9Model,      [ARMv7a, ProcA17,
1156                                                         FeatureHasRetAddrStack,
1157                                                         FeatureTrustZone,
1158                                                         FeatureMP,
1159                                                         FeatureVMLxForwarding,
1160                                                         FeatureVFP4,
1161                                                         FeatureAvoidPartialCPSR,
1162                                                         FeatureVirtualization]>;
1163
1164// FIXME: krait has currently the same features as A9 plus VFP4 and  HWDiv
1165def : ProcessorModel<"krait",       CortexA9Model,      [ARMv7a, ProcKrait,
1166                                                         FeatureHasRetAddrStack,
1167                                                         FeatureMuxedUnits,
1168                                                         FeatureCheckVLDnAlign,
1169                                                         FeatureVMLxForwarding,
1170                                                         FeatureFP16,
1171                                                         FeatureAvoidPartialCPSR,
1172                                                         FeatureVFP4,
1173                                                         FeatureHWDivThumb,
1174                                                         FeatureHWDivARM]>;
1175
1176def : ProcessorModel<"swift",       SwiftModel,         [ARMv7a, ProcSwift,
1177                                                         FeatureHasRetAddrStack,
1178                                                         FeatureNEONForFP,
1179                                                         FeatureVFP4,
1180                                                         FeatureUseWideStrideVFP,
1181                                                         FeatureMP,
1182                                                         FeatureHWDivThumb,
1183                                                         FeatureHWDivARM,
1184                                                         FeatureAvoidPartialCPSR,
1185                                                         FeatureAvoidMOVsShOp,
1186                                                         FeatureHasSlowFPVMLx,
1187                                                         FeatureHasSlowFPVFMx,
1188                                                         FeatureHasVMLxHazards,
1189                                                         FeatureProfUnpredicate,
1190                                                         FeaturePrefISHSTBarrier,
1191                                                         FeatureSlowOddRegister,
1192                                                         FeatureSlowLoadDSubreg,
1193                                                         FeatureSlowVGETLNi32,
1194                                                         FeatureSlowVDUP32,
1195                                                         FeatureUseMISched,
1196                                                         FeatureNoPostRASched]>;
1197
1198def : ProcessorModel<"cortex-r4",   CortexA8Model,      [ARMv7r, ProcR4,
1199                                                         FeatureHasRetAddrStack,
1200                                                         FeatureAvoidPartialCPSR]>;
1201
1202def : ProcessorModel<"cortex-r4f",  CortexA8Model,      [ARMv7r, ProcR4,
1203                                                         FeatureHasRetAddrStack,
1204                                                         FeatureSlowFPBrcc,
1205                                                         FeatureHasSlowFPVMLx,
1206                                                         FeatureHasSlowFPVFMx,
1207                                                         FeatureVFP3_D16,
1208                                                         FeatureAvoidPartialCPSR]>;
1209
1210def : ProcessorModel<"cortex-r5",   CortexA8Model,      [ARMv7r, ProcR5,
1211                                                         FeatureHasRetAddrStack,
1212                                                         FeatureVFP3_D16,
1213                                                         FeatureSlowFPBrcc,
1214                                                         FeatureHWDivARM,
1215                                                         FeatureHasSlowFPVMLx,
1216                                                         FeatureHasSlowFPVFMx,
1217                                                         FeatureAvoidPartialCPSR]>;
1218
1219def : ProcessorModel<"cortex-r7",   CortexA8Model,      [ARMv7r, ProcR7,
1220                                                         FeatureHasRetAddrStack,
1221                                                         FeatureVFP3_D16,
1222                                                         FeatureFP16,
1223                                                         FeatureMP,
1224                                                         FeatureSlowFPBrcc,
1225                                                         FeatureHWDivARM,
1226                                                         FeatureHasSlowFPVMLx,
1227                                                         FeatureHasSlowFPVFMx,
1228                                                         FeatureAvoidPartialCPSR]>;
1229
1230def : ProcessorModel<"cortex-r8",   CortexA8Model,      [ARMv7r,
1231                                                         FeatureHasRetAddrStack,
1232                                                         FeatureVFP3_D16,
1233                                                         FeatureFP16,
1234                                                         FeatureMP,
1235                                                         FeatureSlowFPBrcc,
1236                                                         FeatureHWDivARM,
1237                                                         FeatureHasSlowFPVMLx,
1238                                                         FeatureHasSlowFPVFMx,
1239                                                         FeatureAvoidPartialCPSR]>;
1240
1241def : ProcessorModel<"cortex-m3",   CortexM4Model,      [ARMv7m,
1242                                                         ProcM3,
1243                                                         FeaturePrefLoopAlign32,
1244                                                         FeatureUseMISched,
1245                                                         FeatureHasNoBranchPredictor]>;
1246
1247def : ProcessorModel<"sc300",       CortexM4Model,      [ARMv7m,
1248                                                         ProcM3,
1249                                                         FeatureUseMISched,
1250                                                         FeatureHasNoBranchPredictor]>;
1251
1252def : ProcessorModel<"cortex-m4", CortexM4Model,        [ARMv7em,
1253                                                         FeatureVFP4_D16_SP,
1254                                                         FeaturePrefLoopAlign32,
1255                                                         FeatureHasSlowFPVMLx,
1256                                                         FeatureHasSlowFPVFMx,
1257                                                         FeatureUseMISched,
1258                                                         FeatureHasNoBranchPredictor]>;
1259
1260def : ProcessorModel<"cortex-m7", CortexM7Model,        [ARMv7em,
1261                                                         ProcM7,
1262                                                         FeatureFPARMv8_D16,
1263                                                         FeatureUseMISched]>;
1264
1265def : ProcNoItin<"cortex-m23",                          [ARMv8mBaseline,
1266                                                         FeatureNoMovt,
1267                                                         FeatureHasNoBranchPredictor]>;
1268
1269def : ProcessorModel<"cortex-m33", CortexM4Model,       [ARMv8mMainline,
1270                                                         FeatureDSP,
1271                                                         FeatureFPARMv8_D16_SP,
1272                                                         FeaturePrefLoopAlign32,
1273                                                         FeatureHasSlowFPVMLx,
1274                                                         FeatureHasSlowFPVFMx,
1275                                                         FeatureUseMISched,
1276                                                         FeatureHasNoBranchPredictor,
1277                                                         FeatureFixCMSE_CVE_2021_35465]>;
1278
1279def : ProcessorModel<"cortex-m35p", CortexM4Model,      [ARMv8mMainline,
1280                                                         FeatureDSP,
1281                                                         FeatureFPARMv8_D16_SP,
1282                                                         FeaturePrefLoopAlign32,
1283                                                         FeatureHasSlowFPVMLx,
1284                                                         FeatureHasSlowFPVFMx,
1285                                                         FeatureUseMISched,
1286                                                         FeatureHasNoBranchPredictor,
1287                                                         FeatureFixCMSE_CVE_2021_35465]>;
1288
1289def : ProcessorModel<"cortex-m55", CortexM4Model,      [ARMv81mMainline,
1290                                                         FeatureDSP,
1291                                                         FeatureFPARMv8_D16,
1292                                                         FeatureUseMISched,
1293                                                         FeatureHasNoBranchPredictor,
1294                                                         FeaturePrefLoopAlign32,
1295                                                         FeatureHasSlowFPVMLx,
1296                                                         HasMVEFloatOps,
1297                                                         FeatureFixCMSE_CVE_2021_35465]>;
1298
1299def : ProcNoItin<"cortex-a32",                           [ARMv8a,
1300                                                         FeatureHWDivThumb,
1301                                                         FeatureHWDivARM,
1302                                                         FeatureCrypto,
1303                                                         FeatureCRC]>;
1304
1305def : ProcNoItin<"cortex-a35",                          [ARMv8a, ProcA35,
1306                                                         FeatureHWDivThumb,
1307                                                         FeatureHWDivARM,
1308                                                         FeatureCrypto,
1309                                                         FeatureCRC]>;
1310
1311def : ProcNoItin<"cortex-a53",                          [ARMv8a, ProcA53,
1312                                                         FeatureHWDivThumb,
1313                                                         FeatureHWDivARM,
1314                                                         FeatureCrypto,
1315                                                         FeatureCRC,
1316                                                         FeatureFPAO]>;
1317
1318def : ProcNoItin<"cortex-a55",                          [ARMv82a, ProcA55,
1319                                                         FeatureHWDivThumb,
1320                                                         FeatureHWDivARM,
1321                                                         FeatureDotProd]>;
1322
1323def : ProcessorModel<"cortex-a57",  CortexA57Model,     [ARMv8a, ProcA57,
1324                                                         FeatureHWDivThumb,
1325                                                         FeatureHWDivARM,
1326                                                         FeatureCrypto,
1327                                                         FeatureCRC,
1328                                                         FeatureFPAO,
1329                                                         FeatureAvoidPartialCPSR,
1330                                                         FeatureCheapPredicableCPSR]>;
1331
1332def : ProcessorModel<"cortex-a72",  CortexA57Model,     [ARMv8a, ProcA72,
1333                                                         FeatureHWDivThumb,
1334                                                         FeatureHWDivARM,
1335                                                         FeatureCrypto,
1336                                                         FeatureCRC]>;
1337
1338def : ProcNoItin<"cortex-a73",                          [ARMv8a, ProcA73,
1339                                                         FeatureHWDivThumb,
1340                                                         FeatureHWDivARM,
1341                                                         FeatureCrypto,
1342                                                         FeatureCRC]>;
1343
1344def : ProcNoItin<"cortex-a75",                          [ARMv82a, ProcA75,
1345                                                         FeatureHWDivThumb,
1346                                                         FeatureHWDivARM,
1347                                                         FeatureDotProd]>;
1348
1349def : ProcNoItin<"cortex-a76",                          [ARMv82a, ProcA76,
1350                                                         FeatureHWDivThumb,
1351                                                         FeatureHWDivARM,
1352                                                         FeatureCrypto,
1353                                                         FeatureCRC,
1354                                                         FeatureFullFP16,
1355                                                         FeatureDotProd]>;
1356
1357def : ProcNoItin<"cortex-a76ae",                        [ARMv82a, ProcA76,
1358                                                         FeatureHWDivThumb,
1359                                                         FeatureHWDivARM,
1360                                                         FeatureCrypto,
1361                                                         FeatureCRC,
1362                                                         FeatureFullFP16,
1363                                                         FeatureDotProd]>;
1364
1365def : ProcNoItin<"cortex-a77",                          [ARMv82a, ProcA77,
1366                                                         FeatureHWDivThumb,
1367                                                         FeatureHWDivARM,
1368                                                         FeatureCrypto,
1369                                                         FeatureCRC,
1370                                                         FeatureFullFP16,
1371                                                         FeatureDotProd]>;
1372
1373def : ProcNoItin<"cortex-a78",                          [ARMv82a, ProcA78,
1374                                                         FeatureHWDivThumb,
1375                                                         FeatureHWDivARM,
1376                                                         FeatureCrypto,
1377                                                         FeatureCRC,
1378                                                         FeatureFullFP16,
1379                                                         FeatureDotProd]>;
1380
1381def : ProcNoItin<"cortex-a78c",                         [ARMv82a, ProcA78C,
1382                                                         FeatureHWDivThumb,
1383                                                         FeatureHWDivARM,
1384                                                         FeatureCrypto,
1385                                                         FeatureCRC,
1386                                                         FeatureDotProd,
1387                                                         FeatureFullFP16]>;
1388
1389def : ProcNoItin<"cortex-a710",                         [ARMv9a, ProcA710,
1390                                                         FeatureHWDivThumb,
1391                                                         FeatureHWDivARM,
1392                                                         FeatureFP16FML,
1393                                                         FeatureBF16,
1394                                                         FeatureMatMulInt8,
1395                                                         FeatureSB]>;
1396
1397def : ProcNoItin<"cortex-x1",                           [ARMv82a, ProcX1,
1398                                                         FeatureHWDivThumb,
1399                                                         FeatureHWDivARM,
1400                                                         FeatureCrypto,
1401                                                         FeatureCRC,
1402                                                         FeatureFullFP16,
1403                                                         FeatureDotProd]>;
1404
1405def : ProcNoItin<"neoverse-v1",                         [ARMv84a,
1406                                                         FeatureHWDivThumb,
1407                                                         FeatureHWDivARM,
1408                                                         FeatureCrypto,
1409                                                         FeatureCRC,
1410                                                         FeatureFullFP16,
1411                                                         FeatureBF16,
1412                                                         FeatureMatMulInt8]>;
1413
1414def : ProcNoItin<"neoverse-n1",                         [ARMv82a,
1415                                                         FeatureHWDivThumb,
1416                                                         FeatureHWDivARM,
1417                                                         FeatureCrypto,
1418                                                         FeatureCRC,
1419                                                         FeatureDotProd]>;
1420
1421def : ProcNoItin<"neoverse-n2",                         [ARMv85a,
1422                                                         FeatureBF16,
1423                                                         FeatureMatMulInt8,
1424                                                         FeaturePerfMon]>;
1425
1426def : ProcessorModel<"cyclone",     SwiftModel,         [ARMv8a, ProcSwift,
1427                                                         FeatureHasRetAddrStack,
1428                                                         FeatureNEONForFP,
1429                                                         FeatureVFP4,
1430                                                         FeatureMP,
1431                                                         FeatureHWDivThumb,
1432                                                         FeatureHWDivARM,
1433                                                         FeatureAvoidPartialCPSR,
1434                                                         FeatureAvoidMOVsShOp,
1435                                                         FeatureHasSlowFPVMLx,
1436                                                         FeatureHasSlowFPVFMx,
1437                                                         FeatureCrypto,
1438                                                         FeatureUseMISched,
1439                                                         FeatureZCZeroing,
1440                                                         FeatureNoPostRASched]>;
1441
1442def : ProcNoItin<"exynos-m3",                           [ARMv8a, ProcExynos]>;
1443def : ProcNoItin<"exynos-m4",                           [ARMv82a, ProcExynos,
1444                                                         FeatureFullFP16,
1445                                                         FeatureDotProd]>;
1446def : ProcNoItin<"exynos-m5",                           [ARMv82a, ProcExynos,
1447                                                         FeatureFullFP16,
1448                                                         FeatureDotProd]>;
1449
1450def : ProcNoItin<"kryo",                                [ARMv8a, ProcKryo,
1451                                                         FeatureHWDivThumb,
1452                                                         FeatureHWDivARM,
1453                                                         FeatureCrypto,
1454                                                         FeatureCRC]>;
1455
1456def : ProcessorModel<"cortex-r52", CortexR52Model,      [ARMv8r, ProcR52,
1457                                                         FeatureUseMISched,
1458                                                         FeatureFPAO]>;
1459
1460//===----------------------------------------------------------------------===//
1461// Declare the target which we are implementing
1462//===----------------------------------------------------------------------===//
1463
1464def ARMAsmWriter : AsmWriter {
1465  string AsmWriterClassName  = "InstPrinter";
1466  int PassSubtarget = 1;
1467  int Variant = 0;
1468  bit isMCAsmWriter = 1;
1469}
1470
1471def ARMAsmParser : AsmParser {
1472  bit ReportMultipleNearMisses = 1;
1473}
1474
1475def ARMAsmParserVariant : AsmParserVariant {
1476  int Variant = 0;
1477  string Name = "ARM";
1478  string BreakCharacters = ".";
1479}
1480
1481def ARM : Target {
1482  // Pull in Instruction Info.
1483  let InstructionSet = ARMInstrInfo;
1484  let AssemblyWriters = [ARMAsmWriter];
1485  let AssemblyParsers = [ARMAsmParser];
1486  let AssemblyParserVariants = [ARMAsmParserVariant];
1487  let AllowRegisterRenaming = 1;
1488}
1489