1 //===-- ARM.h - Top-level interface for ARM representation ------*- C++ -*-===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 // 9 // This file contains the entry points for global functions defined in the LLVM 10 // ARM back-end. 11 // 12 //===----------------------------------------------------------------------===// 13 14 #ifndef LLVM_LIB_TARGET_ARM_ARM_H 15 #define LLVM_LIB_TARGET_ARM_ARM_H 16 17 #include "llvm/IR/LegacyPassManager.h" 18 #include "llvm/Support/CodeGen.h" 19 #include <functional> 20 #include <vector> 21 22 namespace llvm { 23 24 class ARMAsmPrinter; 25 class ARMBaseTargetMachine; 26 class ARMRegisterBankInfo; 27 class ARMSubtarget; 28 struct BasicBlockInfo; 29 class Function; 30 class FunctionPass; 31 class InstructionSelector; 32 class MachineBasicBlock; 33 class MachineFunction; 34 class MachineInstr; 35 class MCInst; 36 class PassRegistry; 37 38 Pass *createMVETailPredicationPass(); 39 FunctionPass *createARMLowOverheadLoopsPass(); 40 Pass *createARMParallelDSPPass(); 41 FunctionPass *createARMISelDag(ARMBaseTargetMachine &TM, 42 CodeGenOpt::Level OptLevel); 43 FunctionPass *createA15SDOptimizerPass(); 44 FunctionPass *createARMLoadStoreOptimizationPass(bool PreAlloc = false); 45 FunctionPass *createARMExpandPseudoPass(); 46 FunctionPass *createARMConstantIslandPass(); 47 FunctionPass *createMLxExpansionPass(); 48 FunctionPass *createThumb2ITBlockPass(); 49 FunctionPass *createMVEVPTBlockPass(); 50 FunctionPass *createMVEVPTOptimisationsPass(); 51 FunctionPass *createARMOptimizeBarriersPass(); 52 FunctionPass *createThumb2SizeReductionPass( 53 std::function<bool(const Function &)> Ftor = nullptr); 54 InstructionSelector * 55 createARMInstructionSelector(const ARMBaseTargetMachine &TM, const ARMSubtarget &STI, 56 const ARMRegisterBankInfo &RBI); 57 Pass *createMVEGatherScatterLoweringPass(); 58 59 void LowerARMMachineInstrToMCInst(const MachineInstr *MI, MCInst &OutMI, 60 ARMAsmPrinter &AP); 61 62 void initializeARMParallelDSPPass(PassRegistry &); 63 void initializeARMLoadStoreOptPass(PassRegistry &); 64 void initializeARMPreAllocLoadStoreOptPass(PassRegistry &); 65 void initializeARMConstantIslandsPass(PassRegistry &); 66 void initializeARMExpandPseudoPass(PassRegistry &); 67 void initializeThumb2SizeReducePass(PassRegistry &); 68 void initializeThumb2ITBlockPass(PassRegistry &); 69 void initializeMVEVPTBlockPass(PassRegistry &); 70 void initializeMVEVPTOptimisationsPass(PassRegistry &); 71 void initializeARMLowOverheadLoopsPass(PassRegistry &); 72 void initializeMVETailPredicationPass(PassRegistry &); 73 void initializeMVEGatherScatterLoweringPass(PassRegistry &); 74 75 } // end namespace llvm 76 77 #endif // LLVM_LIB_TARGET_ARM_ARM_H 78