10b57cec5SDimitry Andric //===-- ARM.h - Top-level interface for ARM representation ------*- C++ -*-===// 20b57cec5SDimitry Andric // 30b57cec5SDimitry Andric // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 40b57cec5SDimitry Andric // See https://llvm.org/LICENSE.txt for license information. 50b57cec5SDimitry Andric // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 60b57cec5SDimitry Andric // 70b57cec5SDimitry Andric //===----------------------------------------------------------------------===// 80b57cec5SDimitry Andric // 90b57cec5SDimitry Andric // This file contains the entry points for global functions defined in the LLVM 100b57cec5SDimitry Andric // ARM back-end. 110b57cec5SDimitry Andric // 120b57cec5SDimitry Andric //===----------------------------------------------------------------------===// 130b57cec5SDimitry Andric 140b57cec5SDimitry Andric #ifndef LLVM_LIB_TARGET_ARM_ARM_H 150b57cec5SDimitry Andric #define LLVM_LIB_TARGET_ARM_ARM_H 160b57cec5SDimitry Andric 170b57cec5SDimitry Andric #include "llvm/IR/LegacyPassManager.h" 180b57cec5SDimitry Andric #include "llvm/Support/CodeGen.h" 190b57cec5SDimitry Andric #include <functional> 200b57cec5SDimitry Andric 210b57cec5SDimitry Andric namespace llvm { 220b57cec5SDimitry Andric 230b57cec5SDimitry Andric class ARMAsmPrinter; 240b57cec5SDimitry Andric class ARMBaseTargetMachine; 250b57cec5SDimitry Andric class ARMRegisterBankInfo; 260b57cec5SDimitry Andric class ARMSubtarget; 270b57cec5SDimitry Andric class Function; 280b57cec5SDimitry Andric class FunctionPass; 290b57cec5SDimitry Andric class InstructionSelector; 300b57cec5SDimitry Andric class MCInst; 31bdd1243dSDimitry Andric class MachineInstr; 320b57cec5SDimitry Andric class PassRegistry; 330b57cec5SDimitry Andric 348bcb0991SDimitry Andric Pass *createMVETailPredicationPass(); 350b57cec5SDimitry Andric FunctionPass *createARMLowOverheadLoopsPass(); 36e8d8bef9SDimitry Andric FunctionPass *createARMBlockPlacementPass(); 370b57cec5SDimitry Andric Pass *createARMParallelDSPPass(); 380b57cec5SDimitry Andric FunctionPass *createARMISelDag(ARMBaseTargetMachine &TM, 395f757f3fSDimitry Andric CodeGenOptLevel OptLevel); 400b57cec5SDimitry Andric FunctionPass *createA15SDOptimizerPass(); 410b57cec5SDimitry Andric FunctionPass *createARMLoadStoreOptimizationPass(bool PreAlloc = false); 420b57cec5SDimitry Andric FunctionPass *createARMExpandPseudoPass(); 434824e7fdSDimitry Andric FunctionPass *createARMBranchTargetsPass(); 440b57cec5SDimitry Andric FunctionPass *createARMConstantIslandPass(); 450b57cec5SDimitry Andric FunctionPass *createMLxExpansionPass(); 460b57cec5SDimitry Andric FunctionPass *createThumb2ITBlockPass(); 470b57cec5SDimitry Andric FunctionPass *createMVEVPTBlockPass(); 48fe6060f1SDimitry Andric FunctionPass *createMVETPAndVPTOptimisationsPass(); 490b57cec5SDimitry Andric FunctionPass *createARMOptimizeBarriersPass(); 500b57cec5SDimitry Andric FunctionPass *createThumb2SizeReductionPass( 510b57cec5SDimitry Andric std::function<bool(const Function &)> Ftor = nullptr); 520b57cec5SDimitry Andric InstructionSelector * 530b57cec5SDimitry Andric createARMInstructionSelector(const ARMBaseTargetMachine &TM, const ARMSubtarget &STI, 540b57cec5SDimitry Andric const ARMRegisterBankInfo &RBI); 55480093f4SDimitry Andric Pass *createMVEGatherScatterLoweringPass(); 56e8d8bef9SDimitry Andric FunctionPass *createARMSLSHardeningPass(); 57e8d8bef9SDimitry Andric FunctionPass *createARMIndirectThunks(); 58fe6060f1SDimitry Andric Pass *createMVELaneInterleavingPass(); 5981ad6265SDimitry Andric FunctionPass *createARMFixCortexA57AES1742098Pass(); 600b57cec5SDimitry Andric 610b57cec5SDimitry Andric void LowerARMMachineInstrToMCInst(const MachineInstr *MI, MCInst &OutMI, 620b57cec5SDimitry Andric ARMAsmPrinter &AP); 630b57cec5SDimitry Andric 64bdd1243dSDimitry Andric void initializeARMBlockPlacementPass(PassRegistry &); 654824e7fdSDimitry Andric void initializeARMBranchTargetsPass(PassRegistry &); 660b57cec5SDimitry Andric void initializeARMConstantIslandsPass(PassRegistry &); 67*0fca6ea1SDimitry Andric void initializeARMDAGToDAGISelLegacyPass(PassRegistry &); 680b57cec5SDimitry Andric void initializeARMExpandPseudoPass(PassRegistry &); 6981ad6265SDimitry Andric void initializeARMFixCortexA57AES1742098Pass(PassRegistry &); 70bdd1243dSDimitry Andric void initializeARMLoadStoreOptPass(PassRegistry &); 71bdd1243dSDimitry Andric void initializeARMLowOverheadLoopsPass(PassRegistry &); 72bdd1243dSDimitry Andric void initializeARMParallelDSPPass(PassRegistry &); 73bdd1243dSDimitry Andric void initializeARMPreAllocLoadStoreOptPass(PassRegistry &); 74bdd1243dSDimitry Andric void initializeARMSLSHardeningPass(PassRegistry &); 75bdd1243dSDimitry Andric void initializeMVEGatherScatterLoweringPass(PassRegistry &); 76bdd1243dSDimitry Andric void initializeMVELaneInterleavingPass(PassRegistry &); 77bdd1243dSDimitry Andric void initializeMVETPAndVPTOptimisationsPass(PassRegistry &); 78bdd1243dSDimitry Andric void initializeMVETailPredicationPass(PassRegistry &); 79bdd1243dSDimitry Andric void initializeMVEVPTBlockPass(PassRegistry &); 80bdd1243dSDimitry Andric void initializeThumb2ITBlockPass(PassRegistry &); 81bdd1243dSDimitry Andric void initializeThumb2SizeReducePass(PassRegistry &); 820b57cec5SDimitry Andric 830b57cec5SDimitry Andric } // end namespace llvm 840b57cec5SDimitry Andric 850b57cec5SDimitry Andric #endif // LLVM_LIB_TARGET_ARM_ARM_H 86