1*0b57cec5SDimitry Andric //===- ARCISelLowering.h - ARC DAG Lowering Interface -----------*- C++ -*-===// 2*0b57cec5SDimitry Andric // 3*0b57cec5SDimitry Andric // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4*0b57cec5SDimitry Andric // See https://llvm.org/LICENSE.txt for license information. 5*0b57cec5SDimitry Andric // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6*0b57cec5SDimitry Andric // 7*0b57cec5SDimitry Andric //===----------------------------------------------------------------------===// 8*0b57cec5SDimitry Andric // 9*0b57cec5SDimitry Andric // This file defines the interfaces that ARC uses to lower LLVM code into a 10*0b57cec5SDimitry Andric // selection DAG. 11*0b57cec5SDimitry Andric // 12*0b57cec5SDimitry Andric //===----------------------------------------------------------------------===// 13*0b57cec5SDimitry Andric 14*0b57cec5SDimitry Andric #ifndef LLVM_LIB_TARGET_ARC_ARCISELLOWERING_H 15*0b57cec5SDimitry Andric #define LLVM_LIB_TARGET_ARC_ARCISELLOWERING_H 16*0b57cec5SDimitry Andric 17*0b57cec5SDimitry Andric #include "ARC.h" 18*0b57cec5SDimitry Andric #include "llvm/CodeGen/SelectionDAG.h" 19*0b57cec5SDimitry Andric #include "llvm/CodeGen/TargetLowering.h" 20*0b57cec5SDimitry Andric 21*0b57cec5SDimitry Andric namespace llvm { 22*0b57cec5SDimitry Andric 23*0b57cec5SDimitry Andric // Forward delcarations 24*0b57cec5SDimitry Andric class ARCSubtarget; 25*0b57cec5SDimitry Andric class ARCTargetMachine; 26*0b57cec5SDimitry Andric 27*0b57cec5SDimitry Andric namespace ARCISD { 28*0b57cec5SDimitry Andric 29*0b57cec5SDimitry Andric enum NodeType : unsigned { 30*0b57cec5SDimitry Andric // Start the numbering where the builtin ops and target ops leave off. 31*0b57cec5SDimitry Andric FIRST_NUMBER = ISD::BUILTIN_OP_END, 32*0b57cec5SDimitry Andric 33*0b57cec5SDimitry Andric // Branch and link (call) 34*0b57cec5SDimitry Andric BL, 35*0b57cec5SDimitry Andric 36*0b57cec5SDimitry Andric // Jump and link (indirect call) 37*0b57cec5SDimitry Andric JL, 38*0b57cec5SDimitry Andric 39*0b57cec5SDimitry Andric // CMP 40*0b57cec5SDimitry Andric CMP, 41*0b57cec5SDimitry Andric 42*0b57cec5SDimitry Andric // CMOV 43*0b57cec5SDimitry Andric CMOV, 44*0b57cec5SDimitry Andric 45*0b57cec5SDimitry Andric // BRcc 46*0b57cec5SDimitry Andric BRcc, 47*0b57cec5SDimitry Andric 48*0b57cec5SDimitry Andric // Global Address Wrapper 49*0b57cec5SDimitry Andric GAWRAPPER, 50*0b57cec5SDimitry Andric 51*0b57cec5SDimitry Andric // return, (j_s [blink]) 52*0b57cec5SDimitry Andric RET 53*0b57cec5SDimitry Andric }; 54*0b57cec5SDimitry Andric 55*0b57cec5SDimitry Andric } // end namespace ARCISD 56*0b57cec5SDimitry Andric 57*0b57cec5SDimitry Andric //===--------------------------------------------------------------------===// 58*0b57cec5SDimitry Andric // TargetLowering Implementation 59*0b57cec5SDimitry Andric //===--------------------------------------------------------------------===// 60*0b57cec5SDimitry Andric class ARCTargetLowering : public TargetLowering { 61*0b57cec5SDimitry Andric public: 62*0b57cec5SDimitry Andric explicit ARCTargetLowering(const TargetMachine &TM, 63*0b57cec5SDimitry Andric const ARCSubtarget &Subtarget); 64*0b57cec5SDimitry Andric 65*0b57cec5SDimitry Andric /// Provide custom lowering hooks for some operations. 66*0b57cec5SDimitry Andric SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const override; 67*0b57cec5SDimitry Andric 68*0b57cec5SDimitry Andric /// This method returns the name of a target specific DAG node. 69*0b57cec5SDimitry Andric const char *getTargetNodeName(unsigned Opcode) const override; 70*0b57cec5SDimitry Andric 71*0b57cec5SDimitry Andric /// Return true if the addressing mode represented by AM is legal for this 72*0b57cec5SDimitry Andric /// target, for a load/store of the specified type. 73*0b57cec5SDimitry Andric bool isLegalAddressingMode(const DataLayout &DL, const AddrMode &AM, Type *Ty, 74*0b57cec5SDimitry Andric unsigned AS, 75*0b57cec5SDimitry Andric Instruction *I = nullptr) const override; 76*0b57cec5SDimitry Andric 77*0b57cec5SDimitry Andric private: 78*0b57cec5SDimitry Andric const ARCSubtarget &Subtarget; 79*0b57cec5SDimitry Andric 80*0b57cec5SDimitry Andric // Lower Operand helpers 81*0b57cec5SDimitry Andric SDValue LowerCallArguments(SDValue Chain, CallingConv::ID CallConv, 82*0b57cec5SDimitry Andric bool isVarArg, 83*0b57cec5SDimitry Andric const SmallVectorImpl<ISD::InputArg> &Ins, 84*0b57cec5SDimitry Andric SDLoc dl, SelectionDAG &DAG, 85*0b57cec5SDimitry Andric SmallVectorImpl<SDValue> &InVals) const; 86*0b57cec5SDimitry Andric // Lower Operand specifics 87*0b57cec5SDimitry Andric SDValue LowerJumpTable(SDValue Op, SelectionDAG &DAG) const; 88*0b57cec5SDimitry Andric SDValue LowerFRAMEADDR(SDValue Op, SelectionDAG &DAG) const; 89*0b57cec5SDimitry Andric SDValue LowerSELECT_CC(SDValue Op, SelectionDAG &DAG) const; 90*0b57cec5SDimitry Andric SDValue LowerBR_CC(SDValue Op, SelectionDAG &DAG) const; 91*0b57cec5SDimitry Andric SDValue LowerSIGN_EXTEND_INREG(SDValue Op, SelectionDAG &DAG) const; 92*0b57cec5SDimitry Andric SDValue LowerGlobalAddress(SDValue Op, SelectionDAG &DAG) const; 93*0b57cec5SDimitry Andric SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const override; 94*0b57cec5SDimitry Andric 95*0b57cec5SDimitry Andric SDValue LowerFormalArguments(SDValue Chain, CallingConv::ID CallConv, 96*0b57cec5SDimitry Andric bool isVarArg, 97*0b57cec5SDimitry Andric const SmallVectorImpl<ISD::InputArg> &Ins, 98*0b57cec5SDimitry Andric const SDLoc &dl, SelectionDAG &DAG, 99*0b57cec5SDimitry Andric SmallVectorImpl<SDValue> &InVals) const override; 100*0b57cec5SDimitry Andric 101*0b57cec5SDimitry Andric SDValue LowerCall(TargetLowering::CallLoweringInfo &CLI, 102*0b57cec5SDimitry Andric SmallVectorImpl<SDValue> &InVals) const override; 103*0b57cec5SDimitry Andric 104*0b57cec5SDimitry Andric SDValue LowerReturn(SDValue Chain, CallingConv::ID CallConv, bool isVarArg, 105*0b57cec5SDimitry Andric const SmallVectorImpl<ISD::OutputArg> &Outs, 106*0b57cec5SDimitry Andric const SmallVectorImpl<SDValue> &OutVals, const SDLoc &dl, 107*0b57cec5SDimitry Andric SelectionDAG &DAG) const override; 108*0b57cec5SDimitry Andric 109*0b57cec5SDimitry Andric bool CanLowerReturn(CallingConv::ID CallConv, MachineFunction &MF, 110*0b57cec5SDimitry Andric bool isVarArg, 111*0b57cec5SDimitry Andric const SmallVectorImpl<ISD::OutputArg> &ArgsFlags, 112*0b57cec5SDimitry Andric LLVMContext &Context) const override; 113*0b57cec5SDimitry Andric 114*0b57cec5SDimitry Andric bool mayBeEmittedAsTailCall(const CallInst *CI) const override; 115*0b57cec5SDimitry Andric }; 116*0b57cec5SDimitry Andric 117*0b57cec5SDimitry Andric } // end namespace llvm 118*0b57cec5SDimitry Andric 119*0b57cec5SDimitry Andric #endif // LLVM_LIB_TARGET_ARC_ARCISELLOWERING_H 120