1//===-- VOPCInstructions.td - Vector Instruction Defintions ---------------===// 2// 3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4// See https://llvm.org/LICENSE.txt for license information. 5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6// 7//===----------------------------------------------------------------------===// 8 9//===----------------------------------------------------------------------===// 10// Encodings 11//===----------------------------------------------------------------------===// 12 13class VOPCe <bits<8> op> : Enc32 { 14 bits<9> src0; 15 bits<8> src1; 16 17 let Inst{8-0} = src0; 18 let Inst{16-9} = src1; 19 let Inst{24-17} = op; 20 let Inst{31-25} = 0x3e; 21} 22 23class VOPC_SDWAe <bits<8> op, VOPProfile P> : VOP_SDWAe <P> { 24 bits<8> src1; 25 26 let Inst{8-0} = 0xf9; // sdwa 27 let Inst{16-9} = !if(P.HasSrc1, src1{7-0}, 0); 28 let Inst{24-17} = op; 29 let Inst{31-25} = 0x3e; // encoding 30 31 // VOPC disallows dst_sel and dst_unused as they have no effect on destination 32 let Inst{42-40} = 0; 33 let Inst{44-43} = 0; 34} 35 36class VOPC_SDWA9e <bits<8> op, VOPProfile P> : VOP_SDWA9Be <P> { 37 bits<9> src1; 38 39 let Inst{8-0} = 0xf9; // sdwa 40 let Inst{16-9} = !if(P.HasSrc1, src1{7-0}, 0); 41 let Inst{24-17} = op; 42 let Inst{31-25} = 0x3e; // encoding 43 let Inst{63} = !if(P.HasSrc1, src1{8}, 0); // src1_sgpr 44} 45 46 47//===----------------------------------------------------------------------===// 48// VOPC classes 49//===----------------------------------------------------------------------===// 50 51// VOPC instructions are a special case because for the 32-bit 52// encoding, we want to display the implicit vcc write as if it were 53// an explicit $dst. 54class VOPC_Profile<list<SchedReadWrite> sched, ValueType vt0, ValueType vt1 = vt0> : 55 VOPProfile <[i1, vt0, vt1, untyped]> { 56 let Asm32 = "$src0, $src1"; 57 // The destination for 32-bit encoding is implicit. 58 let HasDst32 = 0; 59 let Outs64 = (outs VOPDstS64orS32:$sdst); 60 list<SchedReadWrite> Schedule = sched; 61} 62 63class VOPC_NoSdst_Profile<list<SchedReadWrite> sched, ValueType vt0, 64 ValueType vt1 = vt0> : 65 VOPC_Profile<sched, vt0, vt1> { 66 let Outs64 = (outs ); 67 let OutsSDWA = (outs ); 68 let InsSDWA = (ins Src0ModSDWA:$src0_modifiers, Src0SDWA:$src0, 69 Src1ModSDWA:$src1_modifiers, Src1SDWA:$src1, 70 src0_sel:$src0_sel, src1_sel:$src1_sel); 71 let Asm64 = !if(isFloatType<Src0VT>.ret, "$src0_modifiers, $src1_modifiers$clamp", 72 "$src0, $src1"); 73 let AsmSDWA9 = "$src0_modifiers, $src1_modifiers $src0_sel $src1_sel"; 74 let EmitDst = 0; 75} 76 77class VOPC_Pseudo <string opName, VOPC_Profile P, list<dag> pattern=[], 78 bit DefVcc = 1> : 79 InstSI<(outs), P.Ins32, "", pattern>, 80 VOP <opName>, 81 SIMCInstr<opName#"_e32", SIEncodingFamily.NONE> { 82 83 let isPseudo = 1; 84 let isCodeGenOnly = 1; 85 let UseNamedOperandTable = 1; 86 87 string Mnemonic = opName; 88 string AsmOperands = P.Asm32; 89 90 let Size = 4; 91 let mayLoad = 0; 92 let mayStore = 0; 93 let hasSideEffects = 0; 94 95 let VALU = 1; 96 let VOPC = 1; 97 let Uses = [EXEC]; 98 let Defs = !if(DefVcc, [VCC], []); 99 100 VOPProfile Pfl = P; 101} 102 103class VOPC_Real <VOPC_Pseudo ps, int EncodingFamily> : 104 InstSI <ps.OutOperandList, ps.InOperandList, ps.PseudoInstr # " " # ps.AsmOperands, []>, 105 SIMCInstr <ps.PseudoInstr, EncodingFamily> { 106 107 let isPseudo = 0; 108 let isCodeGenOnly = 0; 109 110 let Constraints = ps.Constraints; 111 let DisableEncoding = ps.DisableEncoding; 112 113 // copy relevant pseudo op flags 114 let SubtargetPredicate = ps.SubtargetPredicate; 115 let AsmMatchConverter = ps.AsmMatchConverter; 116 let Constraints = ps.Constraints; 117 let DisableEncoding = ps.DisableEncoding; 118 let TSFlags = ps.TSFlags; 119 let UseNamedOperandTable = ps.UseNamedOperandTable; 120 let Uses = ps.Uses; 121 let Defs = ps.Defs; 122} 123 124class VOPC_SDWA_Pseudo <string OpName, VOPProfile P, list<dag> pattern=[]> : 125 VOP_SDWA_Pseudo <OpName, P, pattern> { 126 let AsmMatchConverter = "cvtSdwaVOPC"; 127} 128 129// This class is used only with VOPC instructions. Use $sdst for out operand 130class VOPCInstAlias <VOP3_Pseudo ps, Instruction inst, 131 string Asm32 = ps.Pfl.Asm32, VOPProfile p = ps.Pfl> : 132 InstAlias <ps.OpName#" "#Asm32, (inst)>, PredicateControl { 133 134 field bit isCompare; 135 field bit isCommutable; 136 137 let ResultInst = 138 !if (p.HasDst32, 139 !if (!eq(p.NumSrcArgs, 0), 140 // 1 dst, 0 src 141 (inst p.DstRC:$sdst), 142 !if (!eq(p.NumSrcArgs, 1), 143 // 1 dst, 1 src 144 (inst p.DstRC:$sdst, p.Src0RC32:$src0), 145 !if (!eq(p.NumSrcArgs, 2), 146 // 1 dst, 2 src 147 (inst p.DstRC:$sdst, p.Src0RC32:$src0, p.Src1RC32:$src1), 148 // else - unreachable 149 (inst)))), 150 // else 151 !if (!eq(p.NumSrcArgs, 2), 152 // 0 dst, 2 src 153 (inst p.Src0RC32:$src0, p.Src1RC32:$src1), 154 !if (!eq(p.NumSrcArgs, 1), 155 // 0 dst, 1 src 156 (inst p.Src0RC32:$src1), 157 // else 158 // 0 dst, 0 src 159 (inst)))); 160 161 let AsmVariantName = AMDGPUAsmVariants.Default; 162 let SubtargetPredicate = AssemblerPredicate; 163} 164 165multiclass VOPCInstAliases <string OpName, string Arch> { 166 def : VOPCInstAlias <!cast<VOP3_Pseudo>(OpName#"_e64"), 167 !cast<Instruction>(OpName#"_e32_"#Arch)>; 168 let WaveSizePredicate = isWave32 in { 169 def : VOPCInstAlias <!cast<VOP3_Pseudo>(OpName#"_e64"), 170 !cast<Instruction>(OpName#"_e32_"#Arch), 171 "vcc_lo, "#!cast<VOP3_Pseudo>(OpName#"_e64").Pfl.Asm32>; 172 } 173 let WaveSizePredicate = isWave64 in { 174 def : VOPCInstAlias <!cast<VOP3_Pseudo>(OpName#"_e64"), 175 !cast<Instruction>(OpName#"_e32_"#Arch), 176 "vcc, "#!cast<VOP3_Pseudo>(OpName#"_e64").Pfl.Asm32>; 177 } 178} 179 180multiclass VOPCXInstAliases <string OpName, string Arch> { 181 def : VOPCInstAlias <!cast<VOP3_Pseudo>(OpName#"_e64"), 182 !cast<Instruction>(OpName#"_e32_"#Arch)>; 183} 184 185 186class getVOPCPat64 <SDPatternOperator cond, VOPProfile P> : LetDummies { 187 list<dag> ret = !if(P.HasModifiers, 188 [(set i1:$sdst, 189 (setcc (P.Src0VT 190 !if(P.HasOMod, 191 (VOP3Mods0 P.Src0VT:$src0, i32:$src0_modifiers, i1:$clamp, i32:$omod), 192 (VOP3Mods0 P.Src0VT:$src0, i32:$src0_modifiers, i1:$clamp))), 193 (P.Src1VT (VOP3Mods P.Src1VT:$src1, i32:$src1_modifiers)), 194 cond))], 195 [(set i1:$sdst, (setcc P.Src0VT:$src0, P.Src1VT:$src1, cond))]); 196} 197 198class VCMPXNoSDstTable <bit has_sdst, string Name> { 199 bit HasSDst = has_sdst; 200 string NoSDstOp = Name; 201} 202 203multiclass VOPC_Pseudos <string opName, 204 VOPC_Profile P, 205 SDPatternOperator cond = COND_NULL, 206 string revOp = opName, 207 bit DefExec = 0> { 208 209 def _e32 : VOPC_Pseudo <opName, P>, 210 Commutable_REV<revOp#"_e32", !eq(revOp, opName)>, 211 VCMPXNoSDstTable<1, opName#"_e32"> { 212 let Defs = !if(DefExec, [VCC, EXEC], [VCC]); 213 let SchedRW = P.Schedule; 214 let isConvergent = DefExec; 215 let isCompare = 1; 216 let isCommutable = 1; 217 } 218 219 def _e64 : VOP3_Pseudo<opName, P, getVOPCPat64<cond, P>.ret>, 220 Commutable_REV<revOp#"_e64", !eq(revOp, opName)>, 221 VCMPXNoSDstTable<1, opName#"_e64"> { 222 let Defs = !if(DefExec, [EXEC], []); 223 let SchedRW = P.Schedule; 224 let isCompare = 1; 225 let isCommutable = 1; 226 } 227 228 foreach _ = BoolToList<P.HasExtSDWA>.ret in 229 def _sdwa : VOPC_SDWA_Pseudo <opName, P> { 230 let Defs = !if(DefExec, [VCC, EXEC], [VCC]); 231 let SchedRW = P.Schedule; 232 let isConvergent = DefExec; 233 let isCompare = 1; 234 } 235} 236 237let SubtargetPredicate = HasSdstCMPX in { 238multiclass VOPCX_Pseudos <string opName, 239 VOPC_Profile P, VOPC_Profile P_NoSDst, 240 SDPatternOperator cond = COND_NULL, 241 string revOp = opName> : 242 VOPC_Pseudos <opName, P, cond, revOp, 1> { 243 244 def _nosdst_e32 : VOPC_Pseudo <opName#"_nosdst", P_NoSDst, [], 0>, 245 Commutable_REV<revOp#"_nosdst_e32", !eq(revOp, opName)>, 246 VCMPXNoSDstTable<0, opName#"_e32"> { 247 let Defs = [EXEC]; 248 let SchedRW = P_NoSDst.Schedule; 249 let isConvergent = 1; 250 let isCompare = 1; 251 let isCommutable = 1; 252 let SubtargetPredicate = HasNoSdstCMPX; 253 } 254 255 def _nosdst_e64 : VOP3_Pseudo<opName#"_nosdst", P_NoSDst>, 256 Commutable_REV<revOp#"_nosdst_e64", !eq(revOp, opName)>, 257 VCMPXNoSDstTable<0, opName#"_e64"> { 258 let Defs = [EXEC]; 259 let SchedRW = P_NoSDst.Schedule; 260 let isCompare = 1; 261 let isCommutable = 1; 262 let SubtargetPredicate = HasNoSdstCMPX; 263 } 264 265 foreach _ = BoolToList<P_NoSDst.HasExtSDWA>.ret in 266 def _nosdst_sdwa : VOPC_SDWA_Pseudo <opName#"_nosdst", P_NoSDst> { 267 let Defs = [EXEC]; 268 let SchedRW = P_NoSDst.Schedule; 269 let isConvergent = 1; 270 let isCompare = 1; 271 let SubtargetPredicate = HasNoSdstCMPX; 272 } 273} 274} // End SubtargetPredicate = HasSdstCMPX 275 276def VOPC_I1_F16_F16 : VOPC_Profile<[Write32Bit], f16>; 277def VOPC_I1_F32_F32 : VOPC_Profile<[Write32Bit], f32>; 278def VOPC_I1_F64_F64 : VOPC_Profile<[WriteDoubleAdd], f64>; 279def VOPC_I1_I16_I16 : VOPC_Profile<[Write32Bit], i16>; 280def VOPC_I1_I32_I32 : VOPC_Profile<[Write32Bit], i32>; 281def VOPC_I1_I64_I64 : VOPC_Profile<[Write64Bit], i64>; 282 283def VOPC_F16_F16 : VOPC_NoSdst_Profile<[Write32Bit], f16>; 284def VOPC_F32_F32 : VOPC_NoSdst_Profile<[Write32Bit], f32>; 285def VOPC_F64_F64 : VOPC_NoSdst_Profile<[Write64Bit], f64>; 286def VOPC_I16_I16 : VOPC_NoSdst_Profile<[Write32Bit], i16>; 287def VOPC_I32_I32 : VOPC_NoSdst_Profile<[Write32Bit], i32>; 288def VOPC_I64_I64 : VOPC_NoSdst_Profile<[Write64Bit], i64>; 289 290multiclass VOPC_F16 <string opName, SDPatternOperator cond = COND_NULL, 291 string revOp = opName> : 292 VOPC_Pseudos <opName, VOPC_I1_F16_F16, cond, revOp, 0>; 293 294multiclass VOPC_F32 <string opName, SDPatternOperator cond = COND_NULL, string revOp = opName> : 295 VOPC_Pseudos <opName, VOPC_I1_F32_F32, cond, revOp, 0>; 296 297multiclass VOPC_F64 <string opName, SDPatternOperator cond = COND_NULL, string revOp = opName> : 298 VOPC_Pseudos <opName, VOPC_I1_F64_F64, cond, revOp, 0>; 299 300multiclass VOPC_I16 <string opName, SDPatternOperator cond = COND_NULL, string revOp = opName> : 301 VOPC_Pseudos <opName, VOPC_I1_I16_I16, cond, revOp, 0>; 302 303multiclass VOPC_I32 <string opName, SDPatternOperator cond = COND_NULL, string revOp = opName> : 304 VOPC_Pseudos <opName, VOPC_I1_I32_I32, cond, revOp, 0>; 305 306multiclass VOPC_I64 <string opName, SDPatternOperator cond = COND_NULL, string revOp = opName> : 307 VOPC_Pseudos <opName, VOPC_I1_I64_I64, cond, revOp, 0>; 308 309multiclass VOPCX_F16 <string opName, string revOp = opName> : 310 VOPCX_Pseudos <opName, VOPC_I1_F16_F16, VOPC_F16_F16, COND_NULL, revOp>; 311 312multiclass VOPCX_F32 <string opName, string revOp = opName> : 313 VOPCX_Pseudos <opName, VOPC_I1_F32_F32, VOPC_F32_F32, COND_NULL, revOp>; 314 315multiclass VOPCX_F64 <string opName, string revOp = opName> : 316 VOPCX_Pseudos <opName, VOPC_I1_F64_F64, VOPC_F64_F64, COND_NULL, revOp>; 317 318multiclass VOPCX_I16 <string opName, string revOp = opName> : 319 VOPCX_Pseudos <opName, VOPC_I1_I16_I16, VOPC_I16_I16, COND_NULL, revOp>; 320 321multiclass VOPCX_I32 <string opName, string revOp = opName> : 322 VOPCX_Pseudos <opName, VOPC_I1_I32_I32, VOPC_I32_I32, COND_NULL, revOp>; 323 324multiclass VOPCX_I64 <string opName, string revOp = opName> : 325 VOPCX_Pseudos <opName, VOPC_I1_I64_I64, VOPC_I64_I64, COND_NULL, revOp>; 326 327 328//===----------------------------------------------------------------------===// 329// Compare instructions 330//===----------------------------------------------------------------------===// 331 332defm V_CMP_F_F32 : VOPC_F32 <"v_cmp_f_f32">; 333defm V_CMP_LT_F32 : VOPC_F32 <"v_cmp_lt_f32", COND_OLT, "v_cmp_gt_f32">; 334defm V_CMP_EQ_F32 : VOPC_F32 <"v_cmp_eq_f32", COND_OEQ>; 335defm V_CMP_LE_F32 : VOPC_F32 <"v_cmp_le_f32", COND_OLE, "v_cmp_ge_f32">; 336defm V_CMP_GT_F32 : VOPC_F32 <"v_cmp_gt_f32", COND_OGT>; 337defm V_CMP_LG_F32 : VOPC_F32 <"v_cmp_lg_f32", COND_ONE>; 338defm V_CMP_GE_F32 : VOPC_F32 <"v_cmp_ge_f32", COND_OGE>; 339defm V_CMP_O_F32 : VOPC_F32 <"v_cmp_o_f32", COND_O>; 340defm V_CMP_U_F32 : VOPC_F32 <"v_cmp_u_f32", COND_UO>; 341defm V_CMP_NGE_F32 : VOPC_F32 <"v_cmp_nge_f32", COND_ULT, "v_cmp_nle_f32">; 342defm V_CMP_NLG_F32 : VOPC_F32 <"v_cmp_nlg_f32", COND_UEQ>; 343defm V_CMP_NGT_F32 : VOPC_F32 <"v_cmp_ngt_f32", COND_ULE, "v_cmp_nlt_f32">; 344defm V_CMP_NLE_F32 : VOPC_F32 <"v_cmp_nle_f32", COND_UGT>; 345defm V_CMP_NEQ_F32 : VOPC_F32 <"v_cmp_neq_f32", COND_UNE>; 346defm V_CMP_NLT_F32 : VOPC_F32 <"v_cmp_nlt_f32", COND_UGE>; 347defm V_CMP_TRU_F32 : VOPC_F32 <"v_cmp_tru_f32">; 348 349defm V_CMPX_F_F32 : VOPCX_F32 <"v_cmpx_f_f32">; 350defm V_CMPX_LT_F32 : VOPCX_F32 <"v_cmpx_lt_f32", "v_cmpx_gt_f32">; 351defm V_CMPX_EQ_F32 : VOPCX_F32 <"v_cmpx_eq_f32">; 352defm V_CMPX_LE_F32 : VOPCX_F32 <"v_cmpx_le_f32", "v_cmpx_ge_f32">; 353defm V_CMPX_GT_F32 : VOPCX_F32 <"v_cmpx_gt_f32">; 354defm V_CMPX_LG_F32 : VOPCX_F32 <"v_cmpx_lg_f32">; 355defm V_CMPX_GE_F32 : VOPCX_F32 <"v_cmpx_ge_f32">; 356defm V_CMPX_O_F32 : VOPCX_F32 <"v_cmpx_o_f32">; 357defm V_CMPX_U_F32 : VOPCX_F32 <"v_cmpx_u_f32">; 358defm V_CMPX_NGE_F32 : VOPCX_F32 <"v_cmpx_nge_f32", "v_cmpx_nle_f32">; 359defm V_CMPX_NLG_F32 : VOPCX_F32 <"v_cmpx_nlg_f32">; 360defm V_CMPX_NGT_F32 : VOPCX_F32 <"v_cmpx_ngt_f32", "v_cmpx_nlt_f32">; 361defm V_CMPX_NLE_F32 : VOPCX_F32 <"v_cmpx_nle_f32">; 362defm V_CMPX_NEQ_F32 : VOPCX_F32 <"v_cmpx_neq_f32">; 363defm V_CMPX_NLT_F32 : VOPCX_F32 <"v_cmpx_nlt_f32">; 364defm V_CMPX_TRU_F32 : VOPCX_F32 <"v_cmpx_tru_f32">; 365 366defm V_CMP_F_F64 : VOPC_F64 <"v_cmp_f_f64">; 367defm V_CMP_LT_F64 : VOPC_F64 <"v_cmp_lt_f64", COND_OLT, "v_cmp_gt_f64">; 368defm V_CMP_EQ_F64 : VOPC_F64 <"v_cmp_eq_f64", COND_OEQ>; 369defm V_CMP_LE_F64 : VOPC_F64 <"v_cmp_le_f64", COND_OLE, "v_cmp_ge_f64">; 370defm V_CMP_GT_F64 : VOPC_F64 <"v_cmp_gt_f64", COND_OGT>; 371defm V_CMP_LG_F64 : VOPC_F64 <"v_cmp_lg_f64", COND_ONE>; 372defm V_CMP_GE_F64 : VOPC_F64 <"v_cmp_ge_f64", COND_OGE>; 373defm V_CMP_O_F64 : VOPC_F64 <"v_cmp_o_f64", COND_O>; 374defm V_CMP_U_F64 : VOPC_F64 <"v_cmp_u_f64", COND_UO>; 375defm V_CMP_NGE_F64 : VOPC_F64 <"v_cmp_nge_f64", COND_ULT, "v_cmp_nle_f64">; 376defm V_CMP_NLG_F64 : VOPC_F64 <"v_cmp_nlg_f64", COND_UEQ>; 377defm V_CMP_NGT_F64 : VOPC_F64 <"v_cmp_ngt_f64", COND_ULE, "v_cmp_nlt_f64">; 378defm V_CMP_NLE_F64 : VOPC_F64 <"v_cmp_nle_f64", COND_UGT>; 379defm V_CMP_NEQ_F64 : VOPC_F64 <"v_cmp_neq_f64", COND_UNE>; 380defm V_CMP_NLT_F64 : VOPC_F64 <"v_cmp_nlt_f64", COND_UGE>; 381defm V_CMP_TRU_F64 : VOPC_F64 <"v_cmp_tru_f64">; 382 383defm V_CMPX_F_F64 : VOPCX_F64 <"v_cmpx_f_f64">; 384defm V_CMPX_LT_F64 : VOPCX_F64 <"v_cmpx_lt_f64", "v_cmpx_gt_f64">; 385defm V_CMPX_EQ_F64 : VOPCX_F64 <"v_cmpx_eq_f64">; 386defm V_CMPX_LE_F64 : VOPCX_F64 <"v_cmpx_le_f64", "v_cmpx_ge_f64">; 387defm V_CMPX_GT_F64 : VOPCX_F64 <"v_cmpx_gt_f64">; 388defm V_CMPX_LG_F64 : VOPCX_F64 <"v_cmpx_lg_f64">; 389defm V_CMPX_GE_F64 : VOPCX_F64 <"v_cmpx_ge_f64">; 390defm V_CMPX_O_F64 : VOPCX_F64 <"v_cmpx_o_f64">; 391defm V_CMPX_U_F64 : VOPCX_F64 <"v_cmpx_u_f64">; 392defm V_CMPX_NGE_F64 : VOPCX_F64 <"v_cmpx_nge_f64", "v_cmpx_nle_f64">; 393defm V_CMPX_NLG_F64 : VOPCX_F64 <"v_cmpx_nlg_f64">; 394defm V_CMPX_NGT_F64 : VOPCX_F64 <"v_cmpx_ngt_f64", "v_cmpx_nlt_f64">; 395defm V_CMPX_NLE_F64 : VOPCX_F64 <"v_cmpx_nle_f64">; 396defm V_CMPX_NEQ_F64 : VOPCX_F64 <"v_cmpx_neq_f64">; 397defm V_CMPX_NLT_F64 : VOPCX_F64 <"v_cmpx_nlt_f64">; 398defm V_CMPX_TRU_F64 : VOPCX_F64 <"v_cmpx_tru_f64">; 399 400let SubtargetPredicate = isGFX6GFX7 in { 401 402defm V_CMPS_F_F32 : VOPC_F32 <"v_cmps_f_f32">; 403defm V_CMPS_LT_F32 : VOPC_F32 <"v_cmps_lt_f32", COND_NULL, "v_cmps_gt_f32">; 404defm V_CMPS_EQ_F32 : VOPC_F32 <"v_cmps_eq_f32">; 405defm V_CMPS_LE_F32 : VOPC_F32 <"v_cmps_le_f32", COND_NULL, "v_cmps_ge_f32">; 406defm V_CMPS_GT_F32 : VOPC_F32 <"v_cmps_gt_f32">; 407defm V_CMPS_LG_F32 : VOPC_F32 <"v_cmps_lg_f32">; 408defm V_CMPS_GE_F32 : VOPC_F32 <"v_cmps_ge_f32">; 409defm V_CMPS_O_F32 : VOPC_F32 <"v_cmps_o_f32">; 410defm V_CMPS_U_F32 : VOPC_F32 <"v_cmps_u_f32">; 411defm V_CMPS_NGE_F32 : VOPC_F32 <"v_cmps_nge_f32", COND_NULL, "v_cmps_nle_f32">; 412defm V_CMPS_NLG_F32 : VOPC_F32 <"v_cmps_nlg_f32">; 413defm V_CMPS_NGT_F32 : VOPC_F32 <"v_cmps_ngt_f32", COND_NULL, "v_cmps_nlt_f32">; 414defm V_CMPS_NLE_F32 : VOPC_F32 <"v_cmps_nle_f32">; 415defm V_CMPS_NEQ_F32 : VOPC_F32 <"v_cmps_neq_f32">; 416defm V_CMPS_NLT_F32 : VOPC_F32 <"v_cmps_nlt_f32">; 417defm V_CMPS_TRU_F32 : VOPC_F32 <"v_cmps_tru_f32">; 418 419defm V_CMPSX_F_F32 : VOPCX_F32 <"v_cmpsx_f_f32">; 420defm V_CMPSX_LT_F32 : VOPCX_F32 <"v_cmpsx_lt_f32", "v_cmpsx_gt_f32">; 421defm V_CMPSX_EQ_F32 : VOPCX_F32 <"v_cmpsx_eq_f32">; 422defm V_CMPSX_LE_F32 : VOPCX_F32 <"v_cmpsx_le_f32", "v_cmpsx_ge_f32">; 423defm V_CMPSX_GT_F32 : VOPCX_F32 <"v_cmpsx_gt_f32">; 424defm V_CMPSX_LG_F32 : VOPCX_F32 <"v_cmpsx_lg_f32">; 425defm V_CMPSX_GE_F32 : VOPCX_F32 <"v_cmpsx_ge_f32">; 426defm V_CMPSX_O_F32 : VOPCX_F32 <"v_cmpsx_o_f32">; 427defm V_CMPSX_U_F32 : VOPCX_F32 <"v_cmpsx_u_f32">; 428defm V_CMPSX_NGE_F32 : VOPCX_F32 <"v_cmpsx_nge_f32", "v_cmpsx_nle_f32">; 429defm V_CMPSX_NLG_F32 : VOPCX_F32 <"v_cmpsx_nlg_f32">; 430defm V_CMPSX_NGT_F32 : VOPCX_F32 <"v_cmpsx_ngt_f32", "v_cmpsx_nlt_f32">; 431defm V_CMPSX_NLE_F32 : VOPCX_F32 <"v_cmpsx_nle_f32">; 432defm V_CMPSX_NEQ_F32 : VOPCX_F32 <"v_cmpsx_neq_f32">; 433defm V_CMPSX_NLT_F32 : VOPCX_F32 <"v_cmpsx_nlt_f32">; 434defm V_CMPSX_TRU_F32 : VOPCX_F32 <"v_cmpsx_tru_f32">; 435 436defm V_CMPS_F_F64 : VOPC_F64 <"v_cmps_f_f64">; 437defm V_CMPS_LT_F64 : VOPC_F64 <"v_cmps_lt_f64", COND_NULL, "v_cmps_gt_f64">; 438defm V_CMPS_EQ_F64 : VOPC_F64 <"v_cmps_eq_f64">; 439defm V_CMPS_LE_F64 : VOPC_F64 <"v_cmps_le_f64", COND_NULL, "v_cmps_ge_f64">; 440defm V_CMPS_GT_F64 : VOPC_F64 <"v_cmps_gt_f64">; 441defm V_CMPS_LG_F64 : VOPC_F64 <"v_cmps_lg_f64">; 442defm V_CMPS_GE_F64 : VOPC_F64 <"v_cmps_ge_f64">; 443defm V_CMPS_O_F64 : VOPC_F64 <"v_cmps_o_f64">; 444defm V_CMPS_U_F64 : VOPC_F64 <"v_cmps_u_f64">; 445defm V_CMPS_NGE_F64 : VOPC_F64 <"v_cmps_nge_f64", COND_NULL, "v_cmps_nle_f64">; 446defm V_CMPS_NLG_F64 : VOPC_F64 <"v_cmps_nlg_f64">; 447defm V_CMPS_NGT_F64 : VOPC_F64 <"v_cmps_ngt_f64", COND_NULL, "v_cmps_nlt_f64">; 448defm V_CMPS_NLE_F64 : VOPC_F64 <"v_cmps_nle_f64">; 449defm V_CMPS_NEQ_F64 : VOPC_F64 <"v_cmps_neq_f64">; 450defm V_CMPS_NLT_F64 : VOPC_F64 <"v_cmps_nlt_f64">; 451defm V_CMPS_TRU_F64 : VOPC_F64 <"v_cmps_tru_f64">; 452 453defm V_CMPSX_F_F64 : VOPCX_F64 <"v_cmpsx_f_f64">; 454defm V_CMPSX_LT_F64 : VOPCX_F64 <"v_cmpsx_lt_f64", "v_cmpsx_gt_f64">; 455defm V_CMPSX_EQ_F64 : VOPCX_F64 <"v_cmpsx_eq_f64">; 456defm V_CMPSX_LE_F64 : VOPCX_F64 <"v_cmpsx_le_f64", "v_cmpsx_ge_f64">; 457defm V_CMPSX_GT_F64 : VOPCX_F64 <"v_cmpsx_gt_f64">; 458defm V_CMPSX_LG_F64 : VOPCX_F64 <"v_cmpsx_lg_f64">; 459defm V_CMPSX_GE_F64 : VOPCX_F64 <"v_cmpsx_ge_f64">; 460defm V_CMPSX_O_F64 : VOPCX_F64 <"v_cmpsx_o_f64">; 461defm V_CMPSX_U_F64 : VOPCX_F64 <"v_cmpsx_u_f64">; 462defm V_CMPSX_NGE_F64 : VOPCX_F64 <"v_cmpsx_nge_f64", "v_cmpsx_nle_f64">; 463defm V_CMPSX_NLG_F64 : VOPCX_F64 <"v_cmpsx_nlg_f64">; 464defm V_CMPSX_NGT_F64 : VOPCX_F64 <"v_cmpsx_ngt_f64", "v_cmpsx_nlt_f64">; 465defm V_CMPSX_NLE_F64 : VOPCX_F64 <"v_cmpsx_nle_f64">; 466defm V_CMPSX_NEQ_F64 : VOPCX_F64 <"v_cmpsx_neq_f64">; 467defm V_CMPSX_NLT_F64 : VOPCX_F64 <"v_cmpsx_nlt_f64">; 468defm V_CMPSX_TRU_F64 : VOPCX_F64 <"v_cmpsx_tru_f64">; 469 470} // End SubtargetPredicate = isGFX6GFX7 471 472let SubtargetPredicate = Has16BitInsts in { 473 474defm V_CMP_F_F16 : VOPC_F16 <"v_cmp_f_f16">; 475defm V_CMP_LT_F16 : VOPC_F16 <"v_cmp_lt_f16", COND_OLT, "v_cmp_gt_f16">; 476defm V_CMP_EQ_F16 : VOPC_F16 <"v_cmp_eq_f16", COND_OEQ>; 477defm V_CMP_LE_F16 : VOPC_F16 <"v_cmp_le_f16", COND_OLE, "v_cmp_ge_f16">; 478defm V_CMP_GT_F16 : VOPC_F16 <"v_cmp_gt_f16", COND_OGT>; 479defm V_CMP_LG_F16 : VOPC_F16 <"v_cmp_lg_f16", COND_ONE>; 480defm V_CMP_GE_F16 : VOPC_F16 <"v_cmp_ge_f16", COND_OGE>; 481defm V_CMP_O_F16 : VOPC_F16 <"v_cmp_o_f16", COND_O>; 482defm V_CMP_U_F16 : VOPC_F16 <"v_cmp_u_f16", COND_UO>; 483defm V_CMP_NGE_F16 : VOPC_F16 <"v_cmp_nge_f16", COND_ULT, "v_cmp_nle_f16">; 484defm V_CMP_NLG_F16 : VOPC_F16 <"v_cmp_nlg_f16", COND_UEQ>; 485defm V_CMP_NGT_F16 : VOPC_F16 <"v_cmp_ngt_f16", COND_ULE, "v_cmp_nlt_f16">; 486defm V_CMP_NLE_F16 : VOPC_F16 <"v_cmp_nle_f16", COND_UGT>; 487defm V_CMP_NEQ_F16 : VOPC_F16 <"v_cmp_neq_f16", COND_UNE>; 488defm V_CMP_NLT_F16 : VOPC_F16 <"v_cmp_nlt_f16", COND_UGE>; 489defm V_CMP_TRU_F16 : VOPC_F16 <"v_cmp_tru_f16">; 490 491defm V_CMPX_F_F16 : VOPCX_F16 <"v_cmpx_f_f16">; 492defm V_CMPX_LT_F16 : VOPCX_F16 <"v_cmpx_lt_f16", "v_cmpx_gt_f16">; 493defm V_CMPX_EQ_F16 : VOPCX_F16 <"v_cmpx_eq_f16">; 494defm V_CMPX_LE_F16 : VOPCX_F16 <"v_cmpx_le_f16", "v_cmpx_ge_f16">; 495defm V_CMPX_GT_F16 : VOPCX_F16 <"v_cmpx_gt_f16">; 496defm V_CMPX_LG_F16 : VOPCX_F16 <"v_cmpx_lg_f16">; 497defm V_CMPX_GE_F16 : VOPCX_F16 <"v_cmpx_ge_f16">; 498defm V_CMPX_O_F16 : VOPCX_F16 <"v_cmpx_o_f16">; 499defm V_CMPX_U_F16 : VOPCX_F16 <"v_cmpx_u_f16">; 500defm V_CMPX_NGE_F16 : VOPCX_F16 <"v_cmpx_nge_f16", "v_cmpx_nle_f16">; 501defm V_CMPX_NLG_F16 : VOPCX_F16 <"v_cmpx_nlg_f16">; 502defm V_CMPX_NGT_F16 : VOPCX_F16 <"v_cmpx_ngt_f16", "v_cmpx_nlt_f16">; 503defm V_CMPX_NLE_F16 : VOPCX_F16 <"v_cmpx_nle_f16">; 504defm V_CMPX_NEQ_F16 : VOPCX_F16 <"v_cmpx_neq_f16">; 505defm V_CMPX_NLT_F16 : VOPCX_F16 <"v_cmpx_nlt_f16">; 506defm V_CMPX_TRU_F16 : VOPCX_F16 <"v_cmpx_tru_f16">; 507 508defm V_CMP_F_I16 : VOPC_I16 <"v_cmp_f_i16">; 509defm V_CMP_LT_I16 : VOPC_I16 <"v_cmp_lt_i16", COND_SLT, "v_cmp_gt_i16">; 510defm V_CMP_EQ_I16 : VOPC_I16 <"v_cmp_eq_i16">; 511defm V_CMP_LE_I16 : VOPC_I16 <"v_cmp_le_i16", COND_SLE, "v_cmp_ge_i16">; 512defm V_CMP_GT_I16 : VOPC_I16 <"v_cmp_gt_i16", COND_SGT>; 513defm V_CMP_NE_I16 : VOPC_I16 <"v_cmp_ne_i16">; 514defm V_CMP_GE_I16 : VOPC_I16 <"v_cmp_ge_i16", COND_SGE>; 515defm V_CMP_T_I16 : VOPC_I16 <"v_cmp_t_i16">; 516 517defm V_CMP_F_U16 : VOPC_I16 <"v_cmp_f_u16">; 518defm V_CMP_LT_U16 : VOPC_I16 <"v_cmp_lt_u16", COND_ULT, "v_cmp_gt_u16">; 519defm V_CMP_EQ_U16 : VOPC_I16 <"v_cmp_eq_u16", COND_EQ>; 520defm V_CMP_LE_U16 : VOPC_I16 <"v_cmp_le_u16", COND_ULE, "v_cmp_ge_u16">; 521defm V_CMP_GT_U16 : VOPC_I16 <"v_cmp_gt_u16", COND_UGT>; 522defm V_CMP_NE_U16 : VOPC_I16 <"v_cmp_ne_u16", COND_NE>; 523defm V_CMP_GE_U16 : VOPC_I16 <"v_cmp_ge_u16", COND_UGE>; 524defm V_CMP_T_U16 : VOPC_I16 <"v_cmp_t_u16">; 525 526defm V_CMPX_F_I16 : VOPCX_I16 <"v_cmpx_f_i16">; 527defm V_CMPX_LT_I16 : VOPCX_I16 <"v_cmpx_lt_i16", "v_cmpx_gt_i16">; 528defm V_CMPX_EQ_I16 : VOPCX_I16 <"v_cmpx_eq_i16">; 529defm V_CMPX_LE_I16 : VOPCX_I16 <"v_cmpx_le_i16", "v_cmpx_ge_i16">; 530defm V_CMPX_GT_I16 : VOPCX_I16 <"v_cmpx_gt_i16">; 531defm V_CMPX_NE_I16 : VOPCX_I16 <"v_cmpx_ne_i16">; 532defm V_CMPX_GE_I16 : VOPCX_I16 <"v_cmpx_ge_i16">; 533defm V_CMPX_T_I16 : VOPCX_I16 <"v_cmpx_t_i16">; 534defm V_CMPX_F_U16 : VOPCX_I16 <"v_cmpx_f_u16">; 535 536defm V_CMPX_LT_U16 : VOPCX_I16 <"v_cmpx_lt_u16", "v_cmpx_gt_u16">; 537defm V_CMPX_EQ_U16 : VOPCX_I16 <"v_cmpx_eq_u16">; 538defm V_CMPX_LE_U16 : VOPCX_I16 <"v_cmpx_le_u16", "v_cmpx_ge_u16">; 539defm V_CMPX_GT_U16 : VOPCX_I16 <"v_cmpx_gt_u16">; 540defm V_CMPX_NE_U16 : VOPCX_I16 <"v_cmpx_ne_u16">; 541defm V_CMPX_GE_U16 : VOPCX_I16 <"v_cmpx_ge_u16">; 542defm V_CMPX_T_U16 : VOPCX_I16 <"v_cmpx_t_u16">; 543 544} // End SubtargetPredicate = Has16BitInsts 545 546defm V_CMP_F_I32 : VOPC_I32 <"v_cmp_f_i32">; 547defm V_CMP_LT_I32 : VOPC_I32 <"v_cmp_lt_i32", COND_SLT, "v_cmp_gt_i32">; 548defm V_CMP_EQ_I32 : VOPC_I32 <"v_cmp_eq_i32">; 549defm V_CMP_LE_I32 : VOPC_I32 <"v_cmp_le_i32", COND_SLE, "v_cmp_ge_i32">; 550defm V_CMP_GT_I32 : VOPC_I32 <"v_cmp_gt_i32", COND_SGT>; 551defm V_CMP_NE_I32 : VOPC_I32 <"v_cmp_ne_i32">; 552defm V_CMP_GE_I32 : VOPC_I32 <"v_cmp_ge_i32", COND_SGE>; 553defm V_CMP_T_I32 : VOPC_I32 <"v_cmp_t_i32">; 554 555defm V_CMPX_F_I32 : VOPCX_I32 <"v_cmpx_f_i32">; 556defm V_CMPX_LT_I32 : VOPCX_I32 <"v_cmpx_lt_i32", "v_cmpx_gt_i32">; 557defm V_CMPX_EQ_I32 : VOPCX_I32 <"v_cmpx_eq_i32">; 558defm V_CMPX_LE_I32 : VOPCX_I32 <"v_cmpx_le_i32", "v_cmpx_ge_i32">; 559defm V_CMPX_GT_I32 : VOPCX_I32 <"v_cmpx_gt_i32">; 560defm V_CMPX_NE_I32 : VOPCX_I32 <"v_cmpx_ne_i32">; 561defm V_CMPX_GE_I32 : VOPCX_I32 <"v_cmpx_ge_i32">; 562defm V_CMPX_T_I32 : VOPCX_I32 <"v_cmpx_t_i32">; 563 564defm V_CMP_F_I64 : VOPC_I64 <"v_cmp_f_i64">; 565defm V_CMP_LT_I64 : VOPC_I64 <"v_cmp_lt_i64", COND_SLT, "v_cmp_gt_i64">; 566defm V_CMP_EQ_I64 : VOPC_I64 <"v_cmp_eq_i64">; 567defm V_CMP_LE_I64 : VOPC_I64 <"v_cmp_le_i64", COND_SLE, "v_cmp_ge_i64">; 568defm V_CMP_GT_I64 : VOPC_I64 <"v_cmp_gt_i64", COND_SGT>; 569defm V_CMP_NE_I64 : VOPC_I64 <"v_cmp_ne_i64">; 570defm V_CMP_GE_I64 : VOPC_I64 <"v_cmp_ge_i64", COND_SGE>; 571defm V_CMP_T_I64 : VOPC_I64 <"v_cmp_t_i64">; 572 573defm V_CMPX_F_I64 : VOPCX_I64 <"v_cmpx_f_i64">; 574defm V_CMPX_LT_I64 : VOPCX_I64 <"v_cmpx_lt_i64", "v_cmpx_gt_i64">; 575defm V_CMPX_EQ_I64 : VOPCX_I64 <"v_cmpx_eq_i64">; 576defm V_CMPX_LE_I64 : VOPCX_I64 <"v_cmpx_le_i64", "v_cmpx_ge_i64">; 577defm V_CMPX_GT_I64 : VOPCX_I64 <"v_cmpx_gt_i64">; 578defm V_CMPX_NE_I64 : VOPCX_I64 <"v_cmpx_ne_i64">; 579defm V_CMPX_GE_I64 : VOPCX_I64 <"v_cmpx_ge_i64">; 580defm V_CMPX_T_I64 : VOPCX_I64 <"v_cmpx_t_i64">; 581 582defm V_CMP_F_U32 : VOPC_I32 <"v_cmp_f_u32">; 583defm V_CMP_LT_U32 : VOPC_I32 <"v_cmp_lt_u32", COND_ULT, "v_cmp_gt_u32">; 584defm V_CMP_EQ_U32 : VOPC_I32 <"v_cmp_eq_u32", COND_EQ>; 585defm V_CMP_LE_U32 : VOPC_I32 <"v_cmp_le_u32", COND_ULE, "v_cmp_ge_u32">; 586defm V_CMP_GT_U32 : VOPC_I32 <"v_cmp_gt_u32", COND_UGT>; 587defm V_CMP_NE_U32 : VOPC_I32 <"v_cmp_ne_u32", COND_NE>; 588defm V_CMP_GE_U32 : VOPC_I32 <"v_cmp_ge_u32", COND_UGE>; 589defm V_CMP_T_U32 : VOPC_I32 <"v_cmp_t_u32">; 590 591defm V_CMPX_F_U32 : VOPCX_I32 <"v_cmpx_f_u32">; 592defm V_CMPX_LT_U32 : VOPCX_I32 <"v_cmpx_lt_u32", "v_cmpx_gt_u32">; 593defm V_CMPX_EQ_U32 : VOPCX_I32 <"v_cmpx_eq_u32">; 594defm V_CMPX_LE_U32 : VOPCX_I32 <"v_cmpx_le_u32", "v_cmpx_le_u32">; 595defm V_CMPX_GT_U32 : VOPCX_I32 <"v_cmpx_gt_u32">; 596defm V_CMPX_NE_U32 : VOPCX_I32 <"v_cmpx_ne_u32">; 597defm V_CMPX_GE_U32 : VOPCX_I32 <"v_cmpx_ge_u32">; 598defm V_CMPX_T_U32 : VOPCX_I32 <"v_cmpx_t_u32">; 599 600defm V_CMP_F_U64 : VOPC_I64 <"v_cmp_f_u64">; 601defm V_CMP_LT_U64 : VOPC_I64 <"v_cmp_lt_u64", COND_ULT, "v_cmp_gt_u64">; 602defm V_CMP_EQ_U64 : VOPC_I64 <"v_cmp_eq_u64", COND_EQ>; 603defm V_CMP_LE_U64 : VOPC_I64 <"v_cmp_le_u64", COND_ULE, "v_cmp_ge_u64">; 604defm V_CMP_GT_U64 : VOPC_I64 <"v_cmp_gt_u64", COND_UGT>; 605defm V_CMP_NE_U64 : VOPC_I64 <"v_cmp_ne_u64", COND_NE>; 606defm V_CMP_GE_U64 : VOPC_I64 <"v_cmp_ge_u64", COND_UGE>; 607defm V_CMP_T_U64 : VOPC_I64 <"v_cmp_t_u64">; 608 609defm V_CMPX_F_U64 : VOPCX_I64 <"v_cmpx_f_u64">; 610defm V_CMPX_LT_U64 : VOPCX_I64 <"v_cmpx_lt_u64", "v_cmpx_gt_u64">; 611defm V_CMPX_EQ_U64 : VOPCX_I64 <"v_cmpx_eq_u64">; 612defm V_CMPX_LE_U64 : VOPCX_I64 <"v_cmpx_le_u64", "v_cmpx_ge_u64">; 613defm V_CMPX_GT_U64 : VOPCX_I64 <"v_cmpx_gt_u64">; 614defm V_CMPX_NE_U64 : VOPCX_I64 <"v_cmpx_ne_u64">; 615defm V_CMPX_GE_U64 : VOPCX_I64 <"v_cmpx_ge_u64">; 616defm V_CMPX_T_U64 : VOPCX_I64 <"v_cmpx_t_u64">; 617 618//===----------------------------------------------------------------------===// 619// Class instructions 620//===----------------------------------------------------------------------===// 621 622class VOPC_Class_Profile<list<SchedReadWrite> sched, ValueType vt> : 623 VOPC_Profile<sched, vt, i32> { 624 let Ins64 = (ins Src0Mod:$src0_modifiers, Src0RC64:$src0, Src1RC64:$src1); 625 let Asm64 = "$sdst, $src0_modifiers, $src1"; 626 627 let InsSDWA = (ins Src0ModSDWA:$src0_modifiers, Src0SDWA:$src0, 628 Src1ModSDWA:$src1_modifiers, Src1SDWA:$src1, 629 clampmod:$clamp, src0_sel:$src0_sel, src1_sel:$src1_sel); 630 631 let AsmSDWA = " vcc, $src0_modifiers, $src1_modifiers$clamp $src0_sel $src1_sel"; 632 let HasSrc1Mods = 0; 633 let HasClamp = 0; 634 let HasOMod = 0; 635} 636 637class VOPC_Class_NoSdst_Profile<list<SchedReadWrite> sched, ValueType vt> : 638 VOPC_Class_Profile<sched, vt> { 639 let Outs64 = (outs ); 640 let OutsSDWA = (outs ); 641 let InsSDWA = (ins Src0ModSDWA:$src0_modifiers, Src0SDWA:$src0, 642 Src1ModSDWA:$src1_modifiers, Src1SDWA:$src1, 643 src0_sel:$src0_sel, src1_sel:$src1_sel); 644 let Asm64 = "$src0_modifiers, $src1"; 645 let AsmSDWA9 = "$src0_modifiers, $src1_modifiers $src0_sel $src1_sel"; 646 let EmitDst = 0; 647} 648 649class getVOPCClassPat64 <VOPProfile P> { 650 list<dag> ret = 651 [(set i1:$sdst, 652 (AMDGPUfp_class 653 (P.Src0VT (VOP3Mods P.Src0VT:$src0, i32:$src0_modifiers)), 654 P.Src1VT:$src1))]; 655} 656 657// Special case for class instructions which only have modifiers on 658// the 1st source operand. 659multiclass VOPC_Class_Pseudos <string opName, VOPC_Profile p, bit DefExec, 660 bit DefVcc = 1> { 661 def _e32 : VOPC_Pseudo <opName, p>, 662 VCMPXNoSDstTable<1, opName#"_e32"> { 663 let Defs = !if(DefExec, !if(DefVcc, [VCC, EXEC], [EXEC]), 664 !if(DefVcc, [VCC], [])); 665 let SchedRW = p.Schedule; 666 let isConvergent = DefExec; 667 } 668 669 def _e64 : VOP3_Pseudo<opName, p, getVOPCClassPat64<p>.ret>, 670 VCMPXNoSDstTable<1, opName#"_e64"> { 671 let Defs = !if(DefExec, [EXEC], []); 672 let SchedRW = p.Schedule; 673 } 674 675 foreach _ = BoolToList<p.HasExtSDWA>.ret in 676 def _sdwa : VOPC_SDWA_Pseudo <opName, p> { 677 let Defs = !if(DefExec, !if(DefVcc, [VCC, EXEC], [EXEC]), 678 !if(DefVcc, [VCC], [])); 679 let SchedRW = p.Schedule; 680 let isConvergent = DefExec; 681 } 682} 683 684let SubtargetPredicate = HasSdstCMPX in { 685multiclass VOPCX_Class_Pseudos <string opName, 686 VOPC_Profile P, 687 VOPC_Profile P_NoSDst> : 688 VOPC_Class_Pseudos <opName, P, 1, 1> { 689 690 def _nosdst_e32 : VOPC_Pseudo <opName#"_nosdst", P_NoSDst, [], 0>, 691 VCMPXNoSDstTable<0, opName#"_e32"> { 692 let Defs = [EXEC]; 693 let SchedRW = P_NoSDst.Schedule; 694 let isConvergent = 1; 695 let SubtargetPredicate = HasNoSdstCMPX; 696 } 697 698 def _nosdst_e64 : VOP3_Pseudo<opName#"_nosdst", P_NoSDst>, 699 VCMPXNoSDstTable<0, opName#"_e64"> { 700 let Defs = [EXEC]; 701 let SchedRW = P_NoSDst.Schedule; 702 let SubtargetPredicate = HasNoSdstCMPX; 703 } 704 705 foreach _ = BoolToList<P_NoSDst.HasExtSDWA>.ret in 706 def _nosdst_sdwa : VOPC_SDWA_Pseudo <opName#"_nosdst", P_NoSDst> { 707 let Defs = [EXEC]; 708 let SchedRW = P_NoSDst.Schedule; 709 let isConvergent = 1; 710 let SubtargetPredicate = HasNoSdstCMPX; 711 } 712} 713} // End SubtargetPredicate = HasSdstCMPX 714 715def VOPC_I1_F16_I32 : VOPC_Class_Profile<[Write32Bit], f16>; 716def VOPC_I1_F32_I32 : VOPC_Class_Profile<[Write32Bit], f32>; 717def VOPC_I1_F64_I32 : VOPC_Class_Profile<[WriteDoubleAdd], f64>; 718 719def VOPC_F16_I32 : VOPC_Class_NoSdst_Profile<[Write32Bit], f16>; 720def VOPC_F32_I32 : VOPC_Class_NoSdst_Profile<[Write32Bit], f32>; 721def VOPC_F64_I32 : VOPC_Class_NoSdst_Profile<[Write64Bit], f64>; 722 723multiclass VOPC_CLASS_F16 <string opName> : 724 VOPC_Class_Pseudos <opName, VOPC_I1_F16_I32, 0>; 725 726multiclass VOPCX_CLASS_F16 <string opName> : 727 VOPCX_Class_Pseudos <opName, VOPC_I1_F16_I32, VOPC_F16_I32>; 728 729multiclass VOPC_CLASS_F32 <string opName> : 730 VOPC_Class_Pseudos <opName, VOPC_I1_F32_I32, 0>; 731 732multiclass VOPCX_CLASS_F32 <string opName> : 733 VOPCX_Class_Pseudos <opName, VOPC_I1_F32_I32, VOPC_F32_I32>; 734 735multiclass VOPC_CLASS_F64 <string opName> : 736 VOPC_Class_Pseudos <opName, VOPC_I1_F64_I32, 0>; 737 738multiclass VOPCX_CLASS_F64 <string opName> : 739 VOPCX_Class_Pseudos <opName, VOPC_I1_F64_I32, VOPC_F64_I32>; 740 741defm V_CMP_CLASS_F32 : VOPC_CLASS_F32 <"v_cmp_class_f32">; 742defm V_CMPX_CLASS_F32 : VOPCX_CLASS_F32 <"v_cmpx_class_f32">; 743defm V_CMP_CLASS_F64 : VOPC_CLASS_F64 <"v_cmp_class_f64">; 744defm V_CMPX_CLASS_F64 : VOPCX_CLASS_F64 <"v_cmpx_class_f64">; 745 746let SubtargetPredicate = Has16BitInsts in { 747defm V_CMP_CLASS_F16 : VOPC_CLASS_F16 <"v_cmp_class_f16">; 748defm V_CMPX_CLASS_F16 : VOPCX_CLASS_F16 <"v_cmpx_class_f16">; 749} 750 751//===----------------------------------------------------------------------===// 752// V_ICMPIntrinsic Pattern. 753//===----------------------------------------------------------------------===// 754 755// We need to use COPY_TO_REGCLASS to w/a the problem when ReplaceAllUsesWith() 756// complaints it cannot replace i1 <-> i64/i32 if node was not morphed in place. 757multiclass ICMP_Pattern <PatLeaf cond, Instruction inst, ValueType vt> { 758 let WaveSizePredicate = isWave64 in 759 def : GCNPat < 760 (i64 (AMDGPUsetcc vt:$src0, vt:$src1, cond)), 761 (i64 (COPY_TO_REGCLASS (inst $src0, $src1), SReg_64)) 762 >; 763 764 let WaveSizePredicate = isWave32 in 765 def : GCNPat < 766 (i32 (AMDGPUsetcc vt:$src0, vt:$src1, cond)), 767 (i32 (COPY_TO_REGCLASS (inst $src0, $src1), SReg_32)) 768 >; 769} 770 771defm : ICMP_Pattern <COND_EQ, V_CMP_EQ_U32_e64, i32>; 772defm : ICMP_Pattern <COND_NE, V_CMP_NE_U32_e64, i32>; 773defm : ICMP_Pattern <COND_UGT, V_CMP_GT_U32_e64, i32>; 774defm : ICMP_Pattern <COND_UGE, V_CMP_GE_U32_e64, i32>; 775defm : ICMP_Pattern <COND_ULT, V_CMP_LT_U32_e64, i32>; 776defm : ICMP_Pattern <COND_ULE, V_CMP_LE_U32_e64, i32>; 777defm : ICMP_Pattern <COND_SGT, V_CMP_GT_I32_e64, i32>; 778defm : ICMP_Pattern <COND_SGE, V_CMP_GE_I32_e64, i32>; 779defm : ICMP_Pattern <COND_SLT, V_CMP_LT_I32_e64, i32>; 780defm : ICMP_Pattern <COND_SLE, V_CMP_LE_I32_e64, i32>; 781 782defm : ICMP_Pattern <COND_EQ, V_CMP_EQ_U64_e64, i64>; 783defm : ICMP_Pattern <COND_NE, V_CMP_NE_U64_e64, i64>; 784defm : ICMP_Pattern <COND_UGT, V_CMP_GT_U64_e64, i64>; 785defm : ICMP_Pattern <COND_UGE, V_CMP_GE_U64_e64, i64>; 786defm : ICMP_Pattern <COND_ULT, V_CMP_LT_U64_e64, i64>; 787defm : ICMP_Pattern <COND_ULE, V_CMP_LE_U64_e64, i64>; 788defm : ICMP_Pattern <COND_SGT, V_CMP_GT_I64_e64, i64>; 789defm : ICMP_Pattern <COND_SGE, V_CMP_GE_I64_e64, i64>; 790defm : ICMP_Pattern <COND_SLT, V_CMP_LT_I64_e64, i64>; 791defm : ICMP_Pattern <COND_SLE, V_CMP_LE_I64_e64, i64>; 792 793defm : ICMP_Pattern <COND_EQ, V_CMP_EQ_U16_e64, i16>; 794defm : ICMP_Pattern <COND_NE, V_CMP_NE_U16_e64, i16>; 795defm : ICMP_Pattern <COND_UGT, V_CMP_GT_U16_e64, i16>; 796defm : ICMP_Pattern <COND_UGE, V_CMP_GE_U16_e64, i16>; 797defm : ICMP_Pattern <COND_ULT, V_CMP_LT_U16_e64, i16>; 798defm : ICMP_Pattern <COND_ULE, V_CMP_LE_U16_e64, i16>; 799defm : ICMP_Pattern <COND_SGT, V_CMP_GT_I16_e64, i16>; 800defm : ICMP_Pattern <COND_SGE, V_CMP_GE_I16_e64, i16>; 801defm : ICMP_Pattern <COND_SLT, V_CMP_LT_I16_e64, i16>; 802defm : ICMP_Pattern <COND_SLE, V_CMP_LE_I16_e64, i16>; 803 804multiclass FCMP_Pattern <PatLeaf cond, Instruction inst, ValueType vt> { 805 let WaveSizePredicate = isWave64 in 806 def : GCNPat < 807 (i64 (AMDGPUsetcc (vt (VOP3Mods vt:$src0, i32:$src0_modifiers)), 808 (vt (VOP3Mods vt:$src1, i32:$src1_modifiers)), cond)), 809 (i64 (COPY_TO_REGCLASS (inst $src0_modifiers, $src0, $src1_modifiers, $src1, 810 DSTCLAMP.NONE), SReg_64)) 811 >; 812 813 let WaveSizePredicate = isWave32 in 814 def : GCNPat < 815 (i32 (AMDGPUsetcc (vt (VOP3Mods vt:$src0, i32:$src0_modifiers)), 816 (vt (VOP3Mods vt:$src1, i32:$src1_modifiers)), cond)), 817 (i32 (COPY_TO_REGCLASS (inst $src0_modifiers, $src0, $src1_modifiers, $src1, 818 DSTCLAMP.NONE), SReg_32)) 819 >; 820} 821 822defm : FCMP_Pattern <COND_OEQ, V_CMP_EQ_F32_e64, f32>; 823defm : FCMP_Pattern <COND_ONE, V_CMP_NEQ_F32_e64, f32>; 824defm : FCMP_Pattern <COND_OGT, V_CMP_GT_F32_e64, f32>; 825defm : FCMP_Pattern <COND_OGE, V_CMP_GE_F32_e64, f32>; 826defm : FCMP_Pattern <COND_OLT, V_CMP_LT_F32_e64, f32>; 827defm : FCMP_Pattern <COND_OLE, V_CMP_LE_F32_e64, f32>; 828 829defm : FCMP_Pattern <COND_OEQ, V_CMP_EQ_F64_e64, f64>; 830defm : FCMP_Pattern <COND_ONE, V_CMP_NEQ_F64_e64, f64>; 831defm : FCMP_Pattern <COND_OGT, V_CMP_GT_F64_e64, f64>; 832defm : FCMP_Pattern <COND_OGE, V_CMP_GE_F64_e64, f64>; 833defm : FCMP_Pattern <COND_OLT, V_CMP_LT_F64_e64, f64>; 834defm : FCMP_Pattern <COND_OLE, V_CMP_LE_F64_e64, f64>; 835 836defm : FCMP_Pattern <COND_OEQ, V_CMP_EQ_F16_e64, f16>; 837defm : FCMP_Pattern <COND_ONE, V_CMP_NEQ_F16_e64, f16>; 838defm : FCMP_Pattern <COND_OGT, V_CMP_GT_F16_e64, f16>; 839defm : FCMP_Pattern <COND_OGE, V_CMP_GE_F16_e64, f16>; 840defm : FCMP_Pattern <COND_OLT, V_CMP_LT_F16_e64, f16>; 841defm : FCMP_Pattern <COND_OLE, V_CMP_LE_F16_e64, f16>; 842 843 844defm : FCMP_Pattern <COND_UEQ, V_CMP_NLG_F32_e64, f32>; 845defm : FCMP_Pattern <COND_UNE, V_CMP_NEQ_F32_e64, f32>; 846defm : FCMP_Pattern <COND_UGT, V_CMP_NLE_F32_e64, f32>; 847defm : FCMP_Pattern <COND_UGE, V_CMP_NLT_F32_e64, f32>; 848defm : FCMP_Pattern <COND_ULT, V_CMP_NGE_F32_e64, f32>; 849defm : FCMP_Pattern <COND_ULE, V_CMP_NGT_F32_e64, f32>; 850 851defm : FCMP_Pattern <COND_UEQ, V_CMP_NLG_F64_e64, f64>; 852defm : FCMP_Pattern <COND_UNE, V_CMP_NEQ_F64_e64, f64>; 853defm : FCMP_Pattern <COND_UGT, V_CMP_NLE_F64_e64, f64>; 854defm : FCMP_Pattern <COND_UGE, V_CMP_NLT_F64_e64, f64>; 855defm : FCMP_Pattern <COND_ULT, V_CMP_NGE_F64_e64, f64>; 856defm : FCMP_Pattern <COND_ULE, V_CMP_NGT_F64_e64, f64>; 857 858defm : FCMP_Pattern <COND_UEQ, V_CMP_NLG_F16_e64, f16>; 859defm : FCMP_Pattern <COND_UNE, V_CMP_NEQ_F16_e64, f16>; 860defm : FCMP_Pattern <COND_UGT, V_CMP_NLE_F16_e64, f16>; 861defm : FCMP_Pattern <COND_UGE, V_CMP_NLT_F16_e64, f16>; 862defm : FCMP_Pattern <COND_ULT, V_CMP_NGE_F16_e64, f16>; 863defm : FCMP_Pattern <COND_ULE, V_CMP_NGT_F16_e64, f16>; 864 865//===----------------------------------------------------------------------===// 866// Target-specific instruction encodings. 867//===----------------------------------------------------------------------===// 868 869//===----------------------------------------------------------------------===// 870// GFX10. 871//===----------------------------------------------------------------------===// 872 873let AssemblerPredicate = isGFX10Plus in { 874 multiclass VOPC_Real_gfx10<bits<9> op> { 875 let DecoderNamespace = "GFX10" in { 876 def _e32_gfx10 : 877 VOPC_Real<!cast<VOPC_Pseudo>(NAME#"_e32"), SIEncodingFamily.GFX10>, 878 VOPCe<op{7-0}>; 879 def _e64_gfx10 : 880 VOP3_Real<!cast<VOP3_Pseudo>(NAME#"_e64"), SIEncodingFamily.GFX10>, 881 VOP3a_gfx10<{0, op}, !cast<VOP3_Pseudo>(NAME#"_e64").Pfl> { 882 // Encoding used for VOPC instructions encoded as VOP3 differs from 883 // VOP3e by destination name (sdst) as VOPC doesn't have vector dst. 884 bits<8> sdst; 885 let Inst{7-0} = sdst; 886 } 887 } // End DecoderNamespace = "GFX10" 888 889 foreach _ = BoolToList<!cast<VOPC_Pseudo>(NAME#"_e32").Pfl.HasExtSDWA9>.ret in 890 def _sdwa_gfx10 : 891 VOP_SDWA10_Real<!cast<VOPC_SDWA_Pseudo>(NAME#"_sdwa")>, 892 VOPC_SDWA9e<op{7-0}, !cast<VOPC_SDWA_Pseudo>(NAME#"_sdwa").Pfl>; 893 894 defm : VOPCInstAliases<NAME, "gfx10">; 895 } 896 897 multiclass VOPCX_Real_gfx10<bits<9> op> { 898 let DecoderNamespace = "GFX10" in { 899 def _e32_gfx10 : 900 VOPC_Real<!cast<VOPC_Pseudo>(NAME#"_nosdst_e32"), SIEncodingFamily.GFX10>, 901 VOPCe<op{7-0}> { 902 let AsmString = !subst("_nosdst", "", !cast<VOPC_Pseudo>(NAME#"_nosdst_e32").PseudoInstr) 903 # " " # !cast<VOPC_Pseudo>(NAME#"_nosdst_e32").AsmOperands; 904 } 905 906 def _e64_gfx10 : 907 VOP3_Real<!cast<VOP3_Pseudo>(NAME#"_nosdst_e64"), SIEncodingFamily.GFX10>, 908 VOP3a_gfx10<{0, op}, !cast<VOP3_Pseudo>(NAME#"_nosdst_e64").Pfl> { 909 let Inst{7-0} = ?; // sdst 910 let AsmString = !subst("_nosdst", "", !cast<VOP3_Pseudo>(NAME#"_nosdst_e64").Mnemonic) 911 # "{_e64} " # !cast<VOP3_Pseudo>(NAME#"_nosdst_e64").AsmOperands; 912 } 913 } // End DecoderNamespace = "GFX10" 914 915 foreach _ = BoolToList<!cast<VOPC_Pseudo>(NAME#"_nosdst_e32").Pfl.HasExtSDWA9>.ret in 916 def _sdwa_gfx10 : 917 VOP_SDWA10_Real<!cast<VOPC_SDWA_Pseudo>(NAME#"_nosdst_sdwa")>, 918 VOPC_SDWA9e<op{7-0}, !cast<VOPC_SDWA_Pseudo>(NAME#"_nosdst_sdwa").Pfl> { 919 let AsmString = !subst("_nosdst", "", !cast<VOPC_SDWA_Pseudo>(NAME#"_nosdst_sdwa").Mnemonic) 920 # "{_sdwa} " # !cast<VOPC_SDWA_Pseudo>(NAME#"_nosdst_sdwa").AsmOperands9; 921 } 922 923 defm : VOPCXInstAliases<NAME, "gfx10">; 924 } 925} // End AssemblerPredicate = isGFX10Plus 926 927defm V_CMP_LT_I16 : VOPC_Real_gfx10<0x089>; 928defm V_CMP_EQ_I16 : VOPC_Real_gfx10<0x08a>; 929defm V_CMP_LE_I16 : VOPC_Real_gfx10<0x08b>; 930defm V_CMP_GT_I16 : VOPC_Real_gfx10<0x08c>; 931defm V_CMP_NE_I16 : VOPC_Real_gfx10<0x08d>; 932defm V_CMP_GE_I16 : VOPC_Real_gfx10<0x08e>; 933defm V_CMP_CLASS_F16 : VOPC_Real_gfx10<0x08f>; 934defm V_CMPX_LT_I16 : VOPCX_Real_gfx10<0x099>; 935defm V_CMPX_EQ_I16 : VOPCX_Real_gfx10<0x09a>; 936defm V_CMPX_LE_I16 : VOPCX_Real_gfx10<0x09b>; 937defm V_CMPX_GT_I16 : VOPCX_Real_gfx10<0x09c>; 938defm V_CMPX_NE_I16 : VOPCX_Real_gfx10<0x09d>; 939defm V_CMPX_GE_I16 : VOPCX_Real_gfx10<0x09e>; 940defm V_CMPX_CLASS_F16 : VOPCX_Real_gfx10<0x09f>; 941defm V_CMP_LT_U16 : VOPC_Real_gfx10<0x0a9>; 942defm V_CMP_EQ_U16 : VOPC_Real_gfx10<0x0aa>; 943defm V_CMP_LE_U16 : VOPC_Real_gfx10<0x0ab>; 944defm V_CMP_GT_U16 : VOPC_Real_gfx10<0x0ac>; 945defm V_CMP_NE_U16 : VOPC_Real_gfx10<0x0ad>; 946defm V_CMP_GE_U16 : VOPC_Real_gfx10<0x0ae>; 947defm V_CMPX_LT_U16 : VOPCX_Real_gfx10<0x0b9>; 948defm V_CMPX_EQ_U16 : VOPCX_Real_gfx10<0x0ba>; 949defm V_CMPX_LE_U16 : VOPCX_Real_gfx10<0x0bb>; 950defm V_CMPX_GT_U16 : VOPCX_Real_gfx10<0x0bc>; 951defm V_CMPX_NE_U16 : VOPCX_Real_gfx10<0x0bd>; 952defm V_CMPX_GE_U16 : VOPCX_Real_gfx10<0x0be>; 953defm V_CMP_F_F16 : VOPC_Real_gfx10<0x0c8>; 954defm V_CMP_LT_F16 : VOPC_Real_gfx10<0x0c9>; 955defm V_CMP_EQ_F16 : VOPC_Real_gfx10<0x0ca>; 956defm V_CMP_LE_F16 : VOPC_Real_gfx10<0x0cb>; 957defm V_CMP_GT_F16 : VOPC_Real_gfx10<0x0cc>; 958defm V_CMP_LG_F16 : VOPC_Real_gfx10<0x0cd>; 959defm V_CMP_GE_F16 : VOPC_Real_gfx10<0x0ce>; 960defm V_CMP_O_F16 : VOPC_Real_gfx10<0x0cf>; 961defm V_CMPX_F_F16 : VOPCX_Real_gfx10<0x0d8>; 962defm V_CMPX_LT_F16 : VOPCX_Real_gfx10<0x0d9>; 963defm V_CMPX_EQ_F16 : VOPCX_Real_gfx10<0x0da>; 964defm V_CMPX_LE_F16 : VOPCX_Real_gfx10<0x0db>; 965defm V_CMPX_GT_F16 : VOPCX_Real_gfx10<0x0dc>; 966defm V_CMPX_LG_F16 : VOPCX_Real_gfx10<0x0dd>; 967defm V_CMPX_GE_F16 : VOPCX_Real_gfx10<0x0de>; 968defm V_CMPX_O_F16 : VOPCX_Real_gfx10<0x0df>; 969defm V_CMP_U_F16 : VOPC_Real_gfx10<0x0e8>; 970defm V_CMP_NGE_F16 : VOPC_Real_gfx10<0x0e9>; 971defm V_CMP_NLG_F16 : VOPC_Real_gfx10<0x0ea>; 972defm V_CMP_NGT_F16 : VOPC_Real_gfx10<0x0eb>; 973defm V_CMP_NLE_F16 : VOPC_Real_gfx10<0x0ec>; 974defm V_CMP_NEQ_F16 : VOPC_Real_gfx10<0x0ed>; 975defm V_CMP_NLT_F16 : VOPC_Real_gfx10<0x0ee>; 976defm V_CMP_TRU_F16 : VOPC_Real_gfx10<0x0ef>; 977defm V_CMPX_U_F16 : VOPCX_Real_gfx10<0x0f8>; 978defm V_CMPX_NGE_F16 : VOPCX_Real_gfx10<0x0f9>; 979defm V_CMPX_NLG_F16 : VOPCX_Real_gfx10<0x0fa>; 980defm V_CMPX_NGT_F16 : VOPCX_Real_gfx10<0x0fb>; 981defm V_CMPX_NLE_F16 : VOPCX_Real_gfx10<0x0fc>; 982defm V_CMPX_NEQ_F16 : VOPCX_Real_gfx10<0x0fd>; 983defm V_CMPX_NLT_F16 : VOPCX_Real_gfx10<0x0fe>; 984defm V_CMPX_TRU_F16 : VOPCX_Real_gfx10<0x0ff>; 985 986//===----------------------------------------------------------------------===// 987// GFX6, GFX7, GFX10. 988//===----------------------------------------------------------------------===// 989 990let AssemblerPredicate = isGFX6GFX7 in { 991 multiclass VOPC_Real_gfx6_gfx7<bits<9> op> { 992 let DecoderNamespace = "GFX6GFX7" in { 993 def _e32_gfx6_gfx7 : 994 VOPC_Real<!cast<VOPC_Pseudo>(NAME#"_e32"), SIEncodingFamily.SI>, 995 VOPCe<op{7-0}>; 996 def _e64_gfx6_gfx7 : 997 VOP3_Real<!cast<VOP3_Pseudo>(NAME#"_e64"), SIEncodingFamily.SI>, 998 VOP3a_gfx6_gfx7<op, !cast<VOP3_Pseudo>(NAME#"_e64").Pfl> { 999 // Encoding used for VOPC instructions encoded as VOP3 differs from 1000 // VOP3e by destination name (sdst) as VOPC doesn't have vector dst. 1001 bits<8> sdst; 1002 let Inst{7-0} = sdst; 1003 } 1004 } // End DecoderNamespace = "GFX6GFX7" 1005 1006 defm : VOPCInstAliases<NAME, "gfx6_gfx7">; 1007 } 1008} // End AssemblerPredicate = isGFX6GFX7 1009 1010multiclass VOPC_Real_gfx6_gfx7_gfx10<bits<9> op> : 1011 VOPC_Real_gfx6_gfx7<op>, VOPC_Real_gfx10<op>; 1012 1013multiclass VOPCX_Real_gfx6_gfx7<bits<9> op> : 1014 VOPC_Real_gfx6_gfx7<op>; 1015 1016multiclass VOPCX_Real_gfx6_gfx7_gfx10 <bits<9> op> : 1017 VOPC_Real_gfx6_gfx7<op>, VOPCX_Real_gfx10<op>; 1018 1019defm V_CMP_F_F32 : VOPC_Real_gfx6_gfx7_gfx10<0x000>; 1020defm V_CMP_LT_F32 : VOPC_Real_gfx6_gfx7_gfx10<0x001>; 1021defm V_CMP_EQ_F32 : VOPC_Real_gfx6_gfx7_gfx10<0x002>; 1022defm V_CMP_LE_F32 : VOPC_Real_gfx6_gfx7_gfx10<0x003>; 1023defm V_CMP_GT_F32 : VOPC_Real_gfx6_gfx7_gfx10<0x004>; 1024defm V_CMP_LG_F32 : VOPC_Real_gfx6_gfx7_gfx10<0x005>; 1025defm V_CMP_GE_F32 : VOPC_Real_gfx6_gfx7_gfx10<0x006>; 1026defm V_CMP_O_F32 : VOPC_Real_gfx6_gfx7_gfx10<0x007>; 1027defm V_CMP_U_F32 : VOPC_Real_gfx6_gfx7_gfx10<0x008>; 1028defm V_CMP_NGE_F32 : VOPC_Real_gfx6_gfx7_gfx10<0x009>; 1029defm V_CMP_NLG_F32 : VOPC_Real_gfx6_gfx7_gfx10<0x00a>; 1030defm V_CMP_NGT_F32 : VOPC_Real_gfx6_gfx7_gfx10<0x00b>; 1031defm V_CMP_NLE_F32 : VOPC_Real_gfx6_gfx7_gfx10<0x00c>; 1032defm V_CMP_NEQ_F32 : VOPC_Real_gfx6_gfx7_gfx10<0x00d>; 1033defm V_CMP_NLT_F32 : VOPC_Real_gfx6_gfx7_gfx10<0x00e>; 1034defm V_CMP_TRU_F32 : VOPC_Real_gfx6_gfx7_gfx10<0x00f>; 1035defm V_CMPX_F_F32 : VOPCX_Real_gfx6_gfx7_gfx10<0x010>; 1036defm V_CMPX_LT_F32 : VOPCX_Real_gfx6_gfx7_gfx10<0x011>; 1037defm V_CMPX_EQ_F32 : VOPCX_Real_gfx6_gfx7_gfx10<0x012>; 1038defm V_CMPX_LE_F32 : VOPCX_Real_gfx6_gfx7_gfx10<0x013>; 1039defm V_CMPX_GT_F32 : VOPCX_Real_gfx6_gfx7_gfx10<0x014>; 1040defm V_CMPX_LG_F32 : VOPCX_Real_gfx6_gfx7_gfx10<0x015>; 1041defm V_CMPX_GE_F32 : VOPCX_Real_gfx6_gfx7_gfx10<0x016>; 1042defm V_CMPX_O_F32 : VOPCX_Real_gfx6_gfx7_gfx10<0x017>; 1043defm V_CMPX_U_F32 : VOPCX_Real_gfx6_gfx7_gfx10<0x018>; 1044defm V_CMPX_NGE_F32 : VOPCX_Real_gfx6_gfx7_gfx10<0x019>; 1045defm V_CMPX_NLG_F32 : VOPCX_Real_gfx6_gfx7_gfx10<0x01a>; 1046defm V_CMPX_NGT_F32 : VOPCX_Real_gfx6_gfx7_gfx10<0x01b>; 1047defm V_CMPX_NLE_F32 : VOPCX_Real_gfx6_gfx7_gfx10<0x01c>; 1048defm V_CMPX_NEQ_F32 : VOPCX_Real_gfx6_gfx7_gfx10<0x01d>; 1049defm V_CMPX_NLT_F32 : VOPCX_Real_gfx6_gfx7_gfx10<0x01e>; 1050defm V_CMPX_TRU_F32 : VOPCX_Real_gfx6_gfx7_gfx10<0x01f>; 1051defm V_CMP_F_F64 : VOPC_Real_gfx6_gfx7_gfx10<0x020>; 1052defm V_CMP_LT_F64 : VOPC_Real_gfx6_gfx7_gfx10<0x021>; 1053defm V_CMP_EQ_F64 : VOPC_Real_gfx6_gfx7_gfx10<0x022>; 1054defm V_CMP_LE_F64 : VOPC_Real_gfx6_gfx7_gfx10<0x023>; 1055defm V_CMP_GT_F64 : VOPC_Real_gfx6_gfx7_gfx10<0x024>; 1056defm V_CMP_LG_F64 : VOPC_Real_gfx6_gfx7_gfx10<0x025>; 1057defm V_CMP_GE_F64 : VOPC_Real_gfx6_gfx7_gfx10<0x026>; 1058defm V_CMP_O_F64 : VOPC_Real_gfx6_gfx7_gfx10<0x027>; 1059defm V_CMP_U_F64 : VOPC_Real_gfx6_gfx7_gfx10<0x028>; 1060defm V_CMP_NGE_F64 : VOPC_Real_gfx6_gfx7_gfx10<0x029>; 1061defm V_CMP_NLG_F64 : VOPC_Real_gfx6_gfx7_gfx10<0x02a>; 1062defm V_CMP_NGT_F64 : VOPC_Real_gfx6_gfx7_gfx10<0x02b>; 1063defm V_CMP_NLE_F64 : VOPC_Real_gfx6_gfx7_gfx10<0x02c>; 1064defm V_CMP_NEQ_F64 : VOPC_Real_gfx6_gfx7_gfx10<0x02d>; 1065defm V_CMP_NLT_F64 : VOPC_Real_gfx6_gfx7_gfx10<0x02e>; 1066defm V_CMP_TRU_F64 : VOPC_Real_gfx6_gfx7_gfx10<0x02f>; 1067defm V_CMPX_F_F64 : VOPCX_Real_gfx6_gfx7_gfx10<0x030>; 1068defm V_CMPX_LT_F64 : VOPCX_Real_gfx6_gfx7_gfx10<0x031>; 1069defm V_CMPX_EQ_F64 : VOPCX_Real_gfx6_gfx7_gfx10<0x032>; 1070defm V_CMPX_LE_F64 : VOPCX_Real_gfx6_gfx7_gfx10<0x033>; 1071defm V_CMPX_GT_F64 : VOPCX_Real_gfx6_gfx7_gfx10<0x034>; 1072defm V_CMPX_LG_F64 : VOPCX_Real_gfx6_gfx7_gfx10<0x035>; 1073defm V_CMPX_GE_F64 : VOPCX_Real_gfx6_gfx7_gfx10<0x036>; 1074defm V_CMPX_O_F64 : VOPCX_Real_gfx6_gfx7_gfx10<0x037>; 1075defm V_CMPX_U_F64 : VOPCX_Real_gfx6_gfx7_gfx10<0x038>; 1076defm V_CMPX_NGE_F64 : VOPCX_Real_gfx6_gfx7_gfx10<0x039>; 1077defm V_CMPX_NLG_F64 : VOPCX_Real_gfx6_gfx7_gfx10<0x03a>; 1078defm V_CMPX_NGT_F64 : VOPCX_Real_gfx6_gfx7_gfx10<0x03b>; 1079defm V_CMPX_NLE_F64 : VOPCX_Real_gfx6_gfx7_gfx10<0x03c>; 1080defm V_CMPX_NEQ_F64 : VOPCX_Real_gfx6_gfx7_gfx10<0x03d>; 1081defm V_CMPX_NLT_F64 : VOPCX_Real_gfx6_gfx7_gfx10<0x03e>; 1082defm V_CMPX_TRU_F64 : VOPCX_Real_gfx6_gfx7_gfx10<0x03f>; 1083defm V_CMPS_F_F32 : VOPC_Real_gfx6_gfx7<0x040>; 1084defm V_CMPS_LT_F32 : VOPC_Real_gfx6_gfx7<0x041>; 1085defm V_CMPS_EQ_F32 : VOPC_Real_gfx6_gfx7<0x042>; 1086defm V_CMPS_LE_F32 : VOPC_Real_gfx6_gfx7<0x043>; 1087defm V_CMPS_GT_F32 : VOPC_Real_gfx6_gfx7<0x044>; 1088defm V_CMPS_LG_F32 : VOPC_Real_gfx6_gfx7<0x045>; 1089defm V_CMPS_GE_F32 : VOPC_Real_gfx6_gfx7<0x046>; 1090defm V_CMPS_O_F32 : VOPC_Real_gfx6_gfx7<0x047>; 1091defm V_CMPS_U_F32 : VOPC_Real_gfx6_gfx7<0x048>; 1092defm V_CMPS_NGE_F32 : VOPC_Real_gfx6_gfx7<0x049>; 1093defm V_CMPS_NLG_F32 : VOPC_Real_gfx6_gfx7<0x04a>; 1094defm V_CMPS_NGT_F32 : VOPC_Real_gfx6_gfx7<0x04b>; 1095defm V_CMPS_NLE_F32 : VOPC_Real_gfx6_gfx7<0x04c>; 1096defm V_CMPS_NEQ_F32 : VOPC_Real_gfx6_gfx7<0x04d>; 1097defm V_CMPS_NLT_F32 : VOPC_Real_gfx6_gfx7<0x04e>; 1098defm V_CMPS_TRU_F32 : VOPC_Real_gfx6_gfx7<0x04f>; 1099defm V_CMPSX_F_F32 : VOPCX_Real_gfx6_gfx7<0x050>; 1100defm V_CMPSX_LT_F32 : VOPCX_Real_gfx6_gfx7<0x051>; 1101defm V_CMPSX_EQ_F32 : VOPCX_Real_gfx6_gfx7<0x052>; 1102defm V_CMPSX_LE_F32 : VOPCX_Real_gfx6_gfx7<0x053>; 1103defm V_CMPSX_GT_F32 : VOPCX_Real_gfx6_gfx7<0x054>; 1104defm V_CMPSX_LG_F32 : VOPCX_Real_gfx6_gfx7<0x055>; 1105defm V_CMPSX_GE_F32 : VOPCX_Real_gfx6_gfx7<0x056>; 1106defm V_CMPSX_O_F32 : VOPCX_Real_gfx6_gfx7<0x057>; 1107defm V_CMPSX_U_F32 : VOPCX_Real_gfx6_gfx7<0x058>; 1108defm V_CMPSX_NGE_F32 : VOPCX_Real_gfx6_gfx7<0x059>; 1109defm V_CMPSX_NLG_F32 : VOPCX_Real_gfx6_gfx7<0x05a>; 1110defm V_CMPSX_NGT_F32 : VOPCX_Real_gfx6_gfx7<0x05b>; 1111defm V_CMPSX_NLE_F32 : VOPCX_Real_gfx6_gfx7<0x05c>; 1112defm V_CMPSX_NEQ_F32 : VOPCX_Real_gfx6_gfx7<0x05d>; 1113defm V_CMPSX_NLT_F32 : VOPCX_Real_gfx6_gfx7<0x05e>; 1114defm V_CMPSX_TRU_F32 : VOPCX_Real_gfx6_gfx7<0x05f>; 1115defm V_CMPS_F_F64 : VOPC_Real_gfx6_gfx7<0x060>; 1116defm V_CMPS_LT_F64 : VOPC_Real_gfx6_gfx7<0x061>; 1117defm V_CMPS_EQ_F64 : VOPC_Real_gfx6_gfx7<0x062>; 1118defm V_CMPS_LE_F64 : VOPC_Real_gfx6_gfx7<0x063>; 1119defm V_CMPS_GT_F64 : VOPC_Real_gfx6_gfx7<0x064>; 1120defm V_CMPS_LG_F64 : VOPC_Real_gfx6_gfx7<0x065>; 1121defm V_CMPS_GE_F64 : VOPC_Real_gfx6_gfx7<0x066>; 1122defm V_CMPS_O_F64 : VOPC_Real_gfx6_gfx7<0x067>; 1123defm V_CMPS_U_F64 : VOPC_Real_gfx6_gfx7<0x068>; 1124defm V_CMPS_NGE_F64 : VOPC_Real_gfx6_gfx7<0x069>; 1125defm V_CMPS_NLG_F64 : VOPC_Real_gfx6_gfx7<0x06a>; 1126defm V_CMPS_NGT_F64 : VOPC_Real_gfx6_gfx7<0x06b>; 1127defm V_CMPS_NLE_F64 : VOPC_Real_gfx6_gfx7<0x06c>; 1128defm V_CMPS_NEQ_F64 : VOPC_Real_gfx6_gfx7<0x06d>; 1129defm V_CMPS_NLT_F64 : VOPC_Real_gfx6_gfx7<0x06e>; 1130defm V_CMPS_TRU_F64 : VOPC_Real_gfx6_gfx7<0x06f>; 1131defm V_CMPSX_F_F64 : VOPCX_Real_gfx6_gfx7<0x070>; 1132defm V_CMPSX_LT_F64 : VOPCX_Real_gfx6_gfx7<0x071>; 1133defm V_CMPSX_EQ_F64 : VOPCX_Real_gfx6_gfx7<0x072>; 1134defm V_CMPSX_LE_F64 : VOPCX_Real_gfx6_gfx7<0x073>; 1135defm V_CMPSX_GT_F64 : VOPCX_Real_gfx6_gfx7<0x074>; 1136defm V_CMPSX_LG_F64 : VOPCX_Real_gfx6_gfx7<0x075>; 1137defm V_CMPSX_GE_F64 : VOPCX_Real_gfx6_gfx7<0x076>; 1138defm V_CMPSX_O_F64 : VOPCX_Real_gfx6_gfx7<0x077>; 1139defm V_CMPSX_U_F64 : VOPCX_Real_gfx6_gfx7<0x078>; 1140defm V_CMPSX_NGE_F64 : VOPCX_Real_gfx6_gfx7<0x079>; 1141defm V_CMPSX_NLG_F64 : VOPCX_Real_gfx6_gfx7<0x07a>; 1142defm V_CMPSX_NGT_F64 : VOPCX_Real_gfx6_gfx7<0x07b>; 1143defm V_CMPSX_NLE_F64 : VOPCX_Real_gfx6_gfx7<0x07c>; 1144defm V_CMPSX_NEQ_F64 : VOPCX_Real_gfx6_gfx7<0x07d>; 1145defm V_CMPSX_NLT_F64 : VOPCX_Real_gfx6_gfx7<0x07e>; 1146defm V_CMPSX_TRU_F64 : VOPCX_Real_gfx6_gfx7<0x07f>; 1147defm V_CMP_F_I32 : VOPC_Real_gfx6_gfx7_gfx10<0x080>; 1148defm V_CMP_LT_I32 : VOPC_Real_gfx6_gfx7_gfx10<0x081>; 1149defm V_CMP_EQ_I32 : VOPC_Real_gfx6_gfx7_gfx10<0x082>; 1150defm V_CMP_LE_I32 : VOPC_Real_gfx6_gfx7_gfx10<0x083>; 1151defm V_CMP_GT_I32 : VOPC_Real_gfx6_gfx7_gfx10<0x084>; 1152defm V_CMP_NE_I32 : VOPC_Real_gfx6_gfx7_gfx10<0x085>; 1153defm V_CMP_GE_I32 : VOPC_Real_gfx6_gfx7_gfx10<0x086>; 1154defm V_CMP_T_I32 : VOPC_Real_gfx6_gfx7_gfx10<0x087>; 1155defm V_CMP_CLASS_F32 : VOPC_Real_gfx6_gfx7_gfx10<0x088>; 1156defm V_CMPX_F_I32 : VOPCX_Real_gfx6_gfx7_gfx10<0x090>; 1157defm V_CMPX_LT_I32 : VOPCX_Real_gfx6_gfx7_gfx10<0x091>; 1158defm V_CMPX_EQ_I32 : VOPCX_Real_gfx6_gfx7_gfx10<0x092>; 1159defm V_CMPX_LE_I32 : VOPCX_Real_gfx6_gfx7_gfx10<0x093>; 1160defm V_CMPX_GT_I32 : VOPCX_Real_gfx6_gfx7_gfx10<0x094>; 1161defm V_CMPX_NE_I32 : VOPCX_Real_gfx6_gfx7_gfx10<0x095>; 1162defm V_CMPX_GE_I32 : VOPCX_Real_gfx6_gfx7_gfx10<0x096>; 1163defm V_CMPX_T_I32 : VOPCX_Real_gfx6_gfx7_gfx10<0x097>; 1164defm V_CMPX_CLASS_F32 : VOPCX_Real_gfx6_gfx7_gfx10<0x098>; 1165defm V_CMP_F_I64 : VOPC_Real_gfx6_gfx7_gfx10<0x0a0>; 1166defm V_CMP_LT_I64 : VOPC_Real_gfx6_gfx7_gfx10<0x0a1>; 1167defm V_CMP_EQ_I64 : VOPC_Real_gfx6_gfx7_gfx10<0x0a2>; 1168defm V_CMP_LE_I64 : VOPC_Real_gfx6_gfx7_gfx10<0x0a3>; 1169defm V_CMP_GT_I64 : VOPC_Real_gfx6_gfx7_gfx10<0x0a4>; 1170defm V_CMP_NE_I64 : VOPC_Real_gfx6_gfx7_gfx10<0x0a5>; 1171defm V_CMP_GE_I64 : VOPC_Real_gfx6_gfx7_gfx10<0x0a6>; 1172defm V_CMP_T_I64 : VOPC_Real_gfx6_gfx7_gfx10<0x0a7>; 1173defm V_CMP_CLASS_F64 : VOPC_Real_gfx6_gfx7_gfx10<0x0a8>; 1174defm V_CMPX_F_I64 : VOPCX_Real_gfx6_gfx7_gfx10<0x0b0>; 1175defm V_CMPX_LT_I64 : VOPCX_Real_gfx6_gfx7_gfx10<0x0b1>; 1176defm V_CMPX_EQ_I64 : VOPCX_Real_gfx6_gfx7_gfx10<0x0b2>; 1177defm V_CMPX_LE_I64 : VOPCX_Real_gfx6_gfx7_gfx10<0x0b3>; 1178defm V_CMPX_GT_I64 : VOPCX_Real_gfx6_gfx7_gfx10<0x0b4>; 1179defm V_CMPX_NE_I64 : VOPCX_Real_gfx6_gfx7_gfx10<0x0b5>; 1180defm V_CMPX_GE_I64 : VOPCX_Real_gfx6_gfx7_gfx10<0x0b6>; 1181defm V_CMPX_T_I64 : VOPCX_Real_gfx6_gfx7_gfx10<0x0b7>; 1182defm V_CMPX_CLASS_F64 : VOPCX_Real_gfx6_gfx7_gfx10<0x0b8>; 1183defm V_CMP_F_U32 : VOPC_Real_gfx6_gfx7_gfx10<0x0c0>; 1184defm V_CMP_LT_U32 : VOPC_Real_gfx6_gfx7_gfx10<0x0c1>; 1185defm V_CMP_EQ_U32 : VOPC_Real_gfx6_gfx7_gfx10<0x0c2>; 1186defm V_CMP_LE_U32 : VOPC_Real_gfx6_gfx7_gfx10<0x0c3>; 1187defm V_CMP_GT_U32 : VOPC_Real_gfx6_gfx7_gfx10<0x0c4>; 1188defm V_CMP_NE_U32 : VOPC_Real_gfx6_gfx7_gfx10<0x0c5>; 1189defm V_CMP_GE_U32 : VOPC_Real_gfx6_gfx7_gfx10<0x0c6>; 1190defm V_CMP_T_U32 : VOPC_Real_gfx6_gfx7_gfx10<0x0c7>; 1191defm V_CMPX_F_U32 : VOPCX_Real_gfx6_gfx7_gfx10<0x0d0>; 1192defm V_CMPX_LT_U32 : VOPCX_Real_gfx6_gfx7_gfx10<0x0d1>; 1193defm V_CMPX_EQ_U32 : VOPCX_Real_gfx6_gfx7_gfx10<0x0d2>; 1194defm V_CMPX_LE_U32 : VOPCX_Real_gfx6_gfx7_gfx10<0x0d3>; 1195defm V_CMPX_GT_U32 : VOPCX_Real_gfx6_gfx7_gfx10<0x0d4>; 1196defm V_CMPX_NE_U32 : VOPCX_Real_gfx6_gfx7_gfx10<0x0d5>; 1197defm V_CMPX_GE_U32 : VOPCX_Real_gfx6_gfx7_gfx10<0x0d6>; 1198defm V_CMPX_T_U32 : VOPCX_Real_gfx6_gfx7_gfx10<0x0d7>; 1199defm V_CMP_F_U64 : VOPC_Real_gfx6_gfx7_gfx10<0x0e0>; 1200defm V_CMP_LT_U64 : VOPC_Real_gfx6_gfx7_gfx10<0x0e1>; 1201defm V_CMP_EQ_U64 : VOPC_Real_gfx6_gfx7_gfx10<0x0e2>; 1202defm V_CMP_LE_U64 : VOPC_Real_gfx6_gfx7_gfx10<0x0e3>; 1203defm V_CMP_GT_U64 : VOPC_Real_gfx6_gfx7_gfx10<0x0e4>; 1204defm V_CMP_NE_U64 : VOPC_Real_gfx6_gfx7_gfx10<0x0e5>; 1205defm V_CMP_GE_U64 : VOPC_Real_gfx6_gfx7_gfx10<0x0e6>; 1206defm V_CMP_T_U64 : VOPC_Real_gfx6_gfx7_gfx10<0x0e7>; 1207defm V_CMPX_F_U64 : VOPCX_Real_gfx6_gfx7_gfx10<0x0f0>; 1208defm V_CMPX_LT_U64 : VOPCX_Real_gfx6_gfx7_gfx10<0x0f1>; 1209defm V_CMPX_EQ_U64 : VOPCX_Real_gfx6_gfx7_gfx10<0x0f2>; 1210defm V_CMPX_LE_U64 : VOPCX_Real_gfx6_gfx7_gfx10<0x0f3>; 1211defm V_CMPX_GT_U64 : VOPCX_Real_gfx6_gfx7_gfx10<0x0f4>; 1212defm V_CMPX_NE_U64 : VOPCX_Real_gfx6_gfx7_gfx10<0x0f5>; 1213defm V_CMPX_GE_U64 : VOPCX_Real_gfx6_gfx7_gfx10<0x0f6>; 1214defm V_CMPX_T_U64 : VOPCX_Real_gfx6_gfx7_gfx10<0x0f7>; 1215 1216//===----------------------------------------------------------------------===// 1217// GFX8, GFX9 (VI). 1218//===----------------------------------------------------------------------===// 1219 1220multiclass VOPC_Real_vi <bits<10> op> { 1221 let AssemblerPredicate = isGFX8GFX9, DecoderNamespace = "GFX8" in { 1222 def _e32_vi : 1223 VOPC_Real<!cast<VOPC_Pseudo>(NAME#"_e32"), SIEncodingFamily.VI>, 1224 VOPCe<op{7-0}>; 1225 1226 def _e64_vi : 1227 VOP3_Real<!cast<VOP3_Pseudo>(NAME#"_e64"), SIEncodingFamily.VI>, 1228 VOP3a_vi <op, !cast<VOP3_Pseudo>(NAME#"_e64").Pfl> { 1229 // Encoding used for VOPC instructions encoded as VOP3 1230 // Differs from VOP3e by destination name (sdst) as VOPC doesn't have vector dst 1231 bits<8> sdst; 1232 let Inst{7-0} = sdst; 1233 } 1234 } 1235 1236 foreach _ = BoolToList<!cast<VOPC_Pseudo>(NAME#"_e32").Pfl.HasExtSDWA>.ret in 1237 def _sdwa_vi : 1238 VOP_SDWA_Real <!cast<VOPC_SDWA_Pseudo>(NAME#"_sdwa")>, 1239 VOPC_SDWAe <op{7-0}, !cast<VOPC_SDWA_Pseudo>(NAME#"_sdwa").Pfl>; 1240 1241 foreach _ = BoolToList<!cast<VOPC_Pseudo>(NAME#"_e32").Pfl.HasExtSDWA9>.ret in 1242 def _sdwa_gfx9 : 1243 VOP_SDWA9_Real <!cast<VOPC_SDWA_Pseudo>(NAME#"_sdwa")>, 1244 VOPC_SDWA9e <op{7-0}, !cast<VOPC_SDWA_Pseudo>(NAME#"_sdwa").Pfl>; 1245 1246 let AssemblerPredicate = isGFX8GFX9 in { 1247 defm : VOPCInstAliases<NAME, "vi">; 1248 } 1249} 1250 1251defm V_CMP_CLASS_F32 : VOPC_Real_vi <0x10>; 1252defm V_CMPX_CLASS_F32 : VOPC_Real_vi <0x11>; 1253defm V_CMP_CLASS_F64 : VOPC_Real_vi <0x12>; 1254defm V_CMPX_CLASS_F64 : VOPC_Real_vi <0x13>; 1255defm V_CMP_CLASS_F16 : VOPC_Real_vi <0x14>; 1256defm V_CMPX_CLASS_F16 : VOPC_Real_vi <0x15>; 1257 1258defm V_CMP_F_F16 : VOPC_Real_vi <0x20>; 1259defm V_CMP_LT_F16 : VOPC_Real_vi <0x21>; 1260defm V_CMP_EQ_F16 : VOPC_Real_vi <0x22>; 1261defm V_CMP_LE_F16 : VOPC_Real_vi <0x23>; 1262defm V_CMP_GT_F16 : VOPC_Real_vi <0x24>; 1263defm V_CMP_LG_F16 : VOPC_Real_vi <0x25>; 1264defm V_CMP_GE_F16 : VOPC_Real_vi <0x26>; 1265defm V_CMP_O_F16 : VOPC_Real_vi <0x27>; 1266defm V_CMP_U_F16 : VOPC_Real_vi <0x28>; 1267defm V_CMP_NGE_F16 : VOPC_Real_vi <0x29>; 1268defm V_CMP_NLG_F16 : VOPC_Real_vi <0x2a>; 1269defm V_CMP_NGT_F16 : VOPC_Real_vi <0x2b>; 1270defm V_CMP_NLE_F16 : VOPC_Real_vi <0x2c>; 1271defm V_CMP_NEQ_F16 : VOPC_Real_vi <0x2d>; 1272defm V_CMP_NLT_F16 : VOPC_Real_vi <0x2e>; 1273defm V_CMP_TRU_F16 : VOPC_Real_vi <0x2f>; 1274 1275defm V_CMPX_F_F16 : VOPC_Real_vi <0x30>; 1276defm V_CMPX_LT_F16 : VOPC_Real_vi <0x31>; 1277defm V_CMPX_EQ_F16 : VOPC_Real_vi <0x32>; 1278defm V_CMPX_LE_F16 : VOPC_Real_vi <0x33>; 1279defm V_CMPX_GT_F16 : VOPC_Real_vi <0x34>; 1280defm V_CMPX_LG_F16 : VOPC_Real_vi <0x35>; 1281defm V_CMPX_GE_F16 : VOPC_Real_vi <0x36>; 1282defm V_CMPX_O_F16 : VOPC_Real_vi <0x37>; 1283defm V_CMPX_U_F16 : VOPC_Real_vi <0x38>; 1284defm V_CMPX_NGE_F16 : VOPC_Real_vi <0x39>; 1285defm V_CMPX_NLG_F16 : VOPC_Real_vi <0x3a>; 1286defm V_CMPX_NGT_F16 : VOPC_Real_vi <0x3b>; 1287defm V_CMPX_NLE_F16 : VOPC_Real_vi <0x3c>; 1288defm V_CMPX_NEQ_F16 : VOPC_Real_vi <0x3d>; 1289defm V_CMPX_NLT_F16 : VOPC_Real_vi <0x3e>; 1290defm V_CMPX_TRU_F16 : VOPC_Real_vi <0x3f>; 1291 1292defm V_CMP_F_F32 : VOPC_Real_vi <0x40>; 1293defm V_CMP_LT_F32 : VOPC_Real_vi <0x41>; 1294defm V_CMP_EQ_F32 : VOPC_Real_vi <0x42>; 1295defm V_CMP_LE_F32 : VOPC_Real_vi <0x43>; 1296defm V_CMP_GT_F32 : VOPC_Real_vi <0x44>; 1297defm V_CMP_LG_F32 : VOPC_Real_vi <0x45>; 1298defm V_CMP_GE_F32 : VOPC_Real_vi <0x46>; 1299defm V_CMP_O_F32 : VOPC_Real_vi <0x47>; 1300defm V_CMP_U_F32 : VOPC_Real_vi <0x48>; 1301defm V_CMP_NGE_F32 : VOPC_Real_vi <0x49>; 1302defm V_CMP_NLG_F32 : VOPC_Real_vi <0x4a>; 1303defm V_CMP_NGT_F32 : VOPC_Real_vi <0x4b>; 1304defm V_CMP_NLE_F32 : VOPC_Real_vi <0x4c>; 1305defm V_CMP_NEQ_F32 : VOPC_Real_vi <0x4d>; 1306defm V_CMP_NLT_F32 : VOPC_Real_vi <0x4e>; 1307defm V_CMP_TRU_F32 : VOPC_Real_vi <0x4f>; 1308 1309defm V_CMPX_F_F32 : VOPC_Real_vi <0x50>; 1310defm V_CMPX_LT_F32 : VOPC_Real_vi <0x51>; 1311defm V_CMPX_EQ_F32 : VOPC_Real_vi <0x52>; 1312defm V_CMPX_LE_F32 : VOPC_Real_vi <0x53>; 1313defm V_CMPX_GT_F32 : VOPC_Real_vi <0x54>; 1314defm V_CMPX_LG_F32 : VOPC_Real_vi <0x55>; 1315defm V_CMPX_GE_F32 : VOPC_Real_vi <0x56>; 1316defm V_CMPX_O_F32 : VOPC_Real_vi <0x57>; 1317defm V_CMPX_U_F32 : VOPC_Real_vi <0x58>; 1318defm V_CMPX_NGE_F32 : VOPC_Real_vi <0x59>; 1319defm V_CMPX_NLG_F32 : VOPC_Real_vi <0x5a>; 1320defm V_CMPX_NGT_F32 : VOPC_Real_vi <0x5b>; 1321defm V_CMPX_NLE_F32 : VOPC_Real_vi <0x5c>; 1322defm V_CMPX_NEQ_F32 : VOPC_Real_vi <0x5d>; 1323defm V_CMPX_NLT_F32 : VOPC_Real_vi <0x5e>; 1324defm V_CMPX_TRU_F32 : VOPC_Real_vi <0x5f>; 1325 1326defm V_CMP_F_F64 : VOPC_Real_vi <0x60>; 1327defm V_CMP_LT_F64 : VOPC_Real_vi <0x61>; 1328defm V_CMP_EQ_F64 : VOPC_Real_vi <0x62>; 1329defm V_CMP_LE_F64 : VOPC_Real_vi <0x63>; 1330defm V_CMP_GT_F64 : VOPC_Real_vi <0x64>; 1331defm V_CMP_LG_F64 : VOPC_Real_vi <0x65>; 1332defm V_CMP_GE_F64 : VOPC_Real_vi <0x66>; 1333defm V_CMP_O_F64 : VOPC_Real_vi <0x67>; 1334defm V_CMP_U_F64 : VOPC_Real_vi <0x68>; 1335defm V_CMP_NGE_F64 : VOPC_Real_vi <0x69>; 1336defm V_CMP_NLG_F64 : VOPC_Real_vi <0x6a>; 1337defm V_CMP_NGT_F64 : VOPC_Real_vi <0x6b>; 1338defm V_CMP_NLE_F64 : VOPC_Real_vi <0x6c>; 1339defm V_CMP_NEQ_F64 : VOPC_Real_vi <0x6d>; 1340defm V_CMP_NLT_F64 : VOPC_Real_vi <0x6e>; 1341defm V_CMP_TRU_F64 : VOPC_Real_vi <0x6f>; 1342 1343defm V_CMPX_F_F64 : VOPC_Real_vi <0x70>; 1344defm V_CMPX_LT_F64 : VOPC_Real_vi <0x71>; 1345defm V_CMPX_EQ_F64 : VOPC_Real_vi <0x72>; 1346defm V_CMPX_LE_F64 : VOPC_Real_vi <0x73>; 1347defm V_CMPX_GT_F64 : VOPC_Real_vi <0x74>; 1348defm V_CMPX_LG_F64 : VOPC_Real_vi <0x75>; 1349defm V_CMPX_GE_F64 : VOPC_Real_vi <0x76>; 1350defm V_CMPX_O_F64 : VOPC_Real_vi <0x77>; 1351defm V_CMPX_U_F64 : VOPC_Real_vi <0x78>; 1352defm V_CMPX_NGE_F64 : VOPC_Real_vi <0x79>; 1353defm V_CMPX_NLG_F64 : VOPC_Real_vi <0x7a>; 1354defm V_CMPX_NGT_F64 : VOPC_Real_vi <0x7b>; 1355defm V_CMPX_NLE_F64 : VOPC_Real_vi <0x7c>; 1356defm V_CMPX_NEQ_F64 : VOPC_Real_vi <0x7d>; 1357defm V_CMPX_NLT_F64 : VOPC_Real_vi <0x7e>; 1358defm V_CMPX_TRU_F64 : VOPC_Real_vi <0x7f>; 1359 1360defm V_CMP_F_I16 : VOPC_Real_vi <0xa0>; 1361defm V_CMP_LT_I16 : VOPC_Real_vi <0xa1>; 1362defm V_CMP_EQ_I16 : VOPC_Real_vi <0xa2>; 1363defm V_CMP_LE_I16 : VOPC_Real_vi <0xa3>; 1364defm V_CMP_GT_I16 : VOPC_Real_vi <0xa4>; 1365defm V_CMP_NE_I16 : VOPC_Real_vi <0xa5>; 1366defm V_CMP_GE_I16 : VOPC_Real_vi <0xa6>; 1367defm V_CMP_T_I16 : VOPC_Real_vi <0xa7>; 1368 1369defm V_CMP_F_U16 : VOPC_Real_vi <0xa8>; 1370defm V_CMP_LT_U16 : VOPC_Real_vi <0xa9>; 1371defm V_CMP_EQ_U16 : VOPC_Real_vi <0xaa>; 1372defm V_CMP_LE_U16 : VOPC_Real_vi <0xab>; 1373defm V_CMP_GT_U16 : VOPC_Real_vi <0xac>; 1374defm V_CMP_NE_U16 : VOPC_Real_vi <0xad>; 1375defm V_CMP_GE_U16 : VOPC_Real_vi <0xae>; 1376defm V_CMP_T_U16 : VOPC_Real_vi <0xaf>; 1377 1378defm V_CMPX_F_I16 : VOPC_Real_vi <0xb0>; 1379defm V_CMPX_LT_I16 : VOPC_Real_vi <0xb1>; 1380defm V_CMPX_EQ_I16 : VOPC_Real_vi <0xb2>; 1381defm V_CMPX_LE_I16 : VOPC_Real_vi <0xb3>; 1382defm V_CMPX_GT_I16 : VOPC_Real_vi <0xb4>; 1383defm V_CMPX_NE_I16 : VOPC_Real_vi <0xb5>; 1384defm V_CMPX_GE_I16 : VOPC_Real_vi <0xb6>; 1385defm V_CMPX_T_I16 : VOPC_Real_vi <0xb7>; 1386 1387defm V_CMPX_F_U16 : VOPC_Real_vi <0xb8>; 1388defm V_CMPX_LT_U16 : VOPC_Real_vi <0xb9>; 1389defm V_CMPX_EQ_U16 : VOPC_Real_vi <0xba>; 1390defm V_CMPX_LE_U16 : VOPC_Real_vi <0xbb>; 1391defm V_CMPX_GT_U16 : VOPC_Real_vi <0xbc>; 1392defm V_CMPX_NE_U16 : VOPC_Real_vi <0xbd>; 1393defm V_CMPX_GE_U16 : VOPC_Real_vi <0xbe>; 1394defm V_CMPX_T_U16 : VOPC_Real_vi <0xbf>; 1395 1396defm V_CMP_F_I32 : VOPC_Real_vi <0xc0>; 1397defm V_CMP_LT_I32 : VOPC_Real_vi <0xc1>; 1398defm V_CMP_EQ_I32 : VOPC_Real_vi <0xc2>; 1399defm V_CMP_LE_I32 : VOPC_Real_vi <0xc3>; 1400defm V_CMP_GT_I32 : VOPC_Real_vi <0xc4>; 1401defm V_CMP_NE_I32 : VOPC_Real_vi <0xc5>; 1402defm V_CMP_GE_I32 : VOPC_Real_vi <0xc6>; 1403defm V_CMP_T_I32 : VOPC_Real_vi <0xc7>; 1404 1405defm V_CMPX_F_I32 : VOPC_Real_vi <0xd0>; 1406defm V_CMPX_LT_I32 : VOPC_Real_vi <0xd1>; 1407defm V_CMPX_EQ_I32 : VOPC_Real_vi <0xd2>; 1408defm V_CMPX_LE_I32 : VOPC_Real_vi <0xd3>; 1409defm V_CMPX_GT_I32 : VOPC_Real_vi <0xd4>; 1410defm V_CMPX_NE_I32 : VOPC_Real_vi <0xd5>; 1411defm V_CMPX_GE_I32 : VOPC_Real_vi <0xd6>; 1412defm V_CMPX_T_I32 : VOPC_Real_vi <0xd7>; 1413 1414defm V_CMP_F_I64 : VOPC_Real_vi <0xe0>; 1415defm V_CMP_LT_I64 : VOPC_Real_vi <0xe1>; 1416defm V_CMP_EQ_I64 : VOPC_Real_vi <0xe2>; 1417defm V_CMP_LE_I64 : VOPC_Real_vi <0xe3>; 1418defm V_CMP_GT_I64 : VOPC_Real_vi <0xe4>; 1419defm V_CMP_NE_I64 : VOPC_Real_vi <0xe5>; 1420defm V_CMP_GE_I64 : VOPC_Real_vi <0xe6>; 1421defm V_CMP_T_I64 : VOPC_Real_vi <0xe7>; 1422 1423defm V_CMPX_F_I64 : VOPC_Real_vi <0xf0>; 1424defm V_CMPX_LT_I64 : VOPC_Real_vi <0xf1>; 1425defm V_CMPX_EQ_I64 : VOPC_Real_vi <0xf2>; 1426defm V_CMPX_LE_I64 : VOPC_Real_vi <0xf3>; 1427defm V_CMPX_GT_I64 : VOPC_Real_vi <0xf4>; 1428defm V_CMPX_NE_I64 : VOPC_Real_vi <0xf5>; 1429defm V_CMPX_GE_I64 : VOPC_Real_vi <0xf6>; 1430defm V_CMPX_T_I64 : VOPC_Real_vi <0xf7>; 1431 1432defm V_CMP_F_U32 : VOPC_Real_vi <0xc8>; 1433defm V_CMP_LT_U32 : VOPC_Real_vi <0xc9>; 1434defm V_CMP_EQ_U32 : VOPC_Real_vi <0xca>; 1435defm V_CMP_LE_U32 : VOPC_Real_vi <0xcb>; 1436defm V_CMP_GT_U32 : VOPC_Real_vi <0xcc>; 1437defm V_CMP_NE_U32 : VOPC_Real_vi <0xcd>; 1438defm V_CMP_GE_U32 : VOPC_Real_vi <0xce>; 1439defm V_CMP_T_U32 : VOPC_Real_vi <0xcf>; 1440 1441defm V_CMPX_F_U32 : VOPC_Real_vi <0xd8>; 1442defm V_CMPX_LT_U32 : VOPC_Real_vi <0xd9>; 1443defm V_CMPX_EQ_U32 : VOPC_Real_vi <0xda>; 1444defm V_CMPX_LE_U32 : VOPC_Real_vi <0xdb>; 1445defm V_CMPX_GT_U32 : VOPC_Real_vi <0xdc>; 1446defm V_CMPX_NE_U32 : VOPC_Real_vi <0xdd>; 1447defm V_CMPX_GE_U32 : VOPC_Real_vi <0xde>; 1448defm V_CMPX_T_U32 : VOPC_Real_vi <0xdf>; 1449 1450defm V_CMP_F_U64 : VOPC_Real_vi <0xe8>; 1451defm V_CMP_LT_U64 : VOPC_Real_vi <0xe9>; 1452defm V_CMP_EQ_U64 : VOPC_Real_vi <0xea>; 1453defm V_CMP_LE_U64 : VOPC_Real_vi <0xeb>; 1454defm V_CMP_GT_U64 : VOPC_Real_vi <0xec>; 1455defm V_CMP_NE_U64 : VOPC_Real_vi <0xed>; 1456defm V_CMP_GE_U64 : VOPC_Real_vi <0xee>; 1457defm V_CMP_T_U64 : VOPC_Real_vi <0xef>; 1458 1459defm V_CMPX_F_U64 : VOPC_Real_vi <0xf8>; 1460defm V_CMPX_LT_U64 : VOPC_Real_vi <0xf9>; 1461defm V_CMPX_EQ_U64 : VOPC_Real_vi <0xfa>; 1462defm V_CMPX_LE_U64 : VOPC_Real_vi <0xfb>; 1463defm V_CMPX_GT_U64 : VOPC_Real_vi <0xfc>; 1464defm V_CMPX_NE_U64 : VOPC_Real_vi <0xfd>; 1465defm V_CMPX_GE_U64 : VOPC_Real_vi <0xfe>; 1466defm V_CMPX_T_U64 : VOPC_Real_vi <0xff>; 1467