10b57cec5SDimitry Andric //===--- SIProgramInfo.h ----------------------------------------*- C++ -*-===// 20b57cec5SDimitry Andric // 30b57cec5SDimitry Andric // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 40b57cec5SDimitry Andric // See https://llvm.org/LICENSE.txt for license information. 50b57cec5SDimitry Andric // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 60b57cec5SDimitry Andric // 70b57cec5SDimitry Andric //===----------------------------------------------------------------------===// 80b57cec5SDimitry Andric // 90b57cec5SDimitry Andric /// \file 10e8d8bef9SDimitry Andric /// Defines struct to track resource usage and hardware flags for kernels and 11e8d8bef9SDimitry Andric /// entry functions. 120b57cec5SDimitry Andric /// 130b57cec5SDimitry Andric // 140b57cec5SDimitry Andric //===----------------------------------------------------------------------===// 150b57cec5SDimitry Andric 160b57cec5SDimitry Andric #ifndef LLVM_LIB_TARGET_AMDGPU_SIPROGRAMINFO_H 170b57cec5SDimitry Andric #define LLVM_LIB_TARGET_AMDGPU_SIPROGRAMINFO_H 180b57cec5SDimitry Andric 19e8d8bef9SDimitry Andric #include "llvm/IR/CallingConv.h" 20e8d8bef9SDimitry Andric #include <cstdint> 21e8d8bef9SDimitry Andric 220b57cec5SDimitry Andric namespace llvm { 230b57cec5SDimitry Andric 24*5f757f3fSDimitry Andric class GCNSubtarget; 25*5f757f3fSDimitry Andric 260b57cec5SDimitry Andric /// Track resource usage for kernels / entry functions. 270b57cec5SDimitry Andric struct SIProgramInfo { 280b57cec5SDimitry Andric // Fields set in PGM_RSRC1 pm4 packet. 290b57cec5SDimitry Andric uint32_t VGPRBlocks = 0; 300b57cec5SDimitry Andric uint32_t SGPRBlocks = 0; 310b57cec5SDimitry Andric uint32_t Priority = 0; 320b57cec5SDimitry Andric uint32_t FloatMode = 0; 330b57cec5SDimitry Andric uint32_t Priv = 0; 340b57cec5SDimitry Andric uint32_t DX10Clamp = 0; 350b57cec5SDimitry Andric uint32_t DebugMode = 0; 360b57cec5SDimitry Andric uint32_t IEEEMode = 0; 370b57cec5SDimitry Andric uint32_t WgpMode = 0; // GFX10+ 380b57cec5SDimitry Andric uint32_t MemOrdered = 0; // GFX10+ 39*5f757f3fSDimitry Andric uint32_t RrWgMode = 0; // GFX12+ 400b57cec5SDimitry Andric uint64_t ScratchSize = 0; 410b57cec5SDimitry Andric 4206c3fb27SDimitry Andric // State used to calculate fields set in PGM_RSRC2 pm4 packet. 430b57cec5SDimitry Andric uint32_t LDSBlocks = 0; 440b57cec5SDimitry Andric uint32_t ScratchBlocks = 0; 450b57cec5SDimitry Andric 4606c3fb27SDimitry Andric // Fields set in PGM_RSRC2 pm4 packet 4706c3fb27SDimitry Andric uint32_t ScratchEnable = 0; 4806c3fb27SDimitry Andric uint32_t UserSGPR = 0; 4906c3fb27SDimitry Andric uint32_t TrapHandlerEnable = 0; 5006c3fb27SDimitry Andric uint32_t TGIdXEnable = 0; 5106c3fb27SDimitry Andric uint32_t TGIdYEnable = 0; 5206c3fb27SDimitry Andric uint32_t TGIdZEnable = 0; 5306c3fb27SDimitry Andric uint32_t TGSizeEnable = 0; 5406c3fb27SDimitry Andric uint32_t TIdIGCompCount = 0; 5506c3fb27SDimitry Andric uint32_t EXCPEnMSB = 0; 5606c3fb27SDimitry Andric uint32_t LdsSize = 0; 5706c3fb27SDimitry Andric uint32_t EXCPEnable = 0; 5806c3fb27SDimitry Andric 59fe6060f1SDimitry Andric uint64_t ComputePGMRSrc3GFX90A = 0; 600b57cec5SDimitry Andric 610b57cec5SDimitry Andric uint32_t NumVGPR = 0; 628bcb0991SDimitry Andric uint32_t NumArchVGPR = 0; 638bcb0991SDimitry Andric uint32_t NumAccVGPR = 0; 64fe6060f1SDimitry Andric uint32_t AccumOffset = 0; 65fe6060f1SDimitry Andric uint32_t TgSplit = 0; 660b57cec5SDimitry Andric uint32_t NumSGPR = 0; 67fcaf7f86SDimitry Andric unsigned SGPRSpill = 0; 68fcaf7f86SDimitry Andric unsigned VGPRSpill = 0; 690b57cec5SDimitry Andric uint32_t LDSSize = 0; 700b57cec5SDimitry Andric bool FlatUsed = false; 710b57cec5SDimitry Andric 720b57cec5SDimitry Andric // Number of SGPRs that meets number of waves per execution unit request. 730b57cec5SDimitry Andric uint32_t NumSGPRsForWavesPerEU = 0; 740b57cec5SDimitry Andric 750b57cec5SDimitry Andric // Number of VGPRs that meets number of waves per execution unit request. 760b57cec5SDimitry Andric uint32_t NumVGPRsForWavesPerEU = 0; 770b57cec5SDimitry Andric 788bcb0991SDimitry Andric // Final occupancy. 798bcb0991SDimitry Andric uint32_t Occupancy = 0; 808bcb0991SDimitry Andric 810b57cec5SDimitry Andric // Whether there is recursion, dynamic allocas, indirect calls or some other 820b57cec5SDimitry Andric // reason there may be statically unknown stack usage. 830b57cec5SDimitry Andric bool DynamicCallStack = false; 840b57cec5SDimitry Andric 850b57cec5SDimitry Andric // Bonus information for debugging. 860b57cec5SDimitry Andric bool VCCUsed = false; 870b57cec5SDimitry Andric 880b57cec5SDimitry Andric SIProgramInfo() = default; 89e8d8bef9SDimitry Andric 90e8d8bef9SDimitry Andric /// Compute the value of the ComputePGMRsrc1 register. 91*5f757f3fSDimitry Andric uint64_t getComputePGMRSrc1(const GCNSubtarget &ST) const; 92*5f757f3fSDimitry Andric uint64_t getPGMRSrc1(CallingConv::ID CC, const GCNSubtarget &ST) const; 9306c3fb27SDimitry Andric 9406c3fb27SDimitry Andric /// Compute the value of the ComputePGMRsrc2 register. 9506c3fb27SDimitry Andric uint64_t getComputePGMRSrc2() const; 9606c3fb27SDimitry Andric uint64_t getPGMRSrc2(CallingConv::ID CC) const; 970b57cec5SDimitry Andric }; 980b57cec5SDimitry Andric 990b57cec5SDimitry Andric } // namespace llvm 1000b57cec5SDimitry Andric 1010b57cec5SDimitry Andric #endif // LLVM_LIB_TARGET_AMDGPU_SIPROGRAMINFO_H 102