xref: /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCKernelDescriptor.h (revision b64c5a0ace59af62eff52bfe110a521dc73c937b)
1 //===--- AMDGPUMCKernelDescriptor.h ---------------------------*- C++ -*---===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 /// \file
10 /// AMDHSA kernel descriptor MCExpr struct for use in MC layer. Uses
11 /// AMDHSAKernelDescriptor.h for sizes and constants.
12 ///
13 //
14 //===----------------------------------------------------------------------===//
15 
16 #ifndef LLVM_LIB_TARGET_AMDGPU_MCTARGETDESC_AMDGPUMCKERNELDESCRIPTOR_H
17 #define LLVM_LIB_TARGET_AMDGPU_MCTARGETDESC_AMDGPUMCKERNELDESCRIPTOR_H
18 
19 #include "llvm/Support/AMDHSAKernelDescriptor.h"
20 
21 namespace llvm {
22 class MCExpr;
23 class MCContext;
24 class MCSubtargetInfo;
25 namespace AMDGPU {
26 
27 struct MCKernelDescriptor {
28   const MCExpr *group_segment_fixed_size = nullptr;
29   const MCExpr *private_segment_fixed_size = nullptr;
30   const MCExpr *kernarg_size = nullptr;
31   const MCExpr *compute_pgm_rsrc3 = nullptr;
32   const MCExpr *compute_pgm_rsrc1 = nullptr;
33   const MCExpr *compute_pgm_rsrc2 = nullptr;
34   const MCExpr *kernel_code_properties = nullptr;
35   const MCExpr *kernarg_preload = nullptr;
36 
37   static MCKernelDescriptor
38   getDefaultAmdhsaKernelDescriptor(const MCSubtargetInfo *STI, MCContext &Ctx);
39   // MCExpr for:
40   // Dst = Dst & ~Mask
41   // Dst = Dst | (Value << Shift)
42   static void bits_set(const MCExpr *&Dst, const MCExpr *Value, uint32_t Shift,
43                        uint32_t Mask, MCContext &Ctx);
44 
45   // MCExpr for:
46   // return (Src & Mask) >> Shift
47   static const MCExpr *bits_get(const MCExpr *Src, uint32_t Shift,
48                                 uint32_t Mask, MCContext &Ctx);
49 };
50 
51 } // end namespace AMDGPU
52 } // end namespace llvm
53 
54 #endif // LLVM_LIB_TARGET_AMDGPU_MCTARGETDESC_AMDGPUMCKERNELDESCRIPTOR_H
55