1 //===-- MCTargetDesc/AMDGPUMCAsmInfo.cpp - Assembly Info ------------------===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 /// \file 8 //===----------------------------------------------------------------------===// 9 10 #include "AMDGPUMCAsmInfo.h" 11 #include "MCTargetDesc/AMDGPUMCExpr.h" 12 #include "MCTargetDesc/AMDGPUMCTargetDesc.h" 13 #include "llvm/MC/MCExpr.h" 14 #include "llvm/MC/MCSubtargetInfo.h" 15 #include "llvm/TargetParser/Triple.h" 16 17 using namespace llvm; 18 19 const MCAsmInfo::AtSpecifier atSpecifiers[] = { 20 {AMDGPUMCExpr::S_GOTPCREL, "gotpcrel"}, 21 {AMDGPUMCExpr::S_GOTPCREL32_LO, "gotpcrel32@lo"}, 22 {AMDGPUMCExpr::S_GOTPCREL32_HI, "gotpcrel32@hi"}, 23 {AMDGPUMCExpr::S_REL32_LO, "rel32@lo"}, 24 {AMDGPUMCExpr::S_REL32_HI, "rel32@hi"}, 25 {AMDGPUMCExpr::S_REL64, "rel64"}, 26 {AMDGPUMCExpr::S_ABS32_LO, "abs32@lo"}, 27 {AMDGPUMCExpr::S_ABS32_HI, "abs32@hi"}, 28 }; 29 30 AMDGPUMCAsmInfo::AMDGPUMCAsmInfo(const Triple &TT, 31 const MCTargetOptions &Options) { 32 CodePointerSize = (TT.isAMDGCN()) ? 8 : 4; 33 StackGrowsUp = true; 34 HasSingleParameterDotFile = false; 35 //===------------------------------------------------------------------===// 36 MinInstAlignment = 4; 37 38 // This is the maximum instruction encoded size for gfx10. With a known 39 // subtarget, it can be reduced to 8 bytes. 40 MaxInstLength = (TT.isAMDGCN()) ? 20 : 16; 41 SeparatorString = "\n"; 42 CommentString = ";"; 43 InlineAsmStart = ";#ASMSTART"; 44 InlineAsmEnd = ";#ASMEND"; 45 UsesSetToEquateSymbol = true; 46 47 //===--- Data Emission Directives -------------------------------------===// 48 UsesELFSectionDirectiveForBSS = true; 49 50 //===--- Global Variable Emission Directives --------------------------===// 51 COMMDirectiveAlignmentIsInBytes = false; 52 HasNoDeadStrip = true; 53 //===--- Dwarf Emission Directives -----------------------------------===// 54 SupportsDebugInformation = true; 55 UsesCFIWithoutEH = true; 56 DwarfRegNumForCFI = true; 57 58 UseIntegratedAssembler = false; 59 initializeAtSpecifiers(atSpecifiers); 60 } 61 62 bool AMDGPUMCAsmInfo::shouldOmitSectionDirective(StringRef SectionName) const { 63 return SectionName == ".hsatext" || SectionName == ".hsadata_global_agent" || 64 SectionName == ".hsadata_global_program" || 65 SectionName == ".hsarodata_readonly_agent" || 66 MCAsmInfo::shouldOmitSectionDirective(SectionName); 67 } 68 69 unsigned AMDGPUMCAsmInfo::getMaxInstLength(const MCSubtargetInfo *STI) const { 70 if (!STI || STI->getTargetTriple().getArch() == Triple::r600) 71 return MaxInstLength; 72 73 // Maximum for NSA encoded images 74 if (STI->hasFeature(AMDGPU::FeatureNSAEncoding)) 75 return 20; 76 77 // VOP3PX encoding. 78 if (STI->hasFeature(AMDGPU::FeatureGFX950Insts)) 79 return 16; 80 81 // 64-bit instruction with 32-bit literal. 82 if (STI->hasFeature(AMDGPU::FeatureVOP3Literal)) 83 return 12; 84 85 return 8; 86 } 87