1 //===-- MCTargetDesc/AMDGPUMCAsmInfo.cpp - Assembly Info ------------------===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 /// \file 8 //===----------------------------------------------------------------------===// 9 10 #include "AMDGPUMCAsmInfo.h" 11 #include "llvm/ADT/Triple.h" 12 #include "llvm/MC/MCSubtargetInfo.h" 13 #include "MCTargetDesc/AMDGPUMCTargetDesc.h" 14 15 using namespace llvm; 16 17 AMDGPUMCAsmInfo::AMDGPUMCAsmInfo(const Triple &TT, 18 const MCTargetOptions &Options) { 19 CodePointerSize = (TT.getArch() == Triple::amdgcn) ? 8 : 4; 20 StackGrowsUp = true; 21 HasSingleParameterDotFile = false; 22 //===------------------------------------------------------------------===// 23 MinInstAlignment = 4; 24 25 // This is the maximum instruction encoded size for gfx10. With a known 26 // subtarget, it can be reduced to 8 bytes. 27 MaxInstLength = (TT.getArch() == Triple::amdgcn) ? 20 : 16; 28 SeparatorString = "\n"; 29 CommentString = ";"; 30 InlineAsmStart = ";#ASMSTART"; 31 InlineAsmEnd = ";#ASMEND"; 32 33 //===--- Data Emission Directives -------------------------------------===// 34 SunStyleELFSectionSwitchSyntax = true; 35 UsesELFSectionDirectiveForBSS = true; 36 37 //===--- Global Variable Emission Directives --------------------------===// 38 HasAggressiveSymbolFolding = true; 39 COMMDirectiveAlignmentIsInBytes = false; 40 HasNoDeadStrip = true; 41 //===--- Dwarf Emission Directives -----------------------------------===// 42 SupportsDebugInformation = true; 43 UsesCFIForDebug = true; 44 DwarfRegNumForCFI = true; 45 46 UseIntegratedAssembler = false; 47 } 48 49 bool AMDGPUMCAsmInfo::shouldOmitSectionDirective(StringRef SectionName) const { 50 return SectionName == ".hsatext" || SectionName == ".hsadata_global_agent" || 51 SectionName == ".hsadata_global_program" || 52 SectionName == ".hsarodata_readonly_agent" || 53 MCAsmInfo::shouldOmitSectionDirective(SectionName); 54 } 55 56 unsigned AMDGPUMCAsmInfo::getMaxInstLength(const MCSubtargetInfo *STI) const { 57 if (!STI || STI->getTargetTriple().getArch() == Triple::r600) 58 return MaxInstLength; 59 60 // Maximum for NSA encoded images 61 if (STI->getFeatureBits()[AMDGPU::FeatureNSAEncoding]) 62 return 20; 63 64 // 64-bit instruction with 32-bit literal. 65 if (STI->getFeatureBits()[AMDGPU::FeatureVOP3Literal]) 66 return 12; 67 68 return 8; 69 } 70