1 //===-- AMDGPUTargetMachine.h - AMDGPU TargetMachine Interface --*- C++ -*-===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 // 9 /// \file 10 /// The AMDGPU TargetMachine interface definition for hw codgen targets. 11 // 12 //===----------------------------------------------------------------------===// 13 14 #ifndef LLVM_LIB_TARGET_AMDGPU_AMDGPUTARGETMACHINE_H 15 #define LLVM_LIB_TARGET_AMDGPU_AMDGPUTARGETMACHINE_H 16 17 #include "AMDGPUSubtarget.h" 18 #include "llvm/ADT/Optional.h" 19 #include "llvm/ADT/StringMap.h" 20 #include "llvm/ADT/StringRef.h" 21 #include "llvm/Analysis/TargetTransformInfo.h" 22 #include "llvm/Support/CodeGen.h" 23 #include "llvm/Target/TargetMachine.h" 24 #include <memory> 25 26 namespace llvm { 27 28 //===----------------------------------------------------------------------===// 29 // AMDGPU Target Machine (R600+) 30 //===----------------------------------------------------------------------===// 31 32 class AMDGPUTargetMachine : public LLVMTargetMachine { 33 protected: 34 std::unique_ptr<TargetLoweringObjectFile> TLOF; 35 36 StringRef getGPUName(const Function &F) const; 37 StringRef getFeatureString(const Function &F) const; 38 39 public: 40 static bool EnableLateStructurizeCFG; 41 static bool EnableFunctionCalls; 42 static bool EnableFixedFunctionABI; 43 44 AMDGPUTargetMachine(const Target &T, const Triple &TT, StringRef CPU, 45 StringRef FS, TargetOptions Options, 46 Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM, 47 CodeGenOpt::Level OL); 48 ~AMDGPUTargetMachine() override; 49 50 const TargetSubtargetInfo *getSubtargetImpl() const; 51 const TargetSubtargetInfo *getSubtargetImpl(const Function &) const override = 0; 52 53 TargetLoweringObjectFile *getObjFileLowering() const override { 54 return TLOF.get(); 55 } 56 57 void adjustPassManager(PassManagerBuilder &) override; 58 59 /// Get the integer value of a null pointer in the given address space. 60 static int64_t getNullPointerValue(unsigned AddrSpace) { 61 return (AddrSpace == AMDGPUAS::LOCAL_ADDRESS || 62 AddrSpace == AMDGPUAS::PRIVATE_ADDRESS || 63 AddrSpace == AMDGPUAS::REGION_ADDRESS) ? -1 : 0; 64 } 65 }; 66 67 //===----------------------------------------------------------------------===// 68 // R600 Target Machine (R600 -> Cayman) 69 //===----------------------------------------------------------------------===// 70 71 class R600TargetMachine final : public AMDGPUTargetMachine { 72 private: 73 mutable StringMap<std::unique_ptr<R600Subtarget>> SubtargetMap; 74 75 public: 76 R600TargetMachine(const Target &T, const Triple &TT, StringRef CPU, 77 StringRef FS, TargetOptions Options, 78 Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM, 79 CodeGenOpt::Level OL, bool JIT); 80 81 TargetPassConfig *createPassConfig(PassManagerBase &PM) override; 82 83 const R600Subtarget *getSubtargetImpl(const Function &) const override; 84 85 TargetTransformInfo getTargetTransformInfo(const Function &F) override; 86 87 bool isMachineVerifierClean() const override { 88 return false; 89 } 90 }; 91 92 //===----------------------------------------------------------------------===// 93 // GCN Target Machine (SI+) 94 //===----------------------------------------------------------------------===// 95 96 class GCNTargetMachine final : public AMDGPUTargetMachine { 97 private: 98 mutable StringMap<std::unique_ptr<GCNSubtarget>> SubtargetMap; 99 100 public: 101 GCNTargetMachine(const Target &T, const Triple &TT, StringRef CPU, 102 StringRef FS, TargetOptions Options, 103 Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM, 104 CodeGenOpt::Level OL, bool JIT); 105 106 TargetPassConfig *createPassConfig(PassManagerBase &PM) override; 107 108 const GCNSubtarget *getSubtargetImpl(const Function &) const override; 109 110 TargetTransformInfo getTargetTransformInfo(const Function &F) override; 111 112 bool useIPRA() const override { 113 return true; 114 } 115 116 yaml::MachineFunctionInfo *createDefaultFuncInfoYAML() const override; 117 yaml::MachineFunctionInfo * 118 convertFuncInfoToYAML(const MachineFunction &MF) const override; 119 bool parseMachineFunctionInfo(const yaml::MachineFunctionInfo &, 120 PerFunctionMIParsingState &PFS, 121 SMDiagnostic &Error, 122 SMRange &SourceRange) const override; 123 }; 124 125 } // end namespace llvm 126 127 #endif // LLVM_LIB_TARGET_AMDGPU_AMDGPUTARGETMACHINE_H 128