1//=- AMDGPURegisterBank.td - Describe the AMDGPU Banks -------*- tablegen -*-=// 2// 3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4// See https://llvm.org/LICENSE.txt for license information. 5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6// 7//===----------------------------------------------------------------------===// 8 9def SGPRRegBank : RegisterBank<"SGPR", 10 [SReg_32, SReg_64, SReg_128, SReg_256, SReg_512] 11>; 12 13def VGPRRegBank : RegisterBank<"VGPR", 14 [VGPR_32, VReg_64, VReg_96, VReg_128, VReg_256, VReg_512] 15>; 16 17def SCCRegBank : RegisterBank <"SCC", [SReg_32, SCC_CLASS]>; 18 19// It is helpful to distinguish conditions from ordinary SGPRs. 20def VCCRegBank : RegisterBank <"VCC", [SReg_64]>; 21