1 //=== lib/CodeGen/GlobalISel/AMDGPUPreLegalizerCombiner.cpp ---------------===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 // 9 // This pass does combining of machine instructions at the generic MI level, 10 // before the legalizer. 11 // 12 //===----------------------------------------------------------------------===// 13 14 #include "AMDGPUTargetMachine.h" 15 #include "llvm/CodeGen/GlobalISel/Combiner.h" 16 #include "llvm/CodeGen/GlobalISel/CombinerHelper.h" 17 #include "llvm/CodeGen/GlobalISel/CombinerInfo.h" 18 #include "llvm/CodeGen/GlobalISel/GISelKnownBits.h" 19 #include "llvm/CodeGen/GlobalISel/MIPatternMatch.h" 20 #include "llvm/CodeGen/MachineDominators.h" 21 #include "llvm/CodeGen/MachineFunctionPass.h" 22 #include "llvm/CodeGen/TargetPassConfig.h" 23 #include "llvm/Support/Debug.h" 24 #include "MCTargetDesc/AMDGPUMCTargetDesc.h" 25 26 #define DEBUG_TYPE "amdgpu-prelegalizer-combiner" 27 28 using namespace llvm; 29 using namespace MIPatternMatch; 30 31 #define AMDGPUPRELEGALIZERCOMBINERHELPER_GENCOMBINERHELPER_DEPS 32 #include "AMDGPUGenPreLegalizeGICombiner.inc" 33 #undef AMDGPUPRELEGALIZERCOMBINERHELPER_GENCOMBINERHELPER_DEPS 34 35 namespace { 36 #define AMDGPUPRELEGALIZERCOMBINERHELPER_GENCOMBINERHELPER_H 37 #include "AMDGPUGenPreLegalizeGICombiner.inc" 38 #undef AMDGPUPRELEGALIZERCOMBINERHELPER_GENCOMBINERHELPER_H 39 40 class AMDGPUPreLegalizerCombinerInfo : public CombinerInfo { 41 GISelKnownBits *KB; 42 MachineDominatorTree *MDT; 43 44 public: 45 AMDGPUGenPreLegalizerCombinerHelperRuleConfig GeneratedRuleCfg; 46 47 AMDGPUPreLegalizerCombinerInfo(bool EnableOpt, bool OptSize, bool MinSize, 48 GISelKnownBits *KB, MachineDominatorTree *MDT) 49 : CombinerInfo(/*AllowIllegalOps*/ true, /*ShouldLegalizeIllegal*/ false, 50 /*LegalizerInfo*/ nullptr, EnableOpt, OptSize, MinSize), 51 KB(KB), MDT(MDT) { 52 if (!GeneratedRuleCfg.parseCommandLineOption()) 53 report_fatal_error("Invalid rule identifier"); 54 } 55 56 virtual bool combine(GISelChangeObserver &Observer, MachineInstr &MI, 57 MachineIRBuilder &B) const override; 58 }; 59 60 bool AMDGPUPreLegalizerCombinerInfo::combine(GISelChangeObserver &Observer, 61 MachineInstr &MI, 62 MachineIRBuilder &B) const { 63 CombinerHelper Helper(Observer, B, KB, MDT); 64 AMDGPUGenPreLegalizerCombinerHelper Generated(GeneratedRuleCfg); 65 66 if (Generated.tryCombineAll(Observer, MI, B, Helper)) 67 return true; 68 69 switch (MI.getOpcode()) { 70 case TargetOpcode::G_CONCAT_VECTORS: 71 return Helper.tryCombineConcatVectors(MI); 72 case TargetOpcode::G_SHUFFLE_VECTOR: 73 return Helper.tryCombineShuffleVector(MI); 74 } 75 76 return false; 77 } 78 79 #define AMDGPUPRELEGALIZERCOMBINERHELPER_GENCOMBINERHELPER_CPP 80 #include "AMDGPUGenPreLegalizeGICombiner.inc" 81 #undef AMDGPUPRELEGALIZERCOMBINERHELPER_GENCOMBINERHELPER_CPP 82 83 // Pass boilerplate 84 // ================ 85 86 class AMDGPUPreLegalizerCombiner : public MachineFunctionPass { 87 public: 88 static char ID; 89 90 AMDGPUPreLegalizerCombiner(bool IsOptNone = false); 91 92 StringRef getPassName() const override { 93 return "AMDGPUPreLegalizerCombiner"; 94 } 95 96 bool runOnMachineFunction(MachineFunction &MF) override; 97 98 void getAnalysisUsage(AnalysisUsage &AU) const override; 99 private: 100 bool IsOptNone; 101 }; 102 } // end anonymous namespace 103 104 void AMDGPUPreLegalizerCombiner::getAnalysisUsage(AnalysisUsage &AU) const { 105 AU.addRequired<TargetPassConfig>(); 106 AU.setPreservesCFG(); 107 getSelectionDAGFallbackAnalysisUsage(AU); 108 AU.addRequired<GISelKnownBitsAnalysis>(); 109 AU.addPreserved<GISelKnownBitsAnalysis>(); 110 if (!IsOptNone) { 111 AU.addRequired<MachineDominatorTree>(); 112 AU.addPreserved<MachineDominatorTree>(); 113 } 114 MachineFunctionPass::getAnalysisUsage(AU); 115 } 116 117 AMDGPUPreLegalizerCombiner::AMDGPUPreLegalizerCombiner(bool IsOptNone) 118 : MachineFunctionPass(ID), IsOptNone(IsOptNone) { 119 initializeAMDGPUPreLegalizerCombinerPass(*PassRegistry::getPassRegistry()); 120 } 121 122 bool AMDGPUPreLegalizerCombiner::runOnMachineFunction(MachineFunction &MF) { 123 if (MF.getProperties().hasProperty( 124 MachineFunctionProperties::Property::FailedISel)) 125 return false; 126 auto *TPC = &getAnalysis<TargetPassConfig>(); 127 const Function &F = MF.getFunction(); 128 bool EnableOpt = 129 MF.getTarget().getOptLevel() != CodeGenOpt::None && !skipFunction(F); 130 GISelKnownBits *KB = &getAnalysis<GISelKnownBitsAnalysis>().get(MF); 131 MachineDominatorTree *MDT = 132 IsOptNone ? nullptr : &getAnalysis<MachineDominatorTree>(); 133 AMDGPUPreLegalizerCombinerInfo PCInfo(EnableOpt, F.hasOptSize(), 134 F.hasMinSize(), KB, MDT); 135 Combiner C(PCInfo, TPC); 136 return C.combineMachineInstrs(MF, /*CSEInfo*/ nullptr); 137 } 138 139 char AMDGPUPreLegalizerCombiner::ID = 0; 140 INITIALIZE_PASS_BEGIN(AMDGPUPreLegalizerCombiner, DEBUG_TYPE, 141 "Combine AMDGPU machine instrs before legalization", 142 false, false) 143 INITIALIZE_PASS_DEPENDENCY(TargetPassConfig) 144 INITIALIZE_PASS_DEPENDENCY(GISelKnownBitsAnalysis) 145 INITIALIZE_PASS_END(AMDGPUPreLegalizerCombiner, DEBUG_TYPE, 146 "Combine AMDGPU machine instrs before legalization", false, 147 false) 148 149 namespace llvm { 150 FunctionPass *createAMDGPUPreLegalizeCombiner(bool IsOptNone) { 151 return new AMDGPUPreLegalizerCombiner(IsOptNone); 152 } 153 } // end namespace llvm 154